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silabs: Si4362: Fix KLC violations, add ground pad pin

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Add pin 21 ground pad.

Prior to fixing, violations were:
checking component: Si4362
  Violating Rule 3.8
    Description and keywords properties contains information about the component.
  Violating EC01 - Extra Checking
    Check pins names against pin types.
  Violating EC03 - Extra Checking
    Check part reference, name and footprint position and alignment
  Violating EC04 - Extra Checking
    Check line width and background for box outlines parts.
  Violating EC05 - Extra Checking
    Pin numbers should not be duplicated, and all pins should be present
    Pin 4 is missing
    Pin 5 is missing
    Pin 7 is missing

Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
This commit is contained in:
Andrew Bradford 2017-03-05 13:46:37 -05:00
parent a011a01397
commit de53f05686
2 changed files with 13 additions and 8 deletions
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1
library/silabs.dcm
View file

@ -20,6 +20,7 @@ $ENDCMP
# #
$CMP Si4362 $CMP Si4362
D EZRadioPRO Low Current Receiver D EZRadioPRO Low Current Receiver
K radio receiver
F http://www.silabs.com/Support%20Documents/TechnicalDocs/Si4362.pdf F http://www.silabs.com/Support%20Documents/TechnicalDocs/Si4362.pdf
$ENDCMP $ENDCMP
# #

20
library/silabs.lib
View file

@ -124,29 +124,33 @@ ENDDEF
# Si4362 # Si4362
# #
DEF Si4362 U 0 40 Y Y 1 F N DEF Si4362 U 0 40 Y Y 1 F N
F0 "U" -400 700 50 H V C CNN F0 "U" -200 775 50 H V R CNN
F1 "Si4362" -300 -700 50 H V C CNN F1 "Si4362" -200 700 50 H V R CNN
F2 "" 50 -1000 50 H I C CNN F2 "Housings_DFN_QFN:QFN-20-1EP_4x4mm_Pitch0.5mm" 350 -700 50 H I L CNN
F3 "" 50 -1000 50 H I C CNN F3 "" 50 -1000 50 H I C CNN
$FPLIST $FPLIST
QFN-20-1EP_4x4mm_Pitch0.5mm QFN*4x4mm*Pitch0.5mm*
$ENDFPLIST $ENDFPLIST
DRAW DRAW
S -450 650 450 -650 0 1 0 f S -450 650 450 -650 0 1 10 f
X SDN 1 -600 500 150 R 50 50 1 1 I X SDN 1 -600 500 150 R 50 50 1 1 I
X RXp 2 -600 400 150 R 50 50 1 1 I X RXp 2 -600 400 150 R 50 50 1 1 I
X RXn 3 -600 300 150 R 50 50 1 1 I X RXn 3 -600 300 150 R 50 50 1 1 I
X NC 4 100 -800 150 U 50 50 1 1 N N
X NC 5 200 -800 150 U 50 50 1 1 N N
X VDD 6 -100 800 150 D 50 50 1 1 W X VDD 6 -100 800 150 D 50 50 1 1 W
X NC 7 300 -800 150 U 50 50 1 1 N N
X VDD 8 0 800 150 D 50 50 1 1 W X VDD 8 0 800 150 D 50 50 1 1 W
X GPIO0 9 600 500 150 L 50 50 1 1 B X GPIO0 9 600 500 150 L 50 50 1 1 B
X GPIO1 10 600 400 150 L 50 50 1 1 B X GPIO1 10 600 400 150 L 50 50 1 1 B
X GPIO3 20 600 200 150 L 50 50 1 1 B X GPIO3 20 600 200 150 L 50 50 1 1 B
X ~IRQ 11 600 -500 150 L 50 50 1 1 I X ~IRQ 11 600 -500 150 L 50 50 1 1 O
X GND 21 -100 -800 150 U 50 50 1 1 W
X SCLK 12 600 -400 150 L 50 50 1 1 I C X SCLK 12 600 -400 150 L 50 50 1 1 I C
X SDO 13 600 -300 150 L 50 50 1 1 I X SDO 13 600 -300 150 L 50 50 1 1 O
X SDI 14 600 -200 150 L 50 50 1 1 I X SDI 14 600 -200 150 L 50 50 1 1 I
X ~SEL 15 600 -100 150 L 50 50 1 1 I X ~SEL 15 600 -100 150 L 50 50 1 1 I
X XOUT 16 -600 -200 150 R 50 50 1 1 I X XOUT 16 -600 -200 150 R 50 50 1 1 O
X XIN 17 -600 -100 150 R 50 50 1 1 I X XIN 17 -600 -100 150 R 50 50 1 1 I
X GND 18 0 -800 150 U 50 50 1 1 W X GND 18 0 -800 150 U 50 50 1 1 W
X GPIO2 19 600 300 150 L 50 50 1 1 B X GPIO2 19 600 300 150 L 50 50 1 1 B