tztz/KicadLib
1
0
Fork 0
Code Issues Pull requests Releases Wiki Activity

silabs: CP2112: fix KLC violations

Browse source 
Switched VBUS to be an input pin, both suspend pins to be outputs, and
all GND pins to be power inputs as per the CP2112 datasheet.

Prior to fixing, KLC violations were:
checking component: CP2112
  Violating Rule 3.9
    For components with a single default footprint, footprint field is filled with valid footprint
    filename
  Violating EC01 - Extra Checking
    Check pins names against pin types.
  Violating EC03 - Extra Checking
    Check part reference, name and footprint position and alignment
  Violating EC04 - Extra Checking
    Check line width and background for box outlines parts.

Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
This commit is contained in:
Andrew Bradford 2017-03-04 13:16:46 -05:00
parent 11c194f74a
commit a011a01397
1 changed files with 11 additions and 8 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

19
library/silabs.lib
View file

@ -84,12 +84,15 @@ ENDDEF
# CP2112
#
DEF CP2112 U 0 40 Y Y 1 F N
F0 "U" -400 700 50 H V C CNN
F1 "CP2112" -300 -700 50 H V C CNN
F2 "QFN-24-1EP_4x4mm_Pitch0.5mm" 50 -1000 50 H I C CNN
F0 "U" -100 775 50 H V R CNN
F1 "CP2112" -100 700 50 H V R CNN
F2 "Housings_DFN_QFN:QFN-24-1EP_4x4mm_Pitch0.5mm" 450 -700 50 H I L CNN
F3 "" 50 -1000 50 H I C CNN
$FPLIST
QFN*4x4mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -450 650 450 -650 0 1 0 f
S -450 650 450 -650 0 1 10 f
X SDA 1 600 500 150 L 50 50 1 1 B
X GND 2 100 -800 150 U 50 50 1 1 W
X D+ 3 -600 -400 150 R 50 50 1 1 B
@ -97,11 +100,11 @@ X D- 4 -600 -500 150 R 50 50 1 1 B
X VIO 5 100 800 150 D 50 50 1 1 W
X VDD 6 0 800 150 D 50 50 1 1 W
X REGIN 7 -600 -100 150 R 50 50 1 1 W
X VBUS 8 -600 -300 150 R 50 50 1 1 O
X VBUS 8 -600 -300 150 R 50 50 1 1 I
X ~RST 9 -600 500 150 R 50 50 1 1 I
X NC 10 400 -800 150 U 50 50 1 1 N N
X GPIO.3 20 600 -100 150 L 50 50 1 1 B
X SUSPEND 11 -600 200 150 R 50 50 1 1 I
X SUSPEND 11 -600 200 150 R 50 50 1 1 O
X GPIO.2 21 600 0 150 L 50 50 1 1 B
X GPIO.7 12 600 -500 150 L 50 50 1 1 B
X GPIO.1 22 600 100 150 L 50 50 1 1 B
@ -110,9 +113,9 @@ X GPIO.0 23 600 200 150 L 50 50 1 1 B
X GPIO.5 14 600 -300 150 L 50 50 1 1 B
X SCL 24 600 400 150 L 50 50 1 1 O
X GPIO.4 15 600 -200 150 L 50 50 1 1 B
X GND 25 0 -800 150 U 50 50 1 1 I
X GND 25 0 -800 150 U 50 50 1 1 W
X VPP 16 -600 0 150 R 50 50 1 1 W
X ~SUSPEND 17 -600 300 150 R 50 50 1 1 I
X ~SUSPEND 17 -600 300 150 R 50 50 1 1 O
X NC 18 200 -800 150 U 50 50 1 1 N N
X NC 19 300 -800 150 U 50 50 1 1 N N
ENDDRAW