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Updated net names.

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This commit is contained in:
Ashton Johnson 2016-10-28 21:49:15 -05:00
parent 03ffe41edc
commit 2171b93325
4 changed files with 127 additions and 128 deletions
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171
template/raspberrypi-gpio-40pin/raspberrypi-gpio-40pin.kicad_pcb
View file

@ -1,9 +1,9 @@
(kicad_pcb (version 4) (host pcbnew 4.0.2+dfsg1-stable) (kicad_pcb (version 20160815) (host pcbnew no-vcs-found-undefined)
(general (general
(links 10) (links 10)
(no_connects 10) (no_connects 10)
(area 199.94 92.005 287.050001 167.46) (area 199.949999 93.949999 265.050001 150.050001)
(thickness 1.6) (thickness 1.6)
(drawings 39) (drawings 39)
(tracks 0) (tracks 0)
@ -75,7 +75,6 @@
(hpglpennumber 1) (hpglpennumber 1)
(hpglpenspeed 20) (hpglpenspeed 20)
(hpglpendiameter 15) (hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false) (psnegative false)
(psa4output false) (psa4output false)
(plotreference true) (plotreference true)
@ -97,34 +96,34 @@
(net 4 "Net-(MH4-Pad1)") (net 4 "Net-(MH4-Pad1)")
(net 5 +3V3) (net 5 +3V3)
(net 6 +5V) (net 6 +5V)
(net 7 /GPIO2) (net 7 GND)
(net 8 /GPIO3) (net 8 /ID_SD)
(net 9 GND) (net 9 /ID_SC)
(net 10 /GPIO4) (net 10 /GPIO5)
(net 11 /GPIO14) (net 11 /GPIO6)
(net 12 /GPIO15) (net 12 /GPIO12)
(net 13 /GPIO17) (net 13 /GPIO13)
(net 14 /GPIO18) (net 14 /GPIO19)
(net 15 /GPIO27) (net 15 /GPIO20)
(net 16 /GPIO22) (net 16 /GPIO26)
(net 17 /GPIO23) (net 17 /GPIO21)
(net 18 /GPIO24) (net 18 "/GPIO2(SDA1)")
(net 19 /GPIO10) (net 19 "/GPIO3(SCL1)")
(net 20 /GPIO9) (net 20 "/GPIO4(GCLK)")
(net 21 /GPIO25) (net 21 "/GPIO14(TXD0)")
(net 22 /GPIO11) (net 22 "/GPIO15(RXD0)")
(net 23 /GPIO8) (net 23 "/GPIO17(GEN0)")
(net 24 /GPIO7) (net 24 "/GPIO18(GEN1)")
(net 25 /ID_SD) (net 25 "/GPIO27(GEN2)")
(net 26 /ID_SC) (net 26 "/GPIO22(GEN3)")
(net 27 /GPIO5) (net 27 "/GPIO23(GEN4)")
(net 28 /GPIO6) (net 28 "/GPIO24(GEN5)")
(net 29 /GPIO12) (net 29 "/GPIO10(SPI_MOSI)")
(net 30 /GPIO13) (net 30 "/GPIO9(SPI_MISO)")
(net 31 /GPIO19) (net 31 "/GPIO25(GEN6)")
(net 32 /GPIO20) (net 32 "/GPIO11(SPI_CLK)")
(net 33 /GPIO26) (net 33 "/GPIO8(SPI_CE0_N)")
(net 34 /GPIO21) (net 34 "/GPIO7(SPI_CE1_N)")
(net_class Default "This is the default net class." (net_class Default "This is the default net class."
(clearance 0.2) (clearance 0.2)
@ -133,33 +132,35 @@
(via_drill 0.6) (via_drill 0.6)
(uvia_dia 0.5) (uvia_dia 0.5)
(uvia_drill 0.1) (uvia_drill 0.1)
(diff_pair_gap 0.25)
(diff_pair_width 0.2)
(add_net +3V3) (add_net +3V3)
(add_net +5V) (add_net +5V)
(add_net /GPIO10) (add_net "/GPIO10(SPI_MOSI)")
(add_net /GPIO11) (add_net "/GPIO11(SPI_CLK)")
(add_net /GPIO12) (add_net /GPIO12)
(add_net /GPIO13) (add_net /GPIO13)
(add_net /GPIO14) (add_net "/GPIO14(TXD0)")
(add_net /GPIO15) (add_net "/GPIO15(RXD0)")
(add_net /GPIO17) (add_net "/GPIO17(GEN0)")
(add_net /GPIO18) (add_net "/GPIO18(GEN1)")
(add_net /GPIO19) (add_net /GPIO19)
(add_net /GPIO2) (add_net "/GPIO2(SDA1)")
(add_net /GPIO20) (add_net /GPIO20)
(add_net /GPIO21) (add_net /GPIO21)
(add_net /GPIO22) (add_net "/GPIO22(GEN3)")
(add_net /GPIO23) (add_net "/GPIO23(GEN4)")
(add_net /GPIO24) (add_net "/GPIO24(GEN5)")
(add_net /GPIO25) (add_net "/GPIO25(GEN6)")
(add_net /GPIO26) (add_net /GPIO26)
(add_net /GPIO27) (add_net "/GPIO27(GEN2)")
(add_net /GPIO3) (add_net "/GPIO3(SCL1)")
(add_net /GPIO4) (add_net "/GPIO4(GCLK)")
(add_net /GPIO5) (add_net /GPIO5)
(add_net /GPIO6) (add_net /GPIO6)
(add_net /GPIO7) (add_net "/GPIO7(SPI_CE1_N)")
(add_net /GPIO8) (add_net "/GPIO8(SPI_CE0_N)")
(add_net /GPIO9) (add_net "/GPIO9(SPI_MISO)")
(add_net /ID_SC) (add_net /ID_SC)
(add_net /ID_SD) (add_net /ID_SD)
(add_net GND) (add_net GND)
@ -176,6 +177,8 @@
(via_drill 0.7) (via_drill 0.7)
(uvia_dia 0.5) (uvia_dia 0.5)
(uvia_drill 0.1) (uvia_drill 0.1)
(diff_pair_gap 0.25)
(diff_pair_width 0.2)
) )
(module Mounting_Holes:MountingHole_2-5mm (layer F.Cu) (tedit 580C1F55) (tstamp 580CBA7A) (module Mounting_Holes:MountingHole_2-5mm (layer F.Cu) (tedit 580C1F55) (tstamp 580CBA7A)
@ -254,81 +257,81 @@
(pad 2 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 2 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 6 +5V)) (net 6 +5V))
(pad 3 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 3 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 7 /GPIO2)) (net 18 "/GPIO2(SDA1)"))
(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 6 +5V)) (net 6 +5V))
(pad 5 thru_hole oval (at 5.08 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 5 thru_hole oval (at 5.08 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 8 /GPIO3)) (net 19 "/GPIO3(SCL1)"))
(pad 6 thru_hole oval (at 5.08 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 6 thru_hole oval (at 5.08 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 GND)) (net 7 GND))
(pad 7 thru_hole oval (at 7.62 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 7 thru_hole oval (at 7.62 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 10 /GPIO4)) (net 20 "/GPIO4(GCLK)"))
(pad 8 thru_hole oval (at 7.62 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 8 thru_hole oval (at 7.62 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 11 /GPIO14)) (net 21 "/GPIO14(TXD0)"))
(pad 9 thru_hole oval (at 10.16 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 9 thru_hole oval (at 10.16 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 GND)) (net 7 GND))
(pad 10 thru_hole oval (at 10.16 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 10 thru_hole oval (at 10.16 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 12 /GPIO15)) (net 22 "/GPIO15(RXD0)"))
(pad 11 thru_hole oval (at 12.7 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 11 thru_hole oval (at 12.7 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 13 /GPIO17)) (net 23 "/GPIO17(GEN0)"))
(pad 12 thru_hole oval (at 12.7 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 12 thru_hole oval (at 12.7 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 14 /GPIO18)) (net 24 "/GPIO18(GEN1)"))
(pad 13 thru_hole oval (at 15.24 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 13 thru_hole oval (at 15.24 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 15 /GPIO27)) (net 25 "/GPIO27(GEN2)"))
(pad 14 thru_hole oval (at 15.24 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 14 thru_hole oval (at 15.24 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 GND)) (net 7 GND))
(pad 15 thru_hole oval (at 17.78 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 15 thru_hole oval (at 17.78 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 16 /GPIO22)) (net 26 "/GPIO22(GEN3)"))
(pad 16 thru_hole oval (at 17.78 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 16 thru_hole oval (at 17.78 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 17 /GPIO23)) (net 27 "/GPIO23(GEN4)"))
(pad 17 thru_hole oval (at 20.32 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 17 thru_hole oval (at 20.32 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 5 +3V3)) (net 5 +3V3))
(pad 18 thru_hole oval (at 20.32 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 18 thru_hole oval (at 20.32 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 18 /GPIO24)) (net 28 "/GPIO24(GEN5)"))
(pad 19 thru_hole oval (at 22.86 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 19 thru_hole oval (at 22.86 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 19 /GPIO10)) (net 29 "/GPIO10(SPI_MOSI)"))
(pad 20 thru_hole oval (at 22.86 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 20 thru_hole oval (at 22.86 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 GND)) (net 7 GND))
(pad 21 thru_hole oval (at 25.4 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 21 thru_hole oval (at 25.4 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 20 /GPIO9)) (net 30 "/GPIO9(SPI_MISO)"))
(pad 22 thru_hole oval (at 25.4 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 22 thru_hole oval (at 25.4 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 21 /GPIO25)) (net 31 "/GPIO25(GEN6)"))
(pad 23 thru_hole oval (at 27.94 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 23 thru_hole oval (at 27.94 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 22 /GPIO11)) (net 32 "/GPIO11(SPI_CLK)"))
(pad 24 thru_hole oval (at 27.94 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 24 thru_hole oval (at 27.94 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 23 /GPIO8)) (net 33 "/GPIO8(SPI_CE0_N)"))
(pad 25 thru_hole oval (at 30.48 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 25 thru_hole oval (at 30.48 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 GND)) (net 7 GND))
(pad 26 thru_hole oval (at 30.48 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 26 thru_hole oval (at 30.48 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 24 /GPIO7)) (net 34 "/GPIO7(SPI_CE1_N)"))
(pad 27 thru_hole oval (at 33.02 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 27 thru_hole oval (at 33.02 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 25 /ID_SD)) (net 8 /ID_SD))
(pad 28 thru_hole oval (at 33.02 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 28 thru_hole oval (at 33.02 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 26 /ID_SC)) (net 9 /ID_SC))
(pad 29 thru_hole oval (at 35.56 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 29 thru_hole oval (at 35.56 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 27 /GPIO5)) (net 10 /GPIO5))
(pad 30 thru_hole oval (at 35.56 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 30 thru_hole oval (at 35.56 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 GND)) (net 7 GND))
(pad 31 thru_hole oval (at 38.1 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 31 thru_hole oval (at 38.1 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 28 /GPIO6)) (net 11 /GPIO6))
(pad 32 thru_hole oval (at 38.1 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 32 thru_hole oval (at 38.1 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 29 /GPIO12)) (net 12 /GPIO12))
(pad 33 thru_hole oval (at 40.64 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 33 thru_hole oval (at 40.64 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 30 /GPIO13)) (net 13 /GPIO13))
(pad 34 thru_hole oval (at 40.64 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 34 thru_hole oval (at 40.64 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 GND)) (net 7 GND))
(pad 35 thru_hole oval (at 43.18 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 35 thru_hole oval (at 43.18 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 31 /GPIO19)) (net 14 /GPIO19))
(pad 36 thru_hole oval (at 43.18 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 36 thru_hole oval (at 43.18 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 32 /GPIO20)) (net 15 /GPIO20))
(pad 37 thru_hole oval (at 45.72 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 37 thru_hole oval (at 45.72 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 33 /GPIO26)) (net 16 /GPIO26))
(pad 38 thru_hole oval (at 45.72 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 38 thru_hole oval (at 45.72 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 34 /GPIO21)) (net 17 /GPIO21))
(pad 39 thru_hole oval (at 48.26 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 39 thru_hole oval (at 48.26 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 GND)) (net 7 GND))
(pad 40 thru_hole oval (at 48.26 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 40 thru_hole oval (at 48.26 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 GND)) (net 7 GND))
(model Socket_Strips.3dshapes/Socket_Strip_Straight_2x20.wrl (model Socket_Strips.3dshapes/Socket_Strip_Straight_2x20.wrl
(at (xyz 0.95 -0.05 0)) (at (xyz 0.95 -0.05 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))

42
template/raspberrypi-gpio-40pin/raspberrypi-gpio-40pin.net
View file

@ -1,15 +1,15 @@
(export (version D) (export (version D)
(design (design
(source /home/ashton/kicad/kicad-library/template/rasberrypi3-gpio/rasberrypi3-gpio.sch) (source /home/ashton/kicad/kicad-library/template/raspberrypi-gpio-40pin/raspberrypi-gpio-40pin.sch)
(date "Sat 22 Oct 2016 09:19:45 PM CDT") (date "Fri 28 Oct 2016 09:47:18 PM CDT")
(tool "Eeschema 4.0.2+dfsg1-stable") (tool "Eeschema no-vcs-found-undefined")
(sheet (number 1) (name /) (tstamps /) (sheet (number 1) (name /) (tstamps /)
(title_block (title_block
(title) (title)
(company) (company)
(rev) (rev)
(date "15 nov 2012") (date "15 nov 2012")
(source rasberrypi3-gpio.sch) (source raspberrypi-gpio-40pin.sch)
(comment (number 1) (value "")) (comment (number 1) (value ""))
(comment (number 2) (value "")) (comment (number 2) (value ""))
(comment (number 3) (value "")) (comment (number 3) (value ""))
@ -110,7 +110,7 @@
(library (logical conn) (library (logical conn)
(uri /home/ashton/kicad/kicad-library/library/conn.lib))) (uri /home/ashton/kicad/kicad-library/library/conn.lib)))
(nets (nets
(net (code 1) (name /GPIO24) (net (code 1) (name "/GPIO24(GEN5)")
(node (ref P1) (pin 18))) (node (ref P1) (pin 18)))
(net (code 2) (name /GPIO26) (net (code 2) (name /GPIO26)
(node (ref P1) (pin 37))) (node (ref P1) (pin 37)))
@ -118,43 +118,43 @@
(node (ref P1) (pin 36))) (node (ref P1) (pin 36)))
(net (code 4) (name /GPIO21) (net (code 4) (name /GPIO21)
(node (ref P1) (pin 38))) (node (ref P1) (pin 38)))
(net (code 5) (name /GPIO7) (net (code 5) (name "/GPIO7(SPI_CE1_N)")
(node (ref P1) (pin 26))) (node (ref P1) (pin 26)))
(net (code 6) (name /ID_SC) (net (code 6) (name /ID_SC)
(node (ref P1) (pin 28))) (node (ref P1) (pin 28)))
(net (code 7) (name /GPIO25) (net (code 7) (name "/GPIO25(GEN6)")
(node (ref P1) (pin 22))) (node (ref P1) (pin 22)))
(net (code 8) (name /GPIO8) (net (code 8) (name "/GPIO8(SPI_CE0_N)")
(node (ref P1) (pin 24))) (node (ref P1) (pin 24)))
(net (code 9) (name /GPIO23) (net (code 9) (name "/GPIO23(GEN4)")
(node (ref P1) (pin 16))) (node (ref P1) (pin 16)))
(net (code 10) (name /GPIO19) (net (code 10) (name /GPIO19)
(node (ref P1) (pin 35))) (node (ref P1) (pin 35)))
(net (code 11) (name /GPIO15) (net (code 11) (name "/GPIO15(RXD0)")
(node (ref P1) (pin 10))) (node (ref P1) (pin 10)))
(net (code 12) (name /GPIO18) (net (code 12) (name "/GPIO18(GEN1)")
(node (ref P1) (pin 12))) (node (ref P1) (pin 12)))
(net (code 13) (name /GPIO14) (net (code 13) (name "/GPIO14(TXD0)")
(node (ref P1) (pin 8))) (node (ref P1) (pin 8)))
(net (code 14) (name /GPIO12) (net (code 14) (name /GPIO12)
(node (ref P1) (pin 32))) (node (ref P1) (pin 32)))
(net (code 15) (name /GPIO2) (net (code 15) (name "/GPIO2(SDA1)")
(node (ref P1) (pin 3))) (node (ref P1) (pin 3)))
(net (code 16) (name /GPIO3) (net (code 16) (name "/GPIO3(SCL1)")
(node (ref P1) (pin 5))) (node (ref P1) (pin 5)))
(net (code 17) (name /GPIO4) (net (code 17) (name "/GPIO4(GCLK)")
(node (ref P1) (pin 7))) (node (ref P1) (pin 7)))
(net (code 18) (name /GPIO22) (net (code 18) (name "/GPIO22(GEN3)")
(node (ref P1) (pin 15))) (node (ref P1) (pin 15)))
(net (code 19) (name /GPIO17) (net (code 19) (name "/GPIO17(GEN0)")
(node (ref P1) (pin 11))) (node (ref P1) (pin 11)))
(net (code 20) (name /GPIO27) (net (code 20) (name "/GPIO27(GEN2)")
(node (ref P1) (pin 13))) (node (ref P1) (pin 13)))
(net (code 21) (name /GPIO10) (net (code 21) (name "/GPIO10(SPI_MOSI)")
(node (ref P1) (pin 19))) (node (ref P1) (pin 19)))
(net (code 22) (name /GPIO9) (net (code 22) (name "/GPIO9(SPI_MISO)")
(node (ref P1) (pin 21))) (node (ref P1) (pin 21)))
(net (code 23) (name /GPIO11) (net (code 23) (name "/GPIO11(SPI_CLK)")
(node (ref P1) (pin 23))) (node (ref P1) (pin 23)))
(net (code 24) (name /ID_SD) (net (code 24) (name /ID_SD)
(node (ref P1) (pin 27))) (node (ref P1) (pin 27)))

4
template/raspberrypi-gpio-40pin/raspberrypi-gpio-40pin.pro
View file

@ -1,4 +1,4 @@
update=Sun 23 Oct 2016 08:04:49 PM CDT update=Fri 28 Oct 2016 09:48:42 PM CDT
version=1 version=1
last_client=kicad last_client=kicad
[cvpcb] [cvpcb]
@ -89,7 +89,7 @@ SpiceUseNetNumbers=0
LabSize=50 LabSize=50
[eeschema] [eeschema]
version=1 version=1
LibDir= LibDir=../../library
[eeschema/libraries] [eeschema/libraries]
LibName1=74xgxx LibName1=74xgxx
LibName2=74xx LibName2=74xx

38
template/raspberrypi-gpio-40pin/raspberrypi-gpio-40pin.sch
View file

@ -9,8 +9,6 @@ LIBS:analog_devices
LIBS:analog_switches LIBS:analog_switches
LIBS:atmel LIBS:atmel
LIBS:audio LIBS:audio
LIBS:battery_management
LIBS:bbd
LIBS:brooktre LIBS:brooktre
LIBS:cmos4000 LIBS:cmos4000
LIBS:cmos_ieee LIBS:cmos_ieee
@ -47,7 +45,6 @@ LIBS:microchip_pic32mcu
LIBS:microcontrollers LIBS:microcontrollers
LIBS:motor_drivers LIBS:motor_drivers
LIBS:motorola LIBS:motorola
LIBS:motors
LIBS:msp430 LIBS:msp430
LIBS:nordicsemi LIBS:nordicsemi
LIBS:nxp_armmcu LIBS:nxp_armmcu
@ -80,7 +77,6 @@ LIBS:Worldsemi
LIBS:Xicor LIBS:Xicor
LIBS:xilinx LIBS:xilinx
LIBS:Zilog LIBS:Zilog
LIBS:rasberrypi3-gpio-cache
EELAYER 25 0 EELAYER 25 0
EELAYER END EELAYER END
$Descr A4 11693 8268 $Descr A4 11693 8268
@ -245,23 +241,23 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
2850 2600 3950 2600 2850 2600 3950 2600
Text Label 1250 1200 0 50 ~ 0 Text Label 1250 1200 0 50 ~ 0
GPIO2 GPIO2(SDA1)
Text Label 1250 1300 0 50 ~ 0 Text Label 1250 1300 0 50 ~ 0
GPIO3 GPIO3(SCL1)
Text Label 1250 1400 0 50 ~ 0 Text Label 1250 1400 0 50 ~ 0
GPIO4 GPIO4(GCLK)
Text Label 1250 1600 0 50 ~ 0 Text Label 1250 1600 0 50 ~ 0
GPIO17 GPIO17(GEN0)
Text Label 1250 1700 0 50 ~ 0 Text Label 1250 1700 0 50 ~ 0
GPIO27 GPIO27(GEN2)
Text Label 1250 1800 0 50 ~ 0 Text Label 1250 1800 0 50 ~ 0
GPIO22 GPIO22(GEN3)
Text Label 1250 2000 0 50 ~ 0 Text Label 1250 2000 0 50 ~ 0
GPIO10 GPIO10(SPI_MOSI)
Text Label 1250 2100 0 50 ~ 0 Text Label 1250 2100 0 50 ~ 0
GPIO9 GPIO9(SPI_MISO)
Text Label 1250 2200 0 50 ~ 0 Text Label 1250 2200 0 50 ~ 0
GPIO11 GPIO11(SPI_CLK)
Text Label 1250 2400 0 50 ~ 0 Text Label 1250 2400 0 50 ~ 0
ID_SD ID_SD
Text Label 1250 2500 0 50 ~ 0 Text Label 1250 2500 0 50 ~ 0
@ -283,21 +279,21 @@ GPIO12
Text Label 3950 2400 2 50 ~ 0 Text Label 3950 2400 2 50 ~ 0
ID_SC ID_SC
Text Label 3950 2300 2 50 ~ 0 Text Label 3950 2300 2 50 ~ 0
GPIO7 GPIO7(SPI_CE1_N)
Text Label 3950 2200 2 50 ~ 0 Text Label 3950 2200 2 50 ~ 0
GPIO8 GPIO8(SPI_CE0_N)
Text Label 3950 2100 2 50 ~ 0 Text Label 3950 2100 2 50 ~ 0
GPIO25 GPIO25(GEN6)
Text Label 3950 1900 2 50 ~ 0 Text Label 3950 1900 2 50 ~ 0
GPIO24 GPIO24(GEN5)
Text Label 3950 1800 2 50 ~ 0 Text Label 3950 1800 2 50 ~ 0
GPIO23 GPIO23(GEN4)
Text Label 3950 1600 2 50 ~ 0 Text Label 3950 1600 2 50 ~ 0
GPIO18 GPIO18(GEN1)
Text Label 3950 1500 2 50 ~ 0 Text Label 3950 1500 2 50 ~ 0
GPIO15 GPIO15(RXD0)
Text Label 3950 1400 2 50 ~ 0 Text Label 3950 1400 2 50 ~ 0
GPIO14 GPIO14(TXD0)
Wire Wire Line Wire Wire Line
3000 1300 2850 1300 3000 1300 2850 1300
Connection ~ 3000 1700 Connection ~ 3000 1700