54 lines
3.1 KiB
Plaintext
54 lines
3.1 KiB
Plaintext
(module ESP-03 (layer F.Cu) (tedit 0)
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(fp_text reference U$1 (at 0 0) (layer F.SilkS) hide
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(effects (font (size 1.27 1.27) (thickness 0.15)) (justify right top))
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)
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(fp_text value ESP8266-03 (at 0 0) (layer F.SilkS) hide
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(effects (font (size 1.27 1.27) (thickness 0.15)) (justify right top))
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)
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(fp_line (start 17.4 0) (end 17.4 -12.2) (layer F.SilkS) (width 0.127))
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(fp_line (start 0 0) (end 0 -12.2) (layer F.SilkS) (width 0.127))
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(fp_line (start 0 -12.2) (end 17.4 -12.2) (layer F.SilkS) (width 0.127))
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(fp_poly (pts (xy 0.6 -0.6) (xy 2.6 -0.6) (xy 2.6 -11.4) (xy 0.6 -11.4)) (layer F.SilkS) (width 0))
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(fp_line (start 0 0) (end 17.4 0) (layer F.SilkS) (width 0.127))
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(fp_line (start 5.8 -7.4) (end 5.8 -2.6) (layer F.SilkS) (width 0.127))
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(fp_line (start 5.8 -2.6) (end 10.8 -2.6) (layer F.SilkS) (width 0.127))
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(fp_line (start 10.8 -2.6) (end 10.8 -7.4) (layer F.SilkS) (width 0.127))
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(fp_line (start 10.8 -7.4) (end 5.8 -7.4) (layer F.SilkS) (width 0.127))
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(fp_line (start 11 -10.8) (end 11 -8.4) (layer F.SilkS) (width 0.127))
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(fp_line (start 11 -8.4) (end 13.6 -8.4) (layer F.SilkS) (width 0.127))
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(fp_line (start 13.6 -8.4) (end 13.6 -10.8) (layer F.SilkS) (width 0.127))
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(fp_line (start 13.6 -10.8) (end 11 -10.8) (layer F.SilkS) (width 0.127))
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(fp_line (start 12.2 -7.4) (end 12.2 -2.6) (layer F.SilkS) (width 0.127))
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(fp_line (start 12.2 -2.6) (end 17.2 -2.6) (layer F.SilkS) (width 0.127))
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(fp_line (start 17.2 -2.6) (end 17.2 -7.4) (layer F.SilkS) (width 0.127))
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(fp_line (start 17.2 -7.4) (end 12.2 -7.4) (layer F.SilkS) (width 0.127))
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(pad VCC smd rect (at 4 0.2 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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(pad GPIO14 smd rect (at 6 0.2 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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(pad GPIO12 smd rect (at 8 0.2 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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(pad GPIO13 smd rect (at 10 0.2 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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(pad GPIO15 smd rect (at 12 0.2 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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(pad GPIO2 smd rect (at 14 0.2 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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(pad GPIO0 smd rect (at 16 0.2 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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(pad ANT smd rect (at 4 -12.4 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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(pad CH_PD smd rect (at 6 -12.4 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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(pad GPIO18 smd rect (at 8 -12.4 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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(pad URXD smd rect (at 10 -12.4 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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(pad UTXD smd rect (at 12 -12.4 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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(pad NC smd rect (at 14 -12.4 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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(pad GND smd rect (at 16 -12.4 90) (size 1.5 1) (layers F.Cu F.Paste F.Mask)
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(solder_mask_margin 0.1016))
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)
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