KicadLib/library/silabs.lib
Gabe R e92b21b43d
Merging from Master (#7)
* reworked MAX77x (datasheet, symbol, missing variants, description ..)

* reworked MC33063-family (symbol, missing variants, footprints, description, ...)

* reworked MC34063 family as alias to MC33063 family

* reworked MCP16301 (symbol, pin-type, description)

* reworked MCP16311/2 (symbol, description, name without -, ...)

* reworked MCP16331 (symbol, pin-type, naming without -...)

* reworked MCP1640 family (symbol, naming wiothout -, ...)

* corrected some descriptions

* reworked MCP165x family (symbol, description)

* reworked MIC2177 (datasheet, symbol, pin-stacks, description...)

* added fixed-output variants of MIC2177

* added MIC2178 family

* reworked MIC4690 (stacked-pins, symbol, description...)

* reworked NID60-series (symbol, stacked-pins, footprint, FPFilter, description)
added NID30-series (footprint available from https://github.com/KiCad/Converters_DCDC_ACDC.pretty/pull/25)

* reworked NMAxxyyDC/SC-series (symbol, isolation bars, ...)

* reworked NXE2-series (NC-pin location, description, ...)

* reworked PAM2305 series (missing variants, symbols, description...)

* removed very obsolete PT6100 (no footprint, no description available anymore ...)

* reworked R-78E-series (description)

* Added 3D models for ZETA-433-SO

* Added Foot print name

* Added Foot print name

* reworked R78-Zxx-yy series from RECOM (symbol, added missing variants, footprints from https://github.com/KiCad/Converters_DCDC_ACDC.pretty/pull/26)

* Updated description of 868 and 915 MHz

* Made fields invisible

* reworked ST1CC40 (symbol, package-variants, wrong pinout and package, description, ...)

* Add Johansen chip antenna

* Add symbol for MAX6971 LED driver.

http://datasheets.maximintegrated.com/en/ds/MAX6971.pdf

* Move Parallax Propeller to its own library.

* The DIP version of the Propeller has two VDD pins and two VSS pins.

* reworked ST1S10 family (footprints, description, symbols...)

* reworked ST1S14PHR (symbol, missing PAD-pin, footprint, description, ...)

* reworked Traco TEN20-series (symbol, isolation barrier, pin-position, description, ...)

* reworked TL497 family (symbol, pin-types, description, FPFilters, ...)

* reworked TMR_1 series (description...)

* reworked TPS5431 (missing NCs, pin-types, description, footprint from https://github.com/KiCad/Housings_SOIC.pretty/pull/35...)

* reworked TPS54340/TPS54360 (footprint, pin-types, description...)

* reworked TPS560200 (description, ...)

* reworked TPS56x200 (description, ...)

* reworked TPS6050xDGS (pin-types, description, FPFilter, ...)

* reworked TPS6120x (symbol, pin-location, description, footpritns, see https://github.com/KiCad/Housings_SON.pretty/pull/19)

* reworked TPS621xy families (dscription, missing variants)

* Removed Antenna.lib, added Antenna_Chip to device.lib

* reworked TPS62xyz (missing variants, footprints, FPFilters, split by package, symbol, pin-types, description, ...)

* added scripted Wuerth Mapi inductor models

* reworked TPS6217xDQC (description, footprint from https://github.com/KiCad/Housings_SON.pretty/pull/20 ...)

* added description to TPS62175DQC

* reworked TPS6220xDBV (symbol, description, ...)

* reworked TSR-1 series (description, symbol, ...)

* fixed some KLC issues

* reworked ADG729

* added ADG728

* removed CPC1017N which is already in opto.lib

* Changed Antenna_Chip to use a resonator symbol

* reworked DG308/DG309/DG441/DG442

* Fix naming for Schurter FUP 3d models.

* Reduce pin length, text offset and body width of MCP45HVx1.

* FRSolutions: Add the Particle P1 WiFi module

* rfcom: Update footprint of ESP-12E

* rfcom: Update footprint of ESP-12E

* moved symbols from texas.lib and siliconi.lib to analog_switches.lib

* Copy connector shape from USB_OTG to USB_B_Micro.

I recently added the USB_B_Micro symbol (and an alias, USB_B_Mini).  I
hadn't noticed that there was already a similar USB_OTG symbol.

However, the two need to remain separate, because USB_OTG has VBUS and
GND marked as power inputs, while USB_B_Micro has them as power
outputs.

This commit makes USB_B_Micro identical to USB_OTG, except for the
direction of the power pins.  Specifically, it copies the connector
shape from USB_OTG to USB_B_Micro.  (I had been too lazy to draw the
connector shape when I created USB_B_Micro.)

* added missing NC-pins
fixed naming
added DG411/DG412/DG413 family

* Added FAN3268 to ON Semiconductor library.

* added DG417/DG418/DG419 and its variants ADG417/ADG419, MAX317/MAX318/MAX319

* corrected label location

* Added 3D models for SW_SP3T_PCM13 and SW_SPDT_PCM12

* added DG417L/DG418L/DG419L
fixed several minor issues (typos, wrong symbols, ...)

* Combined bosch.lib and Bosch.lib

* Don't update library version

* RFSolutions: Rename P1 to Particle_P1

* LED: Add CLV1L-FKB

* LED: CLV1L-FKB remove trademark symbol from description

* fixed several swicthes (wrong normally settings) + added DG41x-variants from Maxim and other companies, as Maxim does not have the separate Vlogic pin!

* added/reworked DG9421/DG9422 (package posted as https://github.com/KiCad/Housings_SSOP.pretty/pull/51)

* reworked DG884

* Added name of package to description (FAN3268)

* reworked FSA3157/NC7SB3157 (symbol, ...footprint from https://github.com/KiCad/Housings_SON.pretty/pull/21)

* Update fp-lib-table.for-github

* Update fp-lib-table.for-pretty

* reworked TS5A3159/TS5A3160 (split by footprint, added missing variants, description, symbol, footprint from https://github.com/KiCad/Housings_BGA.pretty/pull/26)

* rework HI524 (symbol, description, datasheet, footprint)

* moved LCC110 to opto.lib and reworked symbol (footprint, symbol, ...)

* moved LAA110, LB110 from analog_switches to opto.lib and reimplemented as ALIAS

* added MAX312/313/314 family as ALIASes

* added MAX323/324/325 series

* fixed KLC issues (font-size, wrong FPFilters)

* #IM fixed power-pin stack

* update LTC2309

stack GND and VDD pins allowing for same schematic on both chips.
Minor changes to adhere to KLC.

* Added 3D models for dip switches

* Updated according to PR feedback

* Add TDA1308

Schematic library for the class-AB stereo headphone driver by NXP

Signed-off-by: Adam Heinrich <adam@adamh.cz>

* Rename Cortex Debug Connector, add FP filter

- Renamed Cortex Debug Connector from `Conn_ARM_Cortex-Debug` to `CMP Conn_ARM_JTAG_SWD_10`
- Added FP filter `Conn*:*_2x*` for KiCad v5

* Oscillators: Add SG3030CM

* Removed CVS type

* Removed CVS type

* Updated leg and pad size

* pspice: Add MOSFET symbols

* Add cross 4p net tie

* Add cross 4p net tie

* Add symbol LED_BGRA.

This is the pinout used by "Piranha" RGB LEDs.  See that pull request
for more information.

* Add "LED*" footprint filter to LED symbols in "device" library.

Also:

* Added "~" datasheet to LED symbols to suppress KLC errors.
* Corrected cases where fields 2 and 3 were not invisible.

Did not attempt to correct other pre-existing KLC errors.  (Pin placement.)

* move symbol and package name, add potentiometer symbol inside.

* Move footprint name more to the right.

* Oscillators: Fix pin offset in SG-3030CM

* Separate power pins on generic opamps

* Update generic opamps symbols

* Add x cap discharge ICs

* Add x cap discharge ICs

* Oscillators: Rename SG3030CM footprint to comply with KLC

* Add TI OPA356 and OPA2356 operational amplifiers

They use the same pinout as existing devices, so they are just new
aliases.

* Update atmel.lib

* Added 3d part for Bosch LGA-8_2.5x2.5mm_Pitch0.65mm package, BME280 and BME680

* Corrected vent hole position, corrected marker pad position, pad numbering starts clockwise from right side

* MCU_Texas_MSP430: fix G2553

* Update fp-lib-table.for-github

* Update fp-lib-table.for-pretty

* Update fp-lib-table.for-pretty

* Update fp-lib-table.for-github

* Add TI OPA1622 operational amplifier

* - removed unneeded D-SUB 3D models
- moved bornierXX 3D models

* renamed bornier 3D models

* - moved Phoenix 3D models to correct location

* fixed D-SUB FPFilters for new footprints

* revert DSUB-fixes (will do separately)

* Added the Analog Devices ADP2302ARDZ

* visual enhancements as requested

* Added the Microchip MCP1825S 500mA LDO Regulator

* Update net ties

* Update net ties

* Fixed keywords, modified pin name offset, fixed pin type (FAN3268).

* Clearing an error in STM32L071/STM32L072 loading libs

* Add PD70224

* Add PD70224

* Fixed dot location

* Add "T" 3-pin net tie

* Add "T" 3-pin net tie

* Remove duplicated polylines in net ties

* Removed the errored lines altogether.

* Add OPA890 operational amplifier in SOT23-6 package

* Add Allegro current sensors

* Updated sym_lib_table file

* Added TJA1052i

* Added Alias

Alias for different isolation voltages

* Set pointing

* Added isolation lines

* Replaced illegal character

* fix sym-lib-table typos ang missing Logic_ prefixes

* added LSM303C and LSM6DS3

* Fix footprint filter

* hopefully final fixups

* MCU_Texas_MSP430: update keywords

* MCU_Texas_MSP430: update description

- do not duplicate part name (KLC 3.0.2 S6.3)
- append simplified footprint name (KLC 3.0.2 S6.3)

* MCU_Texas_MSP430: update documentation file

Always use a symlink based on the actual part number, even if multiple
devices share the same data sheet.

* Added better descriptions for symbol libraries

* Add TPS2592xx

Schematic library for the 5V/12V eFuse protection switch by TI

Signed-off-by: Adam Heinrich <adam@adamh.cz>

* Moved nc pins and made them visible

* Fixed Stacking & Naming

* Add TPS22929D power distribution switch

* - adjusted names of the symbols to the new KLC

* Added TPS61090, TPS61091, and TPS61092 boost converters.

* added TPD3E001DRLR TPD2E2U06

* updated to resolve jenkins issues

* Updated to address automated script issues

* Fixed additional errors

* Fixed ground pin alignment

* Updated footprint

* Microchip: SY89312V

3.3/5V, ECL/PECL 4GHz x2 clock divider

Documentation:
http://ww1.microchip.com/downloads/en/DeviceDoc/sy89312v.pdf

* fixed library version to make these workable with KiCAD 4.0.7 (see https://github.com/KiCad/kicad-library/issues/1838)

* removed whiteline that lead to error

* changed model name as per footprint, rotated 90 degree CCW, ofset 0,0,0

* Add Analog Devices ADP5070/5071 switching regulators

* Adjusted the PIC12 symbol names to the new KLC

* Changed pin order

* fixed several issues in transistors.lib/dcm:
- unified naming/description
- fixed some packages (e.g. TO-220-variants had wrong names)
- fixed wrong BF245/244 symbols (https://github.com/KiCad/kicad-library/issues/1843#issuecomment-345438714)
- added BF545
- added some missing datasheets

* Removed unnecessary changes to rest of the file

* - removed non-existent device from DCM (that device really is not produced!)
- fixed one description (package type)

* Update .travis.yml

Remove sudo requirement
2017-11-21 00:48:35 -07:00

363 lines
11 KiB
Plaintext

EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# CP2102N-A01-GQFN24
#
DEF CP2102N-A01-GQFN24 U 0 40 Y Y 1 F N
F0 "U" -200 875 50 H V R CNN
F1 "CP2102N-A01-GQFN24" -200 800 50 H V R CNN
F2 "Housings_DFN_QFN:QFN-24-1EP_4x4mm_Pitch0.5mm" 450 -800 50 H I L CNN
F3 "" 50 -1050 50 H I C CNN
$FPLIST
QFN*4x4mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -450 750 450 -750 0 1 10 f
X RI/CLK 1 600 600 150 L 50 50 1 1 B
X GND 2 100 -900 150 U 50 50 1 1 W
X D+ 3 -600 -400 150 R 50 50 1 1 B
X D- 4 -600 -500 150 R 50 50 1 1 B
X VIO 5 0 900 150 D 50 50 1 1 W
X VDD 6 -100 900 150 D 50 50 1 1 W
X REGIN 7 -600 0 150 R 50 50 1 1 W
X VBUS 8 -600 -300 150 R 50 50 1 1 I
X ~RSTb 9 -600 600 150 R 50 50 1 1 I
X NC 10 400 -900 150 U 50 50 1 1 N N
X RXD 20 600 300 150 L 50 50 1 1 I
X GPIO.3 11 600 -300 150 L 50 50 1 1 B
X TXD 21 600 200 150 L 50 50 1 1 O
X GPIO.2 12 600 -400 150 L 50 50 1 1 B
X DSR 22 600 100 150 L 50 50 1 1 I
X GPIO.1 13 600 -500 150 L 50 50 1 1 B
X DTR 23 600 0 150 L 50 50 1 1 O
X GPIO.0 14 600 -600 150 L 50 50 1 1 B
X DCD 24 600 -100 150 L 50 50 1 1 I
X ~SUSPENDb 15 -600 200 150 R 50 50 1 1 O
X GND 25 0 -900 150 U 50 50 1 1 W
X NC 16 300 -900 150 U 50 50 1 1 N N
X SUSPEND 17 -600 300 150 R 50 50 1 1 O
X CTS 18 600 500 150 L 50 50 1 1 I
X RTS 19 600 400 150 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# CP2104
#
DEF CP2104 U 0 40 Y Y 1 F N
F0 "U" -300 925 50 H V R CNN
F1 "CP2104" -300 850 50 H V R CNN
F2 "Housings_DFN_QFN:QFN-24-1EP_4x4mm_Pitch0.5mm" 150 -950 50 H I L CNN
F3 "" -550 1250 50 H I C CNN
$FPLIST
QFN*4x4mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -600 800 600 -900 0 1 10 f
X RI 1 700 600 100 L 50 50 1 1 I
X GND 2 0 -1000 100 U 50 50 1 1 W
X D+ 3 -700 0 100 R 50 50 1 1 B
X D- 4 -700 100 100 R 50 50 1 1 B
X VIO 5 -200 900 100 D 50 50 1 1 W
X VDD 6 0 900 100 D 50 50 1 1 W
X REGIN 7 -700 600 100 R 50 50 1 1 W
X VBUS 8 -700 400 100 R 50 50 1 1 I
X ~RST 9 700 -500 100 L 50 50 1 1 B
X VIO/NC 10 200 900 100 D 50 50 1 1 w
X RXD 20 700 0 100 L 50 50 1 1 I
X GPIO.3 11 -700 -500 100 R 50 50 1 1 B
X TXD 21 700 100 100 L 50 50 1 1 O
X GPIO.2 12 -700 -400 100 R 50 50 1 1 B
X DSR 22 700 300 100 L 50 50 1 1 I
X GPIO.1 13 -700 -300 100 R 50 50 1 1 B
X DTR 23 700 400 100 L 50 50 1 1 O
X GPIO.0 14 -700 -200 100 R 50 50 1 1 B
X DCD 24 700 500 100 L 50 50 1 1 I
X ~SUSPEND 15 700 -700 100 L 50 50 1 1 O
X PAD 25 100 -1000 100 U 50 50 1 1 W
X VPP 16 -700 -700 100 R 50 50 1 1 P
X SUSPEND 17 700 -600 100 L 50 50 1 1 O
X CTS 18 700 -300 100 L 50 50 1 1 I
X RTS 19 700 -200 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# CP2112
#
DEF CP2112 U 0 40 Y Y 1 F N
F0 "U" -100 775 50 H V R CNN
F1 "CP2112" -100 700 50 H V R CNN
F2 "Housings_DFN_QFN:QFN-24-1EP_4x4mm_Pitch0.5mm" 450 -700 50 H I L CNN
F3 "" 50 -1000 50 H I C CNN
$FPLIST
QFN*4x4mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -450 650 450 -650 0 1 10 f
X SDA 1 600 500 150 L 50 50 1 1 B
X GND 2 100 -800 150 U 50 50 1 1 W
X D+ 3 -600 -400 150 R 50 50 1 1 B
X D- 4 -600 -500 150 R 50 50 1 1 B
X VIO 5 100 800 150 D 50 50 1 1 W
X VDD 6 0 800 150 D 50 50 1 1 W
X REGIN 7 -600 -100 150 R 50 50 1 1 W
X VBUS 8 -600 -300 150 R 50 50 1 1 I
X ~RST 9 -600 500 150 R 50 50 1 1 I
X NC 10 400 -800 150 U 50 50 1 1 N N
X GPIO.3 20 600 -100 150 L 50 50 1 1 B
X SUSPEND 11 -600 200 150 R 50 50 1 1 O
X GPIO.2 21 600 0 150 L 50 50 1 1 B
X GPIO.7 12 600 -500 150 L 50 50 1 1 B
X GPIO.1 22 600 100 150 L 50 50 1 1 B
X GPIO.6 13 600 -400 150 L 50 50 1 1 B
X GPIO.0 23 600 200 150 L 50 50 1 1 B
X GPIO.5 14 600 -300 150 L 50 50 1 1 B
X SCL 24 600 400 150 L 50 50 1 1 O
X GPIO.4 15 600 -200 150 L 50 50 1 1 B
X GND 25 0 -800 150 U 50 50 1 1 W
X VPP 16 -600 0 150 R 50 50 1 1 W
X ~SUSPEND 17 -600 300 150 R 50 50 1 1 O
X NC 18 200 -800 150 U 50 50 1 1 N N
X NC 19 300 -800 150 U 50 50 1 1 N N
ENDDRAW
ENDDEF
#
# EFM8BB10F8G-A-QFN20
#
DEF EFM8BB10F8G-A-QFN20 U 0 40 Y Y 1 F N
F0 "U" -550 600 50 H V L CNN
F1 "EFM8BB10F8G-A-QFN20" 50 600 50 H V L CNN
F2 "Housings_DFN_QFN:SiliconLabs_QFN-20-1EP_3x3mm_Pitch0.5mm_ThermalVias" 0 800 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS EFM8BB10F4G-A-QFN20 EFM8BB10F2G-A-QFN20 EFM8BB10F8I-A-QFN20 EFM8BB10F4I-A-QFN20 EFM8BB10F2I-A-QFN20 EFM8BB10F8A-A-QFN20 EFM8BB10F4A-A-QFN20 EFM8BB10F2A-A-QFN20
$FPLIST
SiliconLabs*QFN*1EP*3x3mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -550 550 550 -550 0 1 10 f
X P0.1 1 -700 200 150 R 50 50 0 1 B
X P0.0 2 -700 300 150 R 50 50 0 1 B
X GND 3 -100 -700 150 U 50 50 0 1 W
X VDD 4 0 700 150 D 50 50 0 1 W
X RSTb/C2CK 5 -700 400 150 R 50 50 0 1 I
X P2.0/C2D 6 700 -300 150 L 50 50 0 1 B
X P1.6 7 700 -200 150 L 50 50 0 1 B
X P1.5 8 700 -100 150 L 50 50 0 1 B
X P1.4 9 700 0 150 L 50 50 0 1 B
X P1.3 10 700 100 150 L 50 50 0 1 B
X P0.2 20 -700 100 150 R 50 50 0 1 B
X P1.2 11 700 200 150 L 50 50 0 1 B
X GND 21 100 -700 150 U 50 50 0 1 W
X GND 12 0 -700 150 U 50 50 0 1 W
X P1.1 13 700 300 150 L 50 50 0 1 B
X P1.0 14 700 400 150 L 50 50 0 1 B
X P0.7 15 -700 -400 150 R 50 50 0 1 B
X P0.6 16 -700 -300 150 R 50 50 0 1 B
X P0.5 17 -700 -200 150 R 50 50 0 1 B
X P0.4 18 -700 -100 150 R 50 50 0 1 B
X P0.3 19 -700 0 150 R 50 50 0 1 B
ENDDRAW
ENDDEF
#
# EFM8BB10F8G-A-QSOP24
#
DEF EFM8BB10F8G-A-QSOP24 U 0 40 Y Y 1 F N
F0 "U" -550 600 50 H V L CNN
F1 "EFM8BB10F8G-A-QSOP24" 50 600 50 H V L CNN
F2 "Housings_SSOP:QSOP-24_3.9x8.7mm_Pitch0.635mm" 0 800 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS EFM8BB10F8I-A-QSOP24
$FPLIST
QSOP*Pitch0.635mm*
$ENDFPLIST
DRAW
S -550 550 550 -550 0 1 10 f
X NC 1 0 100 150 R 50 50 0 1 N N
X P0.2 2 -700 100 150 R 50 50 0 1 B
X P0.1 3 -700 200 150 R 50 50 0 1 B
X P0.0 4 -700 300 150 R 50 50 0 1 B
X GND 5 0 -700 150 U 50 50 0 1 W
X VDD 6 0 700 150 D 50 50 0 1 W
X RSTb/C2CK 7 -700 400 150 R 50 50 0 1 I
X P2.0/C2D 8 700 -400 150 L 50 50 0 1 B
X P1.7 9 700 -300 150 L 50 50 0 1 B
X P1.6 10 700 -200 150 L 50 50 0 1 B
X P0.6 20 -700 -300 150 R 50 50 0 1 B
X P1.5 11 700 -100 150 L 50 50 0 1 B
X P0.5 21 -700 -200 150 R 50 50 0 1 B
X P2.1 12 700 -500 150 L 50 50 0 1 B
X P0.4 22 -700 -100 150 R 50 50 0 1 B
X NC 13 0 0 150 R 50 50 0 1 N N
X P0.3 23 -700 0 150 R 50 50 0 1 B
X P1.4 14 700 0 150 L 50 50 0 1 B
X NC 24 0 -100 150 R 50 50 0 1 N N
X P1.3 15 700 100 150 L 50 50 0 1 B
X P1.2 16 700 200 150 L 50 50 0 1 B
X P1.1 17 700 300 150 L 50 50 0 1 B
X P1.0 18 700 400 150 L 50 50 0 1 B
X P0.7 19 -700 -400 150 R 50 50 0 1 B
ENDDRAW
ENDDEF
#
# EFM8BB10F8G-A-SOIC16
#
DEF EFM8BB10F8G-A-SOIC16 U 0 40 Y Y 1 F N
F0 "U" -550 600 50 H V L CNN
F1 "EFM8BB10F8G-A-SOIC16" 50 600 50 H V L CNN
F2 "Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm" 0 800 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS EFM8BB10F8I-A-SOIC16
$FPLIST
SOIC*3.9x9.9mm*Pitch1.27mm*
$ENDFPLIST
DRAW
S -550 550 550 -550 0 1 10 f
X P0.2 1 -700 100 150 R 50 50 0 1 B
X P0.1 2 -700 200 150 R 50 50 0 1 B
X P0.0 3 -700 300 150 R 50 50 0 1 B
X GND 4 0 -700 150 U 50 50 0 1 W
X VDD 5 0 700 150 D 50 50 0 1 W
X RSTb/C2CK 6 -700 400 150 R 50 50 0 1 I
X P2.0/C2D 7 700 0 150 L 50 50 0 1 B
X P1.3 8 700 100 150 L 50 50 0 1 B
X P1.2 9 700 200 150 L 50 50 0 1 B
X P1.1 10 700 300 150 L 50 50 0 1 B
X P1.0 11 700 400 150 L 50 50 0 1 B
X P0.7 12 -700 -400 150 R 50 50 0 1 B
X P0.6 13 -700 -300 150 R 50 50 0 1 B
X P0.5 14 -700 -200 150 R 50 50 0 1 B
X P0.4 15 -700 -100 150 R 50 50 0 1 B
X P0.3 16 -700 0 150 R 50 50 0 1 B
ENDDRAW
ENDDEF
#
# Si3210
#
DEF Si3210 U 0 40 Y Y 1 F N
F0 "U" -550 1425 50 H V R CNN
F1 "Si3210" -550 1350 50 H V R CNN
F2 "Housings_SSOP:TSSOP-38_4.4x9.7mm_Pitch0.5mm" 250 1400 50 H I L CNN
F3 "" 3500 -2650 50 H I C CNN
$FPLIST
TSSOP*
$ENDFPLIST
DRAW
S -800 1300 800 -1400 0 1 10 f
X ~CS 1 1000 600 200 L 50 50 1 1 I
X ~INT 2 1000 -100 200 L 50 50 1 1 O
X PCLK 3 1000 300 200 L 50 50 1 1 I
X DRX 4 1000 200 200 L 50 50 1 1 I
X DTX 5 1000 100 200 L 50 50 1 1 O
X FSYNC 6 1000 400 200 L 50 50 1 1 I
X ~RESET 7 1000 -200 200 L 50 50 1 1 I
X SDCH 8 -300 -1600 200 U 50 50 1 1 O
X SDCL 9 -400 -1600 200 U 50 50 1 1 O
X VDDA1 10 -200 1500 200 D 50 50 1 1 W
X STIPAC 20 -1000 700 200 R 50 50 1 1 I
X VDDD 30 200 1500 200 D 50 50 1 1 W
X IREF 11 1000 -700 200 L 50 50 1 1 O
X SRINGAC 21 -1000 -900 200 R 50 50 1 1 I
X GNDD 31 100 -1600 200 U 50 50 1 1 W
X CAPP 12 1000 -800 200 L 50 50 1 1 O
X IGMN 22 1000 -500 200 L 50 50 1 1 O
X TEST 32 -1000 1000 200 R 50 50 1 1 I
X QGND 13 1000 -1000 200 L 50 50 1 1 W
X GNDA 23 300 -1600 200 U 50 50 1 1 W
X DCFF 33 -100 -1600 200 U 50 50 1 1 O
X CAPM 14 1000 -900 200 L 50 50 1 1 O
X IGMP 24 1000 -400 200 L 50 50 1 1 O
X DCDRV 34 -200 -1600 200 U 50 50 1 1 O
X STIPDC 15 -1000 800 200 R 50 50 1 1 I
X IRINGN 25 -1000 200 200 R 50 50 1 1 I
X SDITHRU 35 1000 800 200 L 50 50 1 1 O
X SRINGDC 16 -1000 -1000 200 R 50 50 1 1 I
X IRINGP 26 -1000 0 200 R 50 50 1 1 I
X SDO 36 1000 700 200 L 50 50 1 1 O
X STIPE 17 -1000 -100 200 R 50 50 1 1 I
X VDDA2 27 0 1500 200 D 50 50 1 1 W
X SDI 37 1000 900 200 L 50 50 1 1 I
X SVBAT 18 -1000 -500 200 R 50 50 1 1 I
X ITIPP 28 -1000 100 200 R 50 50 1 1 I
X SCLK 38 1000 1000 200 L 50 50 1 1 I
X SRINGE 19 -1000 -200 200 R 50 50 1 1 I
X ITIPN 29 -1000 300 200 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# Si4362
#
DEF Si4362 U 0 40 Y Y 1 F N
F0 "U" -200 775 50 H V R CNN
F1 "Si4362" -200 700 50 H V R CNN
F2 "Housings_DFN_QFN:QFN-20-1EP_4x4mm_Pitch0.5mm" 350 -700 50 H I L CNN
F3 "" 50 -1000 50 H I C CNN
$FPLIST
QFN*4x4mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -450 650 450 -650 0 1 10 f
X SDN 1 -600 500 150 R 50 50 1 1 I
X RXp 2 -600 400 150 R 50 50 1 1 I
X RXn 3 -600 300 150 R 50 50 1 1 I
X NC 4 100 -800 150 U 50 50 1 1 N N
X NC 5 200 -800 150 U 50 50 1 1 N N
X VDD 6 -100 800 150 D 50 50 1 1 W
X NC 7 300 -800 150 U 50 50 1 1 N N
X VDD 8 0 800 150 D 50 50 1 1 W
X GPIO0 9 600 500 150 L 50 50 1 1 B
X GPIO1 10 600 400 150 L 50 50 1 1 B
X GPIO3 20 600 200 150 L 50 50 1 1 B
X ~IRQ 11 600 -500 150 L 50 50 1 1 O
X GND 21 -100 -800 150 U 50 50 1 1 W
X SCLK 12 600 -400 150 L 50 50 1 1 I C
X SDO 13 600 -300 150 L 50 50 1 1 O
X SDI 14 600 -200 150 L 50 50 1 1 I
X ~SEL 15 600 -100 150 L 50 50 1 1 I
X XOUT 16 -600 -200 150 R 50 50 1 1 O
X XIN 17 -600 -100 150 R 50 50 1 1 I
X GND 18 0 -800 150 U 50 50 1 1 W
X GPIO2 19 600 300 150 L 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Si4735-D60-GU
#
DEF Si4735-D60-GU U 0 40 Y Y 1 F N
F0 "U" -200 775 50 H V R CNN
F1 "Si4735-D60-GU" -200 700 50 H V R CNN
F2 "Housings_SSOP:SSOP-24_3.9x8.7mm_Pitch0.635mm" 250 -700 50 H I L CNN
F3 "" 50 -1000 50 H I C CNN
ALIAS Si4734-D60-GU Si4731-D60-GU Si4730-D60-GU
$FPLIST
SSOP*3.9x8.7mm*Pitch0.635mm*
$ENDFPLIST
DRAW
S 450 650 -450 -650 0 1 10 f
X DOUT 1 600 300 150 L 50 50 1 1 O
X DFS 2 600 0 150 L 50 50 1 1 I
X GPO3/[DCLK] 3 -600 -200 150 R 50 50 1 1 B
X GPO2/[~INT~] 4 -600 -300 150 R 50 50 1 1 O
X GPO1 5 -600 -400 150 R 50 50 1 1 O
X NC 6 -600 -500 150 R 50 50 1 1 N N
X NC 7 600 -500 150 L 50 50 1 1 N N
X FMI 8 600 -300 150 L 50 50 1 1 I
X RFGND 9 600 -400 150 L 50 50 1 1 W
X NC 10 -200 -800 150 U 50 50 1 1 N N
X VD 20 -100 800 150 D 50 50 1 1 W
X NC 11 200 -800 150 U 50 50 1 1 N N
X VA 21 100 800 150 D 50 50 1 1 W
X AMI 12 600 -200 150 L 50 50 1 1 I
X DBYP 22 600 500 150 L 50 50 1 1 P
X GND 13 -100 -800 150 U 50 50 1 1 W
X ROUT/[DOUT] 23 600 200 150 L 50 50 1 1 O
X GND 14 100 -800 150 U 50 50 1 1 W
X LOUT/[DFS] 24 600 100 150 L 50 50 1 1 B
X ~RST 15 -600 500 150 R 50 50 1 1 I
X ~SEN 16 -600 300 150 R 50 50 1 1 I
X SCLK 17 -600 100 150 R 50 50 1 1 I C
X SDIO 18 -600 200 150 R 50 50 1 1 B
X RCLK 19 -600 0 150 R 50 50 1 1 I C
ENDDRAW
ENDDEF
#
#End Library