322 lines
13 KiB
Plaintext
322 lines
13 KiB
Plaintext
(kicad_pcb (version 20160815) (host pcbnew no-vcs-found-7409~56~ubuntu16.10.1)
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(general
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(links 1)
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(no_connects 1)
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(area 38.235286 69.47162 197.449762 147.28)
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(thickness 1.6)
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(drawings 20)
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(tracks 0)
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(zones 0)
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(modules 5)
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(nets 26)
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)
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(page A4)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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(setup
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(last_trace_width 0.25)
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(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.2)
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(segment_width 0.2)
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(edge_width 0.2)
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(via_size 0.6)
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(via_drill 0.4)
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(via_min_size 0.4)
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(via_min_drill 0.3)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.15)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 3.302 3.302)
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(pad_drill 3.302)
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(pad_to_mask_clearance 0.0762)
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(aux_axis_origin 96.52 144.78)
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(grid_origin 96.52 144.78)
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(visible_elements FFFFFF7F)
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(pcbplotparams
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(layerselection 0x000fc_80000001)
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(usegerberextensions false)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 0)
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(scaleselection 1)
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(outputdirectory ""))
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)
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(net 0 "")
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(net 1 GND)
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(net 2 +5V)
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(net 3 +3V3)
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(net 4 GPIO_SPI_CS#)
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(net 5 GPIO_UART1_TXD)
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(net 6 GPIO_SPI_MISO)
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(net 7 GPIO_UART1_RXD)
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(net 8 GPIO_SPI_MOSI)
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(net 9 GPIO_UART1_CTS)
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(net 10 GPIO_SPI_CLK)
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(net 11 GPIO_UART1_RTS)
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(net 12 GPIO_I2C_SCL)
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(net 13 GPIO_I2S_CLK)
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(net 14 GPIO_I2C_SDA)
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(net 15 GPIO_I2S_FRM)
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(net 16 GPIO_UART2_TXD)
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(net 17 GPIO_I2S_DO)
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(net 18 GPIO_UART2_RXD)
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(net 19 GPIO_I2S_DI)
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(net 20 GPIO_S5_0)
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(net 21 GPIO_PWM0)
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(net 22 GPIO_S5_1)
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(net 23 GPIO_PWM1)
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(net 24 GPIO_S5_2)
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(net 25 I2SMCLK_GPIO)
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(net_class Default "This is the default net class."
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(clearance 0.2)
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(trace_width 0.25)
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(via_dia 0.6)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(diff_pair_gap 0.25)
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(diff_pair_width 0.2)
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(add_net +3V3)
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(add_net +5V)
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(add_net GND)
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(add_net GPIO_I2C_SCL)
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(add_net GPIO_I2C_SDA)
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(add_net GPIO_I2S_CLK)
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(add_net GPIO_I2S_DI)
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(add_net GPIO_I2S_DO)
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(add_net GPIO_I2S_FRM)
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(add_net GPIO_PWM0)
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(add_net GPIO_PWM1)
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(add_net GPIO_S5_0)
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(add_net GPIO_S5_1)
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(add_net GPIO_S5_2)
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(add_net GPIO_SPI_CLK)
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(add_net GPIO_SPI_CS#)
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(add_net GPIO_SPI_MISO)
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(add_net GPIO_SPI_MOSI)
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(add_net GPIO_UART1_CTS)
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(add_net GPIO_UART1_RTS)
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(add_net GPIO_UART1_RXD)
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(add_net GPIO_UART1_TXD)
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(add_net GPIO_UART2_RXD)
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(add_net GPIO_UART2_TXD)
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(add_net I2SMCLK_GPIO)
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)
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(module Pin_Headers:Pin_Header_Straight_2x13 locked (layer F.Cu) (tedit 577F1E14) (tstamp 57710C62)
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(at 109.855 142.24 90)
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(descr "Through hole pin header")
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(tags "pin header")
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(path /576C994F)
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(fp_text reference P1 (at 1.27 -3.175 90) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value CONN_02X13 (at 5.08 3.175 180) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start -1.75 -1.75) (end -1.75 32.25) (layer F.CrtYd) (width 0.05))
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(fp_line (start 4.3 -1.75) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.75 32.25) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
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(fp_line (start 3.81 -1.27) (end 3.81 31.75) (layer F.SilkS) (width 0.15))
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(fp_line (start -1.27 1.27) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
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(fp_line (start 3.81 31.75) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
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(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
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(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
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(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 1 GND))
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(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 1 GND))
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(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 2 +5V))
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(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 3 +3V3))
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(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 4 GPIO_SPI_CS#))
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(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 5 GPIO_UART1_TXD))
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(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 6 GPIO_SPI_MISO))
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(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 7 GPIO_UART1_RXD))
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(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 8 GPIO_SPI_MOSI))
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(pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 9 GPIO_UART1_CTS))
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(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 10 GPIO_SPI_CLK))
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(pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 11 GPIO_UART1_RTS))
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(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 12 GPIO_I2C_SCL))
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(pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 13 GPIO_I2S_CLK))
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(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 14 GPIO_I2C_SDA))
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(pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 15 GPIO_I2S_FRM))
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(pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 16 GPIO_UART2_TXD))
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(pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 17 GPIO_I2S_DO))
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(pad 19 thru_hole oval (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 18 GPIO_UART2_RXD))
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(pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 19 GPIO_I2S_DI))
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(pad 21 thru_hole oval (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 20 GPIO_S5_0))
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(pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 21 GPIO_PWM0))
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(pad 23 thru_hole oval (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 22 GPIO_S5_1))
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(pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 23 GPIO_PWM1))
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(pad 25 thru_hole oval (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 24 GPIO_S5_2))
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(pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 25 I2SMCLK_GPIO))
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(model Pin_Headers.3dshapes/Pin_Header_Straight_2x13.wrl
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(at (xyz 0.05 -0.6 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 90))
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)
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)
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(module Mounting_Holes:MountingHole_3-5mm locked (layer F.Cu) (tedit 58633422) (tstamp 577DA462)
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(at 191.77 140.97)
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(descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
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(tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
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(path /58633372)
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(fp_text reference MK2 (at 0 -4.50088) (layer F.SilkS) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value Mounting_Hole (at 0 5.00126) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_circle (center 0 0) (end 3.5 0) (layer Cmts.User) (width 0.381))
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(pad 1 thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers))
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)
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(module Mounting_Holes:MountingHole_3-5mm locked (layer F.Cu) (tedit 58633418) (tstamp 577F1CAE)
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(at 100.33 140.97)
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(descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
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(tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
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(path /58633409)
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(fp_text reference MK1 (at 0 -4.50088) (layer F.SilkS) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value Mounting_Hole (at 0 5.00126) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_circle (center 0 0) (end 3.5 0) (layer Cmts.User) (width 0.381))
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(pad 1 thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers))
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)
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(module Mounting_Holes:MountingHole_3-5mm locked (layer F.Cu) (tedit 58633440) (tstamp 577F1CB9)
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(at 100.33 74.93)
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(descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
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(tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
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(path /5863348E)
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(fp_text reference MK4 (at 0 -4.50088) (layer F.SilkS) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value Mounting_Hole (at 0 5.00126) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_circle (center 0 0) (end 3.5 0) (layer Cmts.User) (width 0.381))
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(pad 1 thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers))
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)
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(module Mounting_Holes:MountingHole_3-5mm locked (layer F.Cu) (tedit 58633432) (tstamp 577F1CC4)
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(at 191.77 74.93)
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(descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
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(tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
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(path /58633454)
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(fp_text reference MK3 (at 0 -4.50088) (layer F.SilkS) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value Mounting_Hole (at 0 5.00126) (layer F.Fab) hide
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|
(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_circle (center 0 0) (end 3.5 0) (layer Cmts.User) (width 0.381))
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(pad 1 thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers))
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)
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(gr_line (start 96.52 110.15) (end 96.52 144.78) (layer Edge.Cuts) (width 0.2))
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(gr_line (start 195.58 96.83) (end 195.58 71.12) (angle 90) (layer Edge.Cuts) (width 0.15) (tstamp 586C5EA2))
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(gr_text "NOTE: NO BOTTOM SIDE OR THROUGH-HOLE\nCOMPONENTS IN THE AREAS DESIGNATED IN THE\nDWGS.USER LAYER TO AVOID COLLISION WITH\nMINNOWBOARD ETHERNET AND USB CONNECTORS." (at 66.421 101.092) (layer Cmts.User)
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(effects (font (size 1.5 1.5) (thickness 0.3)))
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)
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(gr_line (start 178.86 112.02) (end 195.58 96.83) (angle 90) (layer Dwgs.User) (width 0.2))
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(gr_line (start 178.86 96.83) (end 195.58 112.02) (angle 90) (layer Dwgs.User) (width 0.2))
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(gr_line (start 114.96 92.05) (end 96.52 110.15) (angle 90) (layer Dwgs.User) (width 0.2))
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(gr_line (start 96.52 92.05) (end 114.96 110.15) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 96.52 110.15) (end 96.52 92.05) (angle 90) (layer Edge.Cuts) (width 0.2))
|
|
(gr_line (start 114.96 110.15) (end 96.52 110.15) (angle 90) (layer Dwgs.User) (width 0.2))
|
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(gr_line (start 114.96 92.05) (end 114.96 110.15) (angle 90) (layer Dwgs.User) (width 0.2))
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(gr_line (start 96.52 92.05) (end 114.96 92.05) (angle 90) (layer Dwgs.User) (width 0.2))
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(gr_line (start 178.86 112.02) (end 178.86 96.83) (angle 90) (layer Dwgs.User) (width 0.15))
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(gr_line (start 195.58 112.02) (end 178.86 112.02) (angle 90) (layer Dwgs.User) (width 0.15))
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(gr_line (start 195.58 96.83) (end 195.58 112.02) (angle 90) (layer Edge.Cuts) (width 0.15))
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(gr_line (start 178.86 96.83) (end 195.58 96.83) (angle 90) (layer Dwgs.User) (width 0.15))
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(target plus (at 96.52 144.78) (size 5) (width 0.15) (layer Edge.Cuts))
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(gr_line (start 96.52 71.12) (end 96.52 92.05) (angle 90) (layer Edge.Cuts) (width 0.15))
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(gr_line (start 195.58 71.12) (end 96.52 71.12) (angle 90) (layer Edge.Cuts) (width 0.15))
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(gr_line (start 195.58 144.78) (end 195.58 112.02) (angle 90) (layer Edge.Cuts) (width 0.15))
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(gr_line (start 96.52 144.78) (end 195.58 144.78) (angle 90) (layer Edge.Cuts) (width 0.15))
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)
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