321 lines
13 KiB
Plaintext
Executable file
321 lines
13 KiB
Plaintext
Executable file
(kicad_pcb (version 4) (host pcbnew 4.0.5)
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(general
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(links 0)
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(no_connects 0)
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(area 143.424999 124.924999 228.575001 181.075001)
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(thickness 1.6)
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(drawings 41)
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(tracks 0)
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(zones 0)
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(modules 1)
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(nets 27)
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)
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(page A3)
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(title_block
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(date "15 nov 2012")
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)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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)
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(setup
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(last_trace_width 0.2)
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(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.1524)
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(segment_width 0.2)
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(edge_width 0.15)
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(via_size 0.9)
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(via_drill 0.6)
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(via_min_size 0.8)
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(via_min_drill 0.5)
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(uvia_size 0.5)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.5)
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(uvia_min_drill 0.1)
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(pcb_text_width 0.3)
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(pcb_text_size 1 1)
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(mod_edge_width 0.15)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1 1)
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(pad_drill 0.6)
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(pad_to_mask_clearance 0)
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(aux_axis_origin 143.5 181)
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(visible_elements 7FFFFFFF)
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(pcbplotparams
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(layerselection 0x00030_80000001)
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(usegerberextensions true)
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(excludeedgelayer true)
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(linewidth 0.150000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15)
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(hpglpenoverlay 2)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory ""))
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)
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(net 0 "")
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(net 1 +5V)
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(net 2 GND)
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(net 3 +3V3)
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(net 4 "/GPIO0(SDA)")
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(net 5 "Net-(P1-Pad4)")
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(net 6 "/GPIO1(SCL)")
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(net 7 /GPIO4)
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(net 8 /TXD)
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(net 9 "Net-(P1-Pad9)")
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(net 10 /RXD)
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(net 11 /GPIO17)
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(net 12 /GPIO18)
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(net 13 /GPIO21)
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(net 14 "Net-(P1-Pad14)")
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(net 15 /GPIO22)
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(net 16 /GPIO23)
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(net 17 "Net-(P1-Pad17)")
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(net 18 /GPIO24)
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(net 19 "/GPIO10(MOSI)")
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(net 20 "Net-(P1-Pad20)")
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(net 21 "/GPIO9(MISO)")
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(net 22 /GPIO25)
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(net 23 "/GPIO11(SCLK)")
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(net 24 "/GPIO8(CE0)")
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(net 25 "Net-(P1-Pad25)")
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(net 26 "/GPIO7(CE1)")
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(net_class Default "This is the default net class."
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(clearance 0.2)
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(trace_width 0.2)
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(via_dia 0.9)
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(via_drill 0.6)
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(uvia_dia 0.5)
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(uvia_drill 0.1)
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(add_net +3V3)
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(add_net +5V)
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(add_net "/GPIO0(SDA)")
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(add_net "/GPIO1(SCL)")
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(add_net "/GPIO10(MOSI)")
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(add_net "/GPIO11(SCLK)")
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(add_net /GPIO17)
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(add_net /GPIO18)
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(add_net /GPIO21)
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(add_net /GPIO22)
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(add_net /GPIO23)
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(add_net /GPIO24)
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(add_net /GPIO25)
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(add_net /GPIO4)
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(add_net "/GPIO7(CE1)")
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(add_net "/GPIO8(CE0)")
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(add_net "/GPIO9(MISO)")
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(add_net /RXD)
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(add_net /TXD)
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(add_net GND)
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(add_net "Net-(P1-Pad14)")
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(add_net "Net-(P1-Pad17)")
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(add_net "Net-(P1-Pad20)")
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(add_net "Net-(P1-Pad25)")
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(add_net "Net-(P1-Pad4)")
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(add_net "Net-(P1-Pad9)")
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)
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(net_class Power ""
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(clearance 0.2)
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(trace_width 0.5)
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(via_dia 1)
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(via_drill 0.7)
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(uvia_dia 0.5)
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(uvia_drill 0.1)
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)
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(module Pin_Headers:Pin_Header_Straight_2x13 locked (layer F.Cu) (tedit 584FB37B) (tstamp 584FB325)
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(at 145.75536 130.27914 90)
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(descr "Through hole pin header")
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(tags "pin header")
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(path /50A55ABA)
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(fp_text reference P1 (at 1.5875 32.6136 90) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value CONN_13X2 (at -2.37998 16.29664 180) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start -1.75 -1.75) (end -1.75 32.25) (layer F.CrtYd) (width 0.05))
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(fp_line (start 4.3 -1.75) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.75 32.25) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
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(fp_line (start 3.81 -1.27) (end 3.81 31.75) (layer F.SilkS) (width 0.15))
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(fp_line (start -1.27 1.27) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
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(fp_line (start 3.81 31.75) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
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(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
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(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
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(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 3 +3V3))
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(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 1 +5V))
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(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 4 "/GPIO0(SDA)"))
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(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 5 "Net-(P1-Pad4)"))
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(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 6 "/GPIO1(SCL)"))
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(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 2 GND))
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(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 7 /GPIO4))
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(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 8 /TXD))
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(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 9 "Net-(P1-Pad9)"))
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(pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 10 /RXD))
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(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 11 /GPIO17))
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(pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 12 /GPIO18))
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(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 13 /GPIO21))
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(pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 14 "Net-(P1-Pad14)"))
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(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 15 /GPIO22))
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(pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 16 /GPIO23))
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(pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 17 "Net-(P1-Pad17)"))
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(pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 18 /GPIO24))
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(pad 19 thru_hole oval (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 19 "/GPIO10(MOSI)"))
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(pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 20 "Net-(P1-Pad20)"))
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(pad 21 thru_hole oval (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 21 "/GPIO9(MISO)"))
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(pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 22 /GPIO25))
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(pad 23 thru_hole oval (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 23 "/GPIO11(SCLK)"))
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(pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 24 "/GPIO8(CE0)"))
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(pad 25 thru_hole oval (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 25 "Net-(P1-Pad25)"))
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(pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 26 "/GPIO7(CE1)"))
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(model Pin_Headers.3dshapes/Pin_Header_Straight_2x13.wrl
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(at (xyz 0.05 -0.6 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 90))
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)
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)
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(gr_text "RASPBERRY-PI ADDON BOARD\nVIEW FROM TOP\nNOTE: P1 SHOULD BE FITTED ON THE REVERSE OF THE BOARD" (at 144 183.5) (layer Dwgs.User)
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(effects (font (size 2 1.7) (thickness 0.12)) (justify left))
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)
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(dimension 56 (width 0.12) (layer Dwgs.User)
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(gr_text "56.000 mm" (at 132 153 90) (layer Dwgs.User)
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(effects (font (size 1 1) (thickness 0.12)))
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)
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(feature1 (pts (xy 143.5 125) (xy 131 125)))
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(feature2 (pts (xy 143.5 181) (xy 131 181)))
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(crossbar (pts (xy 133 181) (xy 133 125)))
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(arrow1a (pts (xy 133 125) (xy 133.58642 126.126503)))
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(arrow1b (pts (xy 133 125) (xy 132.41358 126.126503)))
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(arrow2a (pts (xy 133 181) (xy 133.58642 179.873497)))
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(arrow2b (pts (xy 133 181) (xy 132.41358 179.873497)))
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)
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(dimension 85 (width 0.12) (layer Dwgs.User)
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(gr_text "85.000 mm" (at 186 113.000001) (layer Dwgs.User)
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(effects (font (size 1 1) (thickness 0.12)))
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)
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(feature1 (pts (xy 228.5 125) (xy 228.5 112.000001)))
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(feature2 (pts (xy 143.5 125) (xy 143.5 112.000001)))
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(crossbar (pts (xy 143.5 114.000001) (xy 228.5 114.000001)))
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(arrow1a (pts (xy 228.5 114.000001) (xy 227.373497 114.586421)))
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(arrow1b (pts (xy 228.5 114.000001) (xy 227.373497 113.413581)))
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(arrow2a (pts (xy 143.5 114.000001) (xy 144.626503 114.586421)))
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(arrow2b (pts (xy 143.5 114.000001) (xy 144.626503 113.413581)))
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)
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(gr_text "RCA\nREMOVE WITH\nSTD HEADERS\n!NO TH ABOVE!" (at 188.5 118) (layer Dwgs.User)
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(effects (font (size 1 1) (thickness 0.12)))
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)
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(gr_text "1/8\" JACK\nOK WITH STD\nHEADERS\n!NO TH ABOVE!" (at 207.5 118) (layer Dwgs.User)
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(effects (font (size 1 1) (thickness 0.12)))
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)
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(gr_line (start 228.5 142) (end 228.5 125) (angle 90) (layer Edge.Cuts) (width 0.15))
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(gr_line (start 217.5 142) (end 228.5 142) (angle 90) (layer Edge.Cuts) (width 0.15))
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(gr_line (start 217.5 157) (end 217.5 142) (angle 90) (layer Edge.Cuts) (width 0.15))
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(gr_line (start 228.5 157) (end 217.5 157) (angle 90) (layer Edge.Cuts) (width 0.15))
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(gr_line (start 228.5 181) (end 228.5 157) (angle 90) (layer Edge.Cuts) (width 0.15))
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(gr_text "DOUBLE USB\nCUTOUT FOR ALL\nBOARDS" (at 236.5 149) (layer Dwgs.User)
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(effects (font (size 1 1) (thickness 0.12)))
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)
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(gr_text "RJ45\nCUTOUT FOR STD\nHEADERS\n!NO TH ABOVE!" (at 236.5 170) (layer Dwgs.User)
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(effects (font (size 1 1) (thickness 0.12)))
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)
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(gr_line (start 207.5 181) (end 228.5 162) (angle 90) (layer Dwgs.User) (width 0.2))
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(gr_line (start 207.5 162) (end 228.5 181) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 207.5 162) (end 228.5 162) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 207.5 181) (end 207.5 162) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 228.5 181) (end 207.5 181) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 228.5 162) (end 228.5 181) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 217.5 157) (end 228.5 142) (angle 90) (layer Dwgs.User) (width 0.2))
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(gr_line (start 217.5 142) (end 228.5 157) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 217.5 142) (end 228.5 142) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 217.5 157) (end 217.5 142) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 228.5 157) (end 217.5 157) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 228.5 142) (end 228.5 157) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 182.5 125) (end 194.5 139) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 182.5 139) (end 194.5 125) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 194.5 139) (end 194.5 138) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 182.5 139) (end 194.5 139) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 182.5 138) (end 182.5 139) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 214.5 125) (end 200.5 138) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 200.5 125) (end 214.5 138) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 200.5 138) (end 200.5 125) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 214.5 138) (end 200.5 138) (angle 90) (layer Dwgs.User) (width 0.2))
|
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(gr_line (start 214.5 125) (end 214.5 138) (angle 90) (layer Dwgs.User) (width 0.2))
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(gr_line (start 200.5 125) (end 214.5 125) (angle 90) (layer Dwgs.User) (width 0.2))
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(gr_line (start 194.5 125) (end 182.5 125) (angle 90) (layer Dwgs.User) (width 0.2))
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(gr_line (start 194.5 138) (end 194.5 125) (angle 90) (layer Dwgs.User) (width 0.2))
|
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(gr_line (start 182.5 125) (end 182.5 138) (angle 90) (layer Dwgs.User) (width 0.2))
|
|
(gr_line (start 228.5 125) (end 143.5 125) (angle 90) (layer Edge.Cuts) (width 0.15))
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|
(gr_line (start 143.5 181) (end 228.5 181) (angle 90) (layer Edge.Cuts) (width 0.15))
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(gr_line (start 143.5 125) (end 143.5 181) (angle 90) (layer Edge.Cuts) (width 0.15))
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)
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