KicadLib/library/intersil.lib
Gabe R e92b21b43d
Merging from Master (#7)
* reworked MAX77x (datasheet, symbol, missing variants, description ..)

* reworked MC33063-family (symbol, missing variants, footprints, description, ...)

* reworked MC34063 family as alias to MC33063 family

* reworked MCP16301 (symbol, pin-type, description)

* reworked MCP16311/2 (symbol, description, name without -, ...)

* reworked MCP16331 (symbol, pin-type, naming without -...)

* reworked MCP1640 family (symbol, naming wiothout -, ...)

* corrected some descriptions

* reworked MCP165x family (symbol, description)

* reworked MIC2177 (datasheet, symbol, pin-stacks, description...)

* added fixed-output variants of MIC2177

* added MIC2178 family

* reworked MIC4690 (stacked-pins, symbol, description...)

* reworked NID60-series (symbol, stacked-pins, footprint, FPFilter, description)
added NID30-series (footprint available from https://github.com/KiCad/Converters_DCDC_ACDC.pretty/pull/25)

* reworked NMAxxyyDC/SC-series (symbol, isolation bars, ...)

* reworked NXE2-series (NC-pin location, description, ...)

* reworked PAM2305 series (missing variants, symbols, description...)

* removed very obsolete PT6100 (no footprint, no description available anymore ...)

* reworked R-78E-series (description)

* Added 3D models for ZETA-433-SO

* Added Foot print name

* Added Foot print name

* reworked R78-Zxx-yy series from RECOM (symbol, added missing variants, footprints from https://github.com/KiCad/Converters_DCDC_ACDC.pretty/pull/26)

* Updated description of 868 and 915 MHz

* Made fields invisible

* reworked ST1CC40 (symbol, package-variants, wrong pinout and package, description, ...)

* Add Johansen chip antenna

* Add symbol for MAX6971 LED driver.

http://datasheets.maximintegrated.com/en/ds/MAX6971.pdf

* Move Parallax Propeller to its own library.

* The DIP version of the Propeller has two VDD pins and two VSS pins.

* reworked ST1S10 family (footprints, description, symbols...)

* reworked ST1S14PHR (symbol, missing PAD-pin, footprint, description, ...)

* reworked Traco TEN20-series (symbol, isolation barrier, pin-position, description, ...)

* reworked TL497 family (symbol, pin-types, description, FPFilters, ...)

* reworked TMR_1 series (description...)

* reworked TPS5431 (missing NCs, pin-types, description, footprint from https://github.com/KiCad/Housings_SOIC.pretty/pull/35...)

* reworked TPS54340/TPS54360 (footprint, pin-types, description...)

* reworked TPS560200 (description, ...)

* reworked TPS56x200 (description, ...)

* reworked TPS6050xDGS (pin-types, description, FPFilter, ...)

* reworked TPS6120x (symbol, pin-location, description, footpritns, see https://github.com/KiCad/Housings_SON.pretty/pull/19)

* reworked TPS621xy families (dscription, missing variants)

* Removed Antenna.lib, added Antenna_Chip to device.lib

* reworked TPS62xyz (missing variants, footprints, FPFilters, split by package, symbol, pin-types, description, ...)

* added scripted Wuerth Mapi inductor models

* reworked TPS6217xDQC (description, footprint from https://github.com/KiCad/Housings_SON.pretty/pull/20 ...)

* added description to TPS62175DQC

* reworked TPS6220xDBV (symbol, description, ...)

* reworked TSR-1 series (description, symbol, ...)

* fixed some KLC issues

* reworked ADG729

* added ADG728

* removed CPC1017N which is already in opto.lib

* Changed Antenna_Chip to use a resonator symbol

* reworked DG308/DG309/DG441/DG442

* Fix naming for Schurter FUP 3d models.

* Reduce pin length, text offset and body width of MCP45HVx1.

* FRSolutions: Add the Particle P1 WiFi module

* rfcom: Update footprint of ESP-12E

* rfcom: Update footprint of ESP-12E

* moved symbols from texas.lib and siliconi.lib to analog_switches.lib

* Copy connector shape from USB_OTG to USB_B_Micro.

I recently added the USB_B_Micro symbol (and an alias, USB_B_Mini).  I
hadn't noticed that there was already a similar USB_OTG symbol.

However, the two need to remain separate, because USB_OTG has VBUS and
GND marked as power inputs, while USB_B_Micro has them as power
outputs.

This commit makes USB_B_Micro identical to USB_OTG, except for the
direction of the power pins.  Specifically, it copies the connector
shape from USB_OTG to USB_B_Micro.  (I had been too lazy to draw the
connector shape when I created USB_B_Micro.)

* added missing NC-pins
fixed naming
added DG411/DG412/DG413 family

* Added FAN3268 to ON Semiconductor library.

* added DG417/DG418/DG419 and its variants ADG417/ADG419, MAX317/MAX318/MAX319

* corrected label location

* Added 3D models for SW_SP3T_PCM13 and SW_SPDT_PCM12

* added DG417L/DG418L/DG419L
fixed several minor issues (typos, wrong symbols, ...)

* Combined bosch.lib and Bosch.lib

* Don't update library version

* RFSolutions: Rename P1 to Particle_P1

* LED: Add CLV1L-FKB

* LED: CLV1L-FKB remove trademark symbol from description

* fixed several swicthes (wrong normally settings) + added DG41x-variants from Maxim and other companies, as Maxim does not have the separate Vlogic pin!

* added/reworked DG9421/DG9422 (package posted as https://github.com/KiCad/Housings_SSOP.pretty/pull/51)

* reworked DG884

* Added name of package to description (FAN3268)

* reworked FSA3157/NC7SB3157 (symbol, ...footprint from https://github.com/KiCad/Housings_SON.pretty/pull/21)

* Update fp-lib-table.for-github

* Update fp-lib-table.for-pretty

* reworked TS5A3159/TS5A3160 (split by footprint, added missing variants, description, symbol, footprint from https://github.com/KiCad/Housings_BGA.pretty/pull/26)

* rework HI524 (symbol, description, datasheet, footprint)

* moved LCC110 to opto.lib and reworked symbol (footprint, symbol, ...)

* moved LAA110, LB110 from analog_switches to opto.lib and reimplemented as ALIAS

* added MAX312/313/314 family as ALIASes

* added MAX323/324/325 series

* fixed KLC issues (font-size, wrong FPFilters)

* #IM fixed power-pin stack

* update LTC2309

stack GND and VDD pins allowing for same schematic on both chips.
Minor changes to adhere to KLC.

* Added 3D models for dip switches

* Updated according to PR feedback

* Add TDA1308

Schematic library for the class-AB stereo headphone driver by NXP

Signed-off-by: Adam Heinrich <adam@adamh.cz>

* Rename Cortex Debug Connector, add FP filter

- Renamed Cortex Debug Connector from `Conn_ARM_Cortex-Debug` to `CMP Conn_ARM_JTAG_SWD_10`
- Added FP filter `Conn*:*_2x*` for KiCad v5

* Oscillators: Add SG3030CM

* Removed CVS type

* Removed CVS type

* Updated leg and pad size

* pspice: Add MOSFET symbols

* Add cross 4p net tie

* Add cross 4p net tie

* Add symbol LED_BGRA.

This is the pinout used by "Piranha" RGB LEDs.  See that pull request
for more information.

* Add "LED*" footprint filter to LED symbols in "device" library.

Also:

* Added "~" datasheet to LED symbols to suppress KLC errors.
* Corrected cases where fields 2 and 3 were not invisible.

Did not attempt to correct other pre-existing KLC errors.  (Pin placement.)

* move symbol and package name, add potentiometer symbol inside.

* Move footprint name more to the right.

* Oscillators: Fix pin offset in SG-3030CM

* Separate power pins on generic opamps

* Update generic opamps symbols

* Add x cap discharge ICs

* Add x cap discharge ICs

* Oscillators: Rename SG3030CM footprint to comply with KLC

* Add TI OPA356 and OPA2356 operational amplifiers

They use the same pinout as existing devices, so they are just new
aliases.

* Update atmel.lib

* Added 3d part for Bosch LGA-8_2.5x2.5mm_Pitch0.65mm package, BME280 and BME680

* Corrected vent hole position, corrected marker pad position, pad numbering starts clockwise from right side

* MCU_Texas_MSP430: fix G2553

* Update fp-lib-table.for-github

* Update fp-lib-table.for-pretty

* Update fp-lib-table.for-pretty

* Update fp-lib-table.for-github

* Add TI OPA1622 operational amplifier

* - removed unneeded D-SUB 3D models
- moved bornierXX 3D models

* renamed bornier 3D models

* - moved Phoenix 3D models to correct location

* fixed D-SUB FPFilters for new footprints

* revert DSUB-fixes (will do separately)

* Added the Analog Devices ADP2302ARDZ

* visual enhancements as requested

* Added the Microchip MCP1825S 500mA LDO Regulator

* Update net ties

* Update net ties

* Fixed keywords, modified pin name offset, fixed pin type (FAN3268).

* Clearing an error in STM32L071/STM32L072 loading libs

* Add PD70224

* Add PD70224

* Fixed dot location

* Add "T" 3-pin net tie

* Add "T" 3-pin net tie

* Remove duplicated polylines in net ties

* Removed the errored lines altogether.

* Add OPA890 operational amplifier in SOT23-6 package

* Add Allegro current sensors

* Updated sym_lib_table file

* Added TJA1052i

* Added Alias

Alias for different isolation voltages

* Set pointing

* Added isolation lines

* Replaced illegal character

* fix sym-lib-table typos ang missing Logic_ prefixes

* added LSM303C and LSM6DS3

* Fix footprint filter

* hopefully final fixups

* MCU_Texas_MSP430: update keywords

* MCU_Texas_MSP430: update description

- do not duplicate part name (KLC 3.0.2 S6.3)
- append simplified footprint name (KLC 3.0.2 S6.3)

* MCU_Texas_MSP430: update documentation file

Always use a symlink based on the actual part number, even if multiple
devices share the same data sheet.

* Added better descriptions for symbol libraries

* Add TPS2592xx

Schematic library for the 5V/12V eFuse protection switch by TI

Signed-off-by: Adam Heinrich <adam@adamh.cz>

* Moved nc pins and made them visible

* Fixed Stacking & Naming

* Add TPS22929D power distribution switch

* - adjusted names of the symbols to the new KLC

* Added TPS61090, TPS61091, and TPS61092 boost converters.

* added TPD3E001DRLR TPD2E2U06

* updated to resolve jenkins issues

* Updated to address automated script issues

* Fixed additional errors

* Fixed ground pin alignment

* Updated footprint

* Microchip: SY89312V

3.3/5V, ECL/PECL 4GHz x2 clock divider

Documentation:
http://ww1.microchip.com/downloads/en/DeviceDoc/sy89312v.pdf

* fixed library version to make these workable with KiCAD 4.0.7 (see https://github.com/KiCad/kicad-library/issues/1838)

* removed whiteline that lead to error

* changed model name as per footprint, rotated 90 degree CCW, ofset 0,0,0

* Add Analog Devices ADP5070/5071 switching regulators

* Adjusted the PIC12 symbol names to the new KLC

* Changed pin order

* fixed several issues in transistors.lib/dcm:
- unified naming/description
- fixed some packages (e.g. TO-220-variants had wrong names)
- fixed wrong BF245/244 symbols (https://github.com/KiCad/kicad-library/issues/1843#issuecomment-345438714)
- added BF545
- added some missing datasheets

* Removed unnecessary changes to rest of the file

* - removed non-existent device from DCM (that device really is not produced!)
- fixed one description (package type)

* Update .travis.yml

Remove sudo requirement
2017-11-21 00:48:35 -07:00

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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# EL7202CN
#
DEF EL7202CN U 0 40 Y Y 1 F N
F0 "U" -100 500 50 H V R CNN
F1 "EL7202CN" -100 400 50 H V R CNN
F2 "" 0 -300 50 H I C CNN
F3 "" 0 -300 50 H I C CNN
$FPLIST
DIP*W7.62mm*
SOIC-8*Pitch1.27mm*
$ENDFPLIST
DRAW
S -400 -350 400 350 0 1 10 f
X NC 1 -600 300 200 R 50 50 1 1 N N
X IN_A 2 -600 100 200 R 50 50 1 1 I
X GND 3 0 -500 150 U 50 50 1 1 W
X IN_B 4 -600 -100 200 R 50 50 1 1 I
X OUT_B 5 600 -100 200 L 50 50 1 1 O
X V+ 6 0 500 150 D 50 50 1 1 W
X OUT_A 7 600 100 200 L 50 50 1 1 O
X NC 8 600 300 200 L 50 50 1 1 N N
ENDDRAW
ENDDEF
#
# EL7212CN
#
DEF EL7212CN U 0 40 Y Y 1 F N
F0 "U" -100 500 50 H V R CNN
F1 "EL7212CN" -100 400 50 H V R CNN
F2 "" 0 -300 50 H I C CNN
F3 "" 0 -300 50 H I C CNN
$FPLIST
DIP*W7.62mm*
SOIC*Pitch1.27mm*
$ENDFPLIST
DRAW
S -400 -350 400 350 0 1 10 f
X NC 1 -600 300 200 R 50 50 1 1 N N
X IN_A 2 -600 100 200 R 50 50 1 1 I
X GND 3 0 -500 150 U 50 50 1 1 W
X IN_B 4 -600 -100 200 R 50 50 1 1 I
X OUT_B 5 600 -100 200 L 50 50 1 1 O I
X V+ 6 0 500 150 D 50 50 1 1 W
X OUT_A 7 600 100 200 L 50 50 1 1 O I
X NC 8 600 300 200 L 50 50 1 1 N N
ENDDRAW
ENDDEF
#
# EL7222CN
#
DEF EL7222CN U 0 40 Y Y 1 F N
F0 "U" -100 500 50 H V R CNN
F1 "EL7222CN" -100 400 50 H V R CNN
F2 "" 0 -300 50 H I C CNN
F3 "" 0 -300 50 H I C CNN
$FPLIST
DIP*W7.62mm*
SOIC*Pitch1.27mm*
$ENDFPLIST
DRAW
S -400 -350 400 350 0 1 10 f
X NC 1 -600 300 200 R 50 50 1 1 N N
X IN_A 2 -600 100 200 R 50 50 1 1 I
X GND 3 0 -500 150 U 50 50 1 1 W
X IN_B 4 -600 -100 200 R 50 50 1 1 I
X OUT_B 5 600 -100 200 L 50 50 1 1 O
X V+ 6 0 500 150 D 50 50 1 1 W
X OUT_A 7 600 100 200 L 50 50 1 1 O I
X NC 8 600 300 200 L 50 50 1 1 N N
ENDDRAW
ENDDEF
#
# HIP2100EIB
#
DEF HIP2100EIB U 0 40 Y Y 1 F N
F0 "U" 0 525 50 H V C CNN
F1 "HIP2100EIB" 0 450 50 H V C CNN
F2 "Housings_SOIC:SOIC-8-1EP_3.9x4.9mm_Pitch1.27mm" 0 0 50 H I C CIN
F3 "" 0 -550 50 H I C CNN
ALIAS HIP2101EIB
$FPLIST
SOIC*1EP*3.9x4.9mm*Pitch1.27mm*
$ENDFPLIST
DRAW
S -200 -400 200 400 0 1 10 f
X VDD 1 -300 300 100 R 50 50 1 1 W
X HB 2 300 300 100 L 50 50 1 1 W
X HO 3 300 -100 100 L 50 50 1 1 O
X HS 4 300 -200 100 L 50 50 1 1 P
X HI 5 -300 -100 100 R 50 50 1 1 I
X LI 6 -300 -200 100 R 50 50 1 1 I
X VSS 7 -300 -300 100 R 50 50 1 1 W
X LO 8 300 -300 100 L 50 50 1 1 O
X EP 9 0 -500 100 U 50 50 1 1 O
ENDDRAW
ENDDEF
#
# HIP2100IB
#
DEF HIP2100IB U 0 40 Y Y 1 F N
F0 "U" 0 525 50 H V C CNN
F1 "HIP2100IB" 0 450 50 H V C CNN
F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 0 50 H I C CIN
F3 "" 0 -550 50 H I C CNN
ALIAS HIP2101IB
$FPLIST
SOIC*3.9x4.9mm*Pitch1.27mm*
$ENDFPLIST
DRAW
S -200 -400 200 400 0 1 10 f
X VDD 1 -300 300 100 R 50 50 1 1 W
X HB 2 300 300 100 L 50 50 1 1 W
X HO 3 300 -100 100 L 50 50 1 1 O
X HS 4 300 -200 100 L 50 50 1 1 P
X HI 5 -300 -100 100 R 50 50 1 1 I
X LI 6 -300 -200 100 R 50 50 1 1 I
X VSS 7 -300 -300 100 R 50 50 1 1 W
X LO 8 300 -300 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# HIP2100IR
#
DEF HIP2100IR U 0 40 Y Y 1 F N
F0 "U" 0 525 50 H V C CNN
F1 "HIP2100IR" 0 450 50 H V C CNN
F2 "Housings_DFN_QFN:QFN-16-1EP_5x5mm_Pitch0.8mm" 0 0 50 H I C CIN
F3 "" 0 -550 50 H I C CNN
ALIAS HIP2101IR
$FPLIST
QFN*1EP*5x5mm*Pitch0.8mm*
$ENDFPLIST
DRAW
S -200 -400 200 400 0 1 10 f
X NC 1 -300 200 100 R 50 50 1 1 N N
X HB 2 300 300 100 L 50 50 1 1 W
X HO 3 300 -100 100 L 50 50 1 1 O
X NC 4 -300 100 100 R 50 50 1 1 N N
X NC 5 -300 0 100 R 50 50 1 1 N N
X HS 6 300 -200 100 L 50 50 1 1 P
X HI 7 -300 -100 100 R 50 50 1 1 I
X NC 8 -300 -400 100 R 50 50 1 1 N N
X NC 9 300 200 100 L 50 50 1 1 N N
X LI 10 -300 -200 100 R 50 50 1 1 I
X VSS 11 -300 -300 100 R 50 50 1 1 W
X NC 12 300 100 100 L 50 50 1 1 N N
X NC 13 300 0 100 L 50 50 1 1 N N
X LO 14 300 -300 100 L 50 50 1 1 O
X NC 15 300 -400 100 L 50 50 1 1 N N
X VDD 16 -300 300 100 R 50 50 1 1 W
X EP 17 0 -500 100 U 50 50 1 1 O
ENDDRAW
ENDDEF
#
# HIP2100IR4
#
DEF HIP2100IR4 U 0 40 Y Y 1 F N
F0 "U" 0 525 50 H V C CNN
F1 "HIP2100IR4" 0 450 50 H V C CNN
F2 "Housings_DFN_QFN:DFN-12-1EP_4x4mm_Pitch0.5mm" 0 0 50 H I C CIN
F3 "" 0 -550 50 H I C CNN
ALIAS HIP2101IR4
$FPLIST
DFN*1EP*4x4mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -200 -400 200 400 0 1 10 f
X VDD 1 -300 300 100 R 50 50 1 1 W
X NC 2 -300 200 100 R 50 50 1 1 N N
X NC 3 -300 100 100 R 50 50 1 1 N N
X HB 4 300 300 100 L 50 50 1 1 W
X HO 5 300 -100 100 L 50 50 1 1 O
X HS 6 300 -200 100 L 50 50 1 1 P
X HI 7 -300 -100 100 R 50 50 1 1 I
X LI 8 -300 -200 100 R 50 50 1 1 I
X NC 9 300 200 100 L 50 50 1 1 N N
X NC 10 300 100 100 L 50 50 1 1 N N
X VSS 11 -300 -300 100 R 50 50 1 1 W
X LO 12 300 -300 100 L 50 50 1 1 O
X EP 13 0 -500 100 U 50 50 1 1 O
ENDDRAW
ENDDEF
#
# HIP4080A
#
DEF HIP4080A U 0 40 Y Y 1 F N
F0 "U" 200 850 50 H V L CNN
F1 "HIP4080A" 200 750 50 H V L CNN
F2 "" -50 150 50 H I C CIN
F3 "" -50 -400 50 H I C CNN
$FPLIST
SOIC*7.5x12.8mm*Pitch1.27mm*
DIP*W7.62mm*
$ENDFPLIST
DRAW
S -400 -700 400 700 0 1 10 f
X BHB 1 500 600 100 L 50 50 1 1 I
X HEN 2 -500 600 100 R 50 50 1 1 O
X DIS 3 -500 500 100 R 50 50 1 1 O
X VSS 4 0 -800 100 U 50 50 1 1 W
X OUT 5 -500 200 100 R 50 50 1 1 O
X IN+ 6 -500 -200 100 R 50 50 1 1 I
X IN- 7 -500 -300 100 R 50 50 1 1 I
X HDEL 8 -500 -500 100 R 50 50 1 1 P
X LDEL 9 -500 -600 100 R 50 50 1 1 P
X AHB 10 500 500 100 L 50 50 1 1 I
X BHO 20 500 200 100 L 50 50 1 1 O
X AHO 11 500 -600 100 L 50 50 1 1 O
X AHS 12 500 -500 100 L 50 50 1 1 P
X ALO 13 500 -400 100 L 50 50 1 1 O
X ALS 14 500 -300 100 L 50 50 1 1 P
X VCC 15 -100 800 100 D 50 50 1 1 W
X VDD 16 100 800 100 D 50 50 1 1 W
X BLS 17 500 -100 100 L 50 50 1 1 P
X BLO 18 500 0 100 L 50 50 1 1 O
X BHS 19 500 100 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# HIP4081A
#
DEF HIP4081A U 0 40 Y Y 1 F N
F0 "U" 200 850 50 H V L CNN
F1 "HIP4081A" 200 750 50 H V L CNN
F2 "" -50 150 50 H I C CIN
F3 "" -50 -400 50 H I C CNN
$FPLIST
SOIC*7.5x12.8mm*Pitch1.27mm*
DIP*W7.62mm*
$ENDFPLIST
DRAW
S -400 -700 400 700 0 1 10 f
X BHB 1 500 600 100 L 50 50 1 1 I
X BHI 2 -500 0 100 R 50 50 1 1 I
X DIS 3 -500 600 100 R 50 50 1 1 O
X VSS 4 0 -800 100 U 50 50 1 1 W
X BLI 5 -500 -100 100 R 50 50 1 1 I
X ALI 6 -500 100 100 R 50 50 1 1 I
X AHI 7 -500 200 100 R 50 50 1 1 I
X HDEL 8 -500 -500 100 R 50 50 1 1 P
X LDEL 9 -500 -600 100 R 50 50 1 1 P
X AHB 10 500 500 100 L 50 50 1 1 I
X BHO 20 500 200 100 L 50 50 1 1 O
X AHO 11 500 -600 100 L 50 50 1 1 O
X AHS 12 500 -500 100 L 50 50 1 1 P
X ALO 13 500 -400 100 L 50 50 1 1 O
X ALS 14 500 -300 100 L 50 50 1 1 P
X VCC 15 -100 800 100 D 50 50 1 1 W
X VDD 16 100 800 100 D 50 50 1 1 W
X BLS 17 500 -100 100 L 50 50 1 1 P
X BLO 18 500 0 100 L 50 50 1 1 O
X BHS 19 500 100 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# ICL7673CBAZA
#
DEF ICL7673CBAZA U 0 40 Y Y 1 F N
F0 "U" -240 250 50 H V C CNN
F1 "ICL7673CBAZA" 150 250 50 H V L CNN
F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 40 -450 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SOIC*3.9x4.9mm*Pitch1.27mm*
$ENDFPLIST
DRAW
X VO 1 500 100 100 L 50 50 1 0 w
X VS 2 100 300 100 D 50 50 1 0 W
X SBAR 3 500 0 100 L 50 50 1 0 C
X GND 4 0 -300 100 U 50 50 1 0 W
X NC 5 -200 -300 100 U 50 50 1 0 N N
X PBAR 6 500 -100 100 L 50 50 1 0 C
X NC 7 -100 -300 100 U 50 50 1 0 N N
X VP 8 0 300 100 D 50 50 1 0 W
S -300 200 400 -200 0 1 10 f
ENDDRAW
ENDDEF
#
# ICL7673CPAZ
#
DEF ICL7673CPAZ U 0 40 Y Y 1 F N
F0 "U" -240 250 50 H V C CNN
F1 "ICL7673CPAZ" 150 250 50 H V L CNN
F2 "Housings_DIP:DIP-8_W7.62mm" 40 -450 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
?DIP*W7.62mm*
$ENDFPLIST
DRAW
X VO 1 500 100 100 L 50 50 1 0 w
X VS 2 100 300 100 D 50 50 1 0 W
X SBAR 3 500 0 100 L 50 50 1 0 C
X GND 4 0 -300 100 U 50 50 1 0 W
X NC 5 -200 -300 100 U 50 50 1 0 N N
X PBAR 6 500 -100 100 L 50 50 1 0 C
X NC 7 -100 -300 100 U 50 50 1 0 N N
X VP 8 0 300 100 D 50 50 1 0 W
S -300 200 400 -200 0 1 10 f
ENDDRAW
ENDDEF
#
#End Library