KicadLib/template/ti-stellaris-boosterpack40_min/boosterpack40_min.kicad_pcb
jean-pierre charras 4d795f2eb3 fix template
2016-12-18 10:00:37 +11:00

255 lines
12 KiB
Text

(kicad_pcb (version 20160815) (host pcbnew "(2016-12-12 revision b1e37ae)-master")
(general
(links 1)
(no_connects 1)
(area 182.804999 112.954999 233.755001 147.395001)
(thickness 1.6)
(drawings 7)
(tracks 0)
(zones 0)
(modules 4)
(nets 2)
)
(page A3)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
)
(setup
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(trace_clearance 0.254)
(zone_clearance 0.508)
(zone_45_only no)
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(segment_width 0.20066)
(edge_width 0.14986)
(via_size 0.889)
(via_drill 0.635)
(via_min_size 0.889)
(via_min_drill 0.508)
(uvia_size 0.508)
(uvia_drill 0.127)
(uvias_allowed no)
(uvia_min_size 0.508)
(uvia_min_drill 0.127)
(pcb_text_width 0.3)
(pcb_text_size 1 1)
(mod_edge_width 0.14986)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1 1)
(pad_drill 0.6)
(pad_to_mask_clearance 0)
(aux_axis_origin 0 0)
(visible_elements 7FFFFFFF)
(pcbplotparams
(layerselection 0x00030_ffffffff)
(usegerberextensions true)
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(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 GND)
(net_class Default "This is the default net class."
(clearance 0.254)
(trace_width 0.254)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
(add_net GND)
)
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(descr "Connecteur 10 pins")
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)
(module Connect:SIL-10 (layer F.Cu) (tedit 0) (tstamp 584FABA0)
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(descr "Connecteur 10 pins")
(tags "CONN DEV")
(path /5080DBF4)
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(pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
)
(module Connect:SIL-10 (layer F.Cu) (tedit 0) (tstamp 584FABAD)
(at 187.96 133.35 270)
(descr "Connecteur 10 pins")
(tags "CONN DEV")
(path /5080DC03)
(fp_text reference J3 (at -6.35 -2.54 270) (layer F.SilkS)
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)
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)
(module Connect:SIL-10 (layer F.Cu) (tedit 0) (tstamp 584FABBA)
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(descr "Connecteur 10 pins")
(tags "CONN DEV")
(path /5080DC12)
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)
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(pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
)
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)
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