LM2937xMP, SOT-223 as alias for SPX2920M3-3.3_SOT223
LM2937xS, TO-263 as alias for SPX2920T-3.3_TO263
LM2937xT, TO-220 as alias for LM7805_TO220
Changed standard footprint of SPX2920T-3.3_TO263 from "TO_SOT_Packages_SMD:TO-263-3Lead" to "TO_SOT_Packages_SMD:TO-263-3_TabPin2".
Yes, GND is at pin 2, see last page of https://www.exar.com/files/ApplicationNotes/LDOThermal.pdf
https://www.diodes.com/assets/Datasheets/AP2127.pdf
This is failing the KLC script, but I don't think any of the other
regulators have their power input pin on the top, either.
Checking symbol 'AP2127K-3.3':
Violating Rule 4.5 - Pin orientation
Wherever possible, pins should be arranged by function
Positive power pins should be placed at top of symbol
- Pin VIN (1) @ (-300,100)
Renamed MCP6001 to MCP6001-OT (SOT-23-5)
Renamed MCP6561 to MCP6561-OT (SOT-23-5) and changed tags to single comparator
Renamed TS881 to TS881xLx (SOT-23-5)
Renamed TSV911ILT to TSV911xxLx
Added standard footprint to MCP6L91T-EOT
Cleaned footprint filter list of MCP6L91T-EOT to filter only SOT-23-5
Updated alias list of MCP6L91T-EOT
Renamed LM6171 to LM6171xxN (DIP-8)
Added standard footprint for MCP601-xP
Added standard footprint for OPA333xxD
Cleaned footprint filter of MCP601-xP to filter only DIP-8
Cleaned footprint filter of OPA333xxD to filter only SOIC-8
Removed aliases OPA340P, MCP6L91RT-EMS from OPA333xxD (wrong package)
Removed aliases MCP601-xSN, MCP601-xST from MCP601-xP (wrong package)
Added LM6171xxN, OPA340P as aliases for MCP601-xP (right package)
Added MCP601-xSN as alias for OPA333xxD
Added new symbol for MCP601-xST
Added new symbol for MCP6L91RT-EMS
http://usasyck.com/products/AD-121F2_cat_e.pdf
One thing that the datasheet doesn't make obvious is that the
no-connect pins (7, 8, and 12) are not physically present. For this
reason, I am leaving those pins out of the schematic symbol and
footprint, rather than modeling them as no-connect pins.
