tztz/KicadLib
1
0
Fork 0
Code Issues Pull requests Releases Wiki Activity

fixed pin 40 being erroneously marked as pin 50 in PIC18(L)F4450, PIC18(L)F4455 and PIC18(L)F4458

Browse source
This commit is contained in:
Nikolay Nikolov 2016-12-22 02:04:15 +02:00
parent dc41a70a56
commit faa79e0195
1 changed files with 6 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
library/microchip_pic18mcu.lib
View file

@ -773,7 +773,7 @@ X RB0/AN12/INT0 9 -1100 100 150 R 50 50 1 1 B
X RB1/AN10/INT1 10 -1100 0 150 R 50 50 1 1 B
X RA1/AN1 20 -1100 1000 150 R 50 50 1 1 B
X AVSS 30 -300 -1400 150 U 50 50 1 1 W
X RD2 50 1100 -100 150 L 50 50 1 1 B
X RD2 40 1100 -100 150 L 50 50 1 1 B
X RB2/AN8/INT2/VMO 11 -1100 -100 150 R 50 50 1 1 B
X RA2/AN2/Vref- 21 -1100 900 150 R 50 50 1 1 B
X VSS 31 0 -1400 150 U 50 50 1 1 W
@ -832,7 +832,7 @@ X AN6/RE1 9 1100 -900 150 L 50 50 1 1 B
X AN7/RE2 10 1100 -1000 150 L 50 50 1 1 B
X RD1 20 1100 0 150 L 50 50 1 1 B
X RD7 30 1100 -600 150 L 50 50 1 1 B
X RB7/KBI3/PGD 50 -1100 -600 150 R 50 50 1 1 B
X RB7/KBI3/PGD 40 -1100 -600 150 R 50 50 1 1 B
X VDD 11 -100 1400 150 D 50 50 1 1 W
X RD2 21 1100 -100 150 L 50 50 1 1 B
X VSS 31 0 -1400 150 U 50 50 1 1 W
@ -887,7 +887,7 @@ X RB1/AN10/INT1 9 -1100 0 150 R 50 50 1 1 B
X RB2/AN8/INT2/VMO 10 -1100 -100 150 R 50 50 1 1 B
X RA1/AN1 20 -1100 1000 150 R 50 50 1 1 B
X OSC1/CLKI 30 -1100 300 150 R 50 50 1 1 I
X RD2 50 1100 -100 150 L 50 50 1 1 B
X RD2 40 1100 -100 150 L 50 50 1 1 B
X RB3/AN9/VPO 11 -1100 -200 150 R 50 50 1 1 B
X RA2/AN2/Vref- 21 -1100 900 150 R 50 50 1 1 B
X RA6/OSC2/CLKO 31 -1100 500 150 R 50 50 1 1 O
@ -947,7 +947,7 @@ X RB0/AN12/INT0/SDI/SDA 9 -1200 100 150 R 50 50 1 1 B
X RB1/AN10/INT1/SCK/SCL 10 -1200 0 150 R 50 50 1 1 B
X RA1/AN1 20 -1200 1000 150 R 50 50 1 1 B
X VSS 30 0 -1400 150 U 50 50 1 1 W
X SPP2/RD2 50 1200 -100 150 L 50 50 1 1 B
X SPP2/RD2 40 1200 -100 150 L 50 50 1 1 B
X RB2/AN8/INT2/VMO 11 -1200 -100 150 R 50 50 1 1 B
X RA2/AN2/Vref-/CVref 21 -1200 900 150 R 50 50 1 1 B
X VSS 31 100 -1400 150 U 50 50 1 1 W
@ -1007,7 +1007,7 @@ X CK2SPP/AN6/RE1 9 1100 -900 150 L 50 50 1 1 B
X OESPP/AN7/RE2 10 1100 -1000 150 L 50 50 1 1 B
X SPP1/RD1 20 1100 0 150 L 50 50 1 1 B
X P1D/SPP7/RD7 30 1100 -600 150 L 50 50 1 1 B
X RB7/KBI3/PGD 50 -1100 -600 150 R 50 50 1 1 B
X RB7/KBI3/PGD 40 -1100 -600 150 R 50 50 1 1 B
X VDD 11 -100 1400 150 D 50 50 1 1 W
X SPP2/RD2 21 1100 -100 150 L 50 50 1 1 B
X VSS 31 0 -1400 150 U 50 50 1 1 W
@ -1123,7 +1123,7 @@ X RB0/AN12/INT0/FLT0/SDI/SDA 9 -1200 100 150 R 50 50 1 1 B
X RB1/AN10/INT1/SCK/SCL 10 -1200 0 150 R 50 50 1 1 B
X RA1/AN1 20 -1200 1000 150 R 50 50 1 1 B
X VSS 30 0 -1400 150 U 50 50 1 1 W
X SPP2/RD2 50 1200 -100 150 L 50 50 1 1 B
X SPP2/RD2 40 1200 -100 150 L 50 50 1 1 B
X RB2/AN8/INT2/VMO 11 -1200 -100 150 R 50 50 1 1 B
X RA2/AN2/Vref-/CVref 21 -1200 900 150 R 50 50 1 1 B
X VSS 31 100 -1400 150 U 50 50 1 1 W