diff --git a/template/stm32f100-discovery-shield/meta/board_stm32vl_discovery.png b/template/stm32f100-discovery-shield/meta/board_stm32vl_discovery.png
new file mode 100644
index 00000000..29087b72
Binary files /dev/null and b/template/stm32f100-discovery-shield/meta/board_stm32vl_discovery.png differ
diff --git a/template/stm32f100-discovery-shield/meta/icon.png b/template/stm32f100-discovery-shield/meta/icon.png
new file mode 100644
index 00000000..60f4dfe1
Binary files /dev/null and b/template/stm32f100-discovery-shield/meta/icon.png differ
diff --git a/template/stm32f100-discovery-shield/meta/info.html b/template/stm32f100-discovery-shield/meta/info.html
new file mode 100644
index 00000000..ca0599df
--- /dev/null
+++ b/template/stm32f100-discovery-shield/meta/info.html
@@ -0,0 +1,21 @@
+
+
+STM32 Discovery
+
+
+STM32 Value Line Discovery - STM32F100 Cortex-M3™ Microcontroller Board
+Expansion Board
+This project is a template of an expansion board for the
+STM32 Value Line Discovery
+ board.
+
+This project includes a PCB edge defined as the same size as the STM32F100 Discovery
+board with the connectors placed correctly to align the two boards. All IO present on the
+Discovery board is connected to the project through 0.1" expansion headers.
+
+
+
+(c)2012 Kerusey Karyu
+
+
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield-cache.lib b/template/stm32f100-discovery-shield/stm32f100-discovery-shield-cache.lib
new file mode 100644
index 00000000..2d2b0dba
--- /dev/null
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield-cache.lib
@@ -0,0 +1,94 @@
+EESchema-LIBRARY Version 2.3 Date: 2012-10-20 12:45:55
+#encoding utf-8
+#
+# +3.3V
+#
+DEF +3.3V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -40 30 H I C CNN
+F1 "+3.3V" 0 110 30 H V C CNN
+ALIAS +3,3V
+DRAW
+X +3.3V 1 0 0 0 U 30 30 0 0 W N
+C 0 60 20 0 1 0 N
+P 3 0 1 0 0 0 0 40 0 40 N
+ENDDRAW
+ENDDEF
+#
+# +5V
+#
+DEF +5V #PWR 0 40 Y Y 1 F P
+F0 "#PWR" 0 90 20 H I C CNN
+F1 "+5V" 0 90 30 H V C CNN
+DRAW
+X +5V 1 0 0 0 U 20 20 0 0 W N
+C 0 50 20 0 1 0 N
+P 4 0 1 0 0 0 0 30 0 30 0 30 N
+ENDDRAW
+ENDDEF
+#
+# CONN28
+#
+DEF CONN28 P 0 40 Y N 1 F N
+F0 "P" -50 0 60 V V C CNN
+F1 "CONN28" 50 0 60 V V C CNN
+DRAW
+S -100 -1400 150 1400 0 1 0 f
+X P1 1 -350 1350 250 R 50 50 1 1 P I
+X P2 2 -350 1250 250 R 50 50 1 1 P I
+X P3 3 -350 1150 250 R 50 50 1 1 P I
+X P4 4 -350 1050 250 R 50 50 1 1 P I
+X P5 5 -350 950 250 R 50 50 1 1 P I
+X P6 6 -350 850 250 R 50 50 1 1 P I
+X P7 7 -350 750 250 R 50 50 1 1 P I
+X P8 8 -350 650 250 R 50 50 1 1 P I
+X P9 9 -350 550 250 R 50 50 1 1 P I
+X P10 10 -350 450 250 R 50 50 1 1 P I
+X P20 20 -350 -550 250 R 50 50 1 1 P I
+X P11 11 -350 350 250 R 50 50 1 1 P I
+X P21 21 -350 -650 250 R 50 50 1 1 P I
+X P12 12 -350 250 250 R 50 50 1 1 P I
+X P22 22 -350 -750 250 R 50 50 1 1 P I
+X P13 13 -350 150 250 R 50 50 1 1 P I
+X P23 23 -350 -850 250 R 50 50 1 1 P I
+X P14 14 -350 50 250 R 50 50 1 1 P I
+X P24 24 -350 -950 250 R 50 50 1 1 P I
+X P15 15 -350 -50 250 R 50 50 1 1 P I
+X P25 25 -350 -1050 250 R 50 50 1 1 P I
+X P16 16 -350 -150 250 R 50 50 1 1 P I
+X P26 26 -350 -1150 250 R 50 50 1 1 P I
+X P17 17 -350 -250 250 R 50 50 1 1 P I
+X P27 27 -350 -1250 250 R 50 50 1 1 P I
+X P18 18 -350 -350 250 R 50 50 1 1 P I
+X P28 28 -350 -1350 250 R 50 50 1 1 P I
+X P19 19 -350 -450 250 R 50 50 1 1 P I
+ENDDRAW
+ENDDEF
+#
+# CONN6
+#
+DEF CONN6 P 0 40 Y N 1 F N
+F0 "P" -50 0 60 V V C CNN
+F1 "CONN6" 50 0 60 V V C CNN
+DRAW
+S -100 -300 150 300 0 1 0 f
+X P1 1 -350 250 250 R 50 50 1 1 P I
+X P2 2 -350 150 250 R 50 50 1 1 P I
+X P3 3 -350 50 250 R 50 50 1 1 P I
+X P4 4 -350 -50 250 R 50 50 1 1 P I
+X P5 5 -350 -150 250 R 50 50 1 1 P I
+X P6 6 -350 -250 250 R 50 50 1 1 P I
+ENDDRAW
+ENDDEF
+#
+# GND
+#
+DEF ~GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 0 30 H I C CNN
+F1 "GND" 0 -70 30 H I C CNN
+DRAW
+P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
+X GND 1 0 0 0 U 30 30 1 1 W N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.cmp b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.cmp
new file mode 100644
index 00000000..989bb894
--- /dev/null
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.cmp
@@ -0,0 +1,24 @@
+Cmp-Mod V01 Created by CvPcb (2012-10-17 BZR 3773)-testing date = 2012-10-20 12:09:50
+
+BeginCmp
+TimeStamp = /50827277;
+Reference = P1;
+ValeurCmp = CONN28;
+IdModule = PIN_ARRAY_28X1;
+EndCmp
+
+BeginCmp
+TimeStamp = /50827286;
+Reference = P2;
+ValeurCmp = CONN28;
+IdModule = PIN_ARRAY_28X1;
+EndCmp
+
+BeginCmp
+TimeStamp = /50827295;
+Reference = P3;
+ValeurCmp = CONN6;
+IdModule = PIN_ARRAY_6X1;
+EndCmp
+
+EndListe
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.dcm b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.dcm
new file mode 100644
index 00000000..6705e384
--- /dev/null
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.dcm
@@ -0,0 +1,13 @@
+EESchema-DOCLIB Version 2.0 Date: 2012-10-20 11:34:59
+#
+$CMP CONN28
+D Symbole general de connexion
+K CONN
+$ENDCMP
+#
+$CMP CONN6
+D Symbole general de connexion
+K CONN
+$ENDCMP
+#
+#End Doc Library
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.kicad_pcb b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.kicad_pcb
new file mode 100644
index 00000000..1d42c6b5
--- /dev/null
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.kicad_pcb
@@ -0,0 +1,373 @@
+(kicad_pcb (version 3) (host pcbnew "(2013-02-23 BZR 3971)-testing")
+
+ (general
+ (links 3)
+ (no_connects 3)
+ (area 32.945069 34.215069 76.274931 118.819931)
+ (thickness 1.6002)
+ (drawings 5)
+ (tracks 0)
+ (zones 0)
+ (modules 3)
+ (nets 4)
+ )
+
+ (page A3)
+ (title_block
+ (title "STM32 Value Line Discovery - Shiled board")
+ (rev 1.0)
+ )
+
+ (layers
+ (15 Front signal)
+ (0 Back signal)
+ (16 Dessous.Adhes user)
+ (17 Dessus.Adhes user)
+ (18 Dessous.Pate user)
+ (19 Dessus.Pate user)
+ (20 Dessous.SilkS user)
+ (21 Dessus.SilkS user)
+ (22 Dessous.Masque user)
+ (23 Dessus.Masque user)
+ (24 Dessin.User user)
+ (25 Cmts.User user)
+ (26 Eco1.User user)
+ (27 Eco2.User user)
+ (28 Contours.Ci user)
+ )
+
+ (setup
+ (last_trace_width 0.254)
+ (trace_clearance 0.254)
+ (zone_clearance 0.508)
+ (zone_45_only no)
+ (trace_min 0.254)
+ (segment_width 0.20066)
+ (edge_width 0.14986)
+ (via_size 0.889)
+ (via_drill 0.635)
+ (via_min_size 0.889)
+ (via_min_drill 0.508)
+ (uvia_size 0.508)
+ (uvia_drill 0.127)
+ (uvias_allowed no)
+ (uvia_min_size 0.508)
+ (uvia_min_drill 0.127)
+ (pcb_text_width 0.29972)
+ (pcb_text_size 1.00076 1.00076)
+ (mod_edge_width 0.14986)
+ (mod_text_size 1.00076 1.00076)
+ (mod_text_width 0.14986)
+ (pad_size 1.00076 1.00076)
+ (pad_drill 0.59944)
+ (pad_to_mask_clearance 0)
+ (aux_axis_origin 0 0)
+ (visible_elements 7FFFFFFF)
+ (pcbplotparams
+ (layerselection 3178497)
+ (usegerberextensions true)
+ (excludeedgelayer true)
+ (linewidth 60)
+ (plotframeref false)
+ (viasonmask false)
+ (mode 1)
+ (useauxorigin false)
+ (hpglpennumber 1)
+ (hpglpenspeed 20)
+ (hpglpendiameter 15)
+ (hpglpenoverlay 2)
+ (psnegative false)
+ (psa4output false)
+ (plotreference true)
+ (plotvalue true)
+ (plotothertext true)
+ (plotinvisibletext false)
+ (padsonsilk false)
+ (subtractmaskfromsilk false)
+ (outputformat 1)
+ (mirror false)
+ (drillshape 1)
+ (scaleselection 1)
+ (outputdirectory ""))
+ )
+
+ (net 0 "")
+ (net 1 +3.3V)
+ (net 2 +5V)
+ (net 3 GND)
+
+ (net_class Default "To jest domyślna klasa połączeń."
+ (clearance 0.254)
+ (trace_width 0.254)
+ (via_dia 0.889)
+ (via_drill 0.635)
+ (uvia_dia 0.508)
+ (uvia_drill 0.127)
+ (add_net "")
+ (add_net +3.3V)
+ (add_net +5V)
+ (add_net GND)
+ )
+
+ (module PIN_ARRAY_6X1 locked (layer Front) (tedit 50827C81) (tstamp 50827C60)
+ (at 55.88 113.03)
+ (descr "Single rangee contacts 1 x 6 pins")
+ (tags CONN)
+ (path /50827295)
+ (fp_text reference P3 (at -8.89 0) (layer Dessus.SilkS)
+ (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
+ )
+ (fp_text value CONN6 (at -8.89 0) (layer Dessus.SilkS) hide
+ (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
+ )
+ (fp_line (start -7.62 -1.27) (end 7.62 -1.27) (layer Dessus.SilkS) (width 0.14986))
+ (fp_line (start 7.62 -1.27) (end 7.62 1.27) (layer Dessus.SilkS) (width 0.14986))
+ (fp_line (start 7.62 1.27) (end -7.62 1.27) (layer Dessus.SilkS) (width 0.14986))
+ (fp_line (start -7.62 1.27) (end -7.62 -1.27) (layer Dessus.SilkS) (width 0.14986))
+ (pad 1 thru_hole rect (at -6.35 0) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 2 thru_hole circle (at -3.81 0) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 4 thru_hole circle (at 1.27 0) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 6 thru_hole circle (at 6.35 0) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 3 thru_hole circle (at -1.27 0) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 5 thru_hole circle (at 3.81 0) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ )
+
+ (module PIN_ARRAY_28X1 locked (layer Front) (tedit 50827C6F) (tstamp 50827C84)
+ (at 39.37 73.66 270)
+ (descr "Single rangee contacts 1 x 28 pins")
+ (tags CONN)
+ (path /50827277)
+ (fp_text reference P1 (at -36.195 0 360) (layer Dessus.SilkS)
+ (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
+ )
+ (fp_text value CONN28 (at -36.195 0 360) (layer Dessus.SilkS) hide
+ (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
+ )
+ (fp_line (start -35.56 -1.27) (end 35.56 -1.27) (layer Dessus.SilkS) (width 0.14986))
+ (fp_line (start 35.56 -1.27) (end 35.56 1.27) (layer Dessus.SilkS) (width 0.14986))
+ (fp_line (start 35.56 1.27) (end -35.56 1.27) (layer Dessus.SilkS) (width 0.14986))
+ (fp_line (start -35.56 1.27) (end -35.56 -1.27) (layer Dessus.SilkS) (width 0.14986))
+ (pad 1 thru_hole rect (at -34.29 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ (net 3 GND)
+ )
+ (pad 2 thru_hole circle (at -31.75 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 11 thru_hole circle (at -8.89 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 4 thru_hole circle (at -26.67 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 13 thru_hole circle (at -3.81 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 6 thru_hole circle (at -21.59 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 15 thru_hole circle (at 1.27 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 8 thru_hole circle (at -16.51 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 17 thru_hole circle (at 6.35 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 10 thru_hole circle (at -11.43 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 19 thru_hole circle (at 11.43 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 12 thru_hole circle (at -6.35 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 21 thru_hole circle (at 16.51 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 14 thru_hole circle (at -1.27 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 23 thru_hole circle (at 21.59 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 16 thru_hole circle (at 3.81 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 25 thru_hole circle (at 26.67 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 18 thru_hole circle (at 8.89 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 27 thru_hole circle (at 31.75 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 20 thru_hole circle (at 13.97 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 22 thru_hole circle (at 19.05 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 24 thru_hole circle (at 24.13 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 26 thru_hole circle (at 29.21 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 28 thru_hole circle (at 34.29 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ (net 3 GND)
+ )
+ (pad 3 thru_hole circle (at -29.21 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ (net 1 +3.3V)
+ )
+ (pad 5 thru_hole circle (at -24.13 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 7 thru_hole circle (at -19.05 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 9 thru_hole circle (at -13.97 0 270) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ )
+
+ (module PIN_ARRAY_28X1 locked (layer Front) (tedit 50827C8E) (tstamp 50827CA8)
+ (at 69.85 73.66 90)
+ (descr "Single rangee contacts 1 x 28 pins")
+ (tags CONN)
+ (path /50827286)
+ (fp_text reference P2 (at -36.195 0 180) (layer Dessus.SilkS)
+ (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
+ )
+ (fp_text value CONN28 (at -36.195 0 180) (layer Dessus.SilkS) hide
+ (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
+ )
+ (fp_line (start -35.56 -1.27) (end 35.56 -1.27) (layer Dessus.SilkS) (width 0.14986))
+ (fp_line (start 35.56 -1.27) (end 35.56 1.27) (layer Dessus.SilkS) (width 0.14986))
+ (fp_line (start 35.56 1.27) (end -35.56 1.27) (layer Dessus.SilkS) (width 0.14986))
+ (fp_line (start -35.56 1.27) (end -35.56 -1.27) (layer Dessus.SilkS) (width 0.14986))
+ (pad 1 thru_hole rect (at -34.29 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ (net 3 GND)
+ )
+ (pad 2 thru_hole circle (at -31.75 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 11 thru_hole circle (at -8.89 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 4 thru_hole circle (at -26.67 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 13 thru_hole circle (at -3.81 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 6 thru_hole circle (at -21.59 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 15 thru_hole circle (at 1.27 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 8 thru_hole circle (at -16.51 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 17 thru_hole circle (at 6.35 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 10 thru_hole circle (at -11.43 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 19 thru_hole circle (at 11.43 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 12 thru_hole circle (at -6.35 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 21 thru_hole circle (at 16.51 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 14 thru_hole circle (at -1.27 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 23 thru_hole circle (at 21.59 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 16 thru_hole circle (at 3.81 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 25 thru_hole circle (at 26.67 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 18 thru_hole circle (at 8.89 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 27 thru_hole circle (at 31.75 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 20 thru_hole circle (at 13.97 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 22 thru_hole circle (at 19.05 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 24 thru_hole circle (at 24.13 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 26 thru_hole circle (at 29.21 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ (net 2 +5V)
+ )
+ (pad 28 thru_hole circle (at 34.29 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ (net 3 GND)
+ )
+ (pad 3 thru_hole circle (at -29.21 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 5 thru_hole circle (at -24.13 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 7 thru_hole circle (at -19.05 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ (pad 9 thru_hole circle (at -13.97 0 90) (size 1.524 1.524) (drill 1.016)
+ (layers *.Cu *.Mask Dessus.SilkS)
+ )
+ )
+
+ (gr_text "STM32 Value Line Discovery - Shield" (at 48.133 117.475) (layer Dessus.SilkS)
+ (effects (font (size 1.00076 1.00076) (thickness 0.25146)))
+ )
+ (gr_line (start 33.02 34.29) (end 33.02 118.745) (angle 90) (layer Contours.Ci) (width 0.14986))
+ (gr_line (start 76.2 118.745) (end 76.2 34.29) (angle 90) (layer Contours.Ci) (width 0.14986))
+ (gr_line (start 76.2 118.745) (end 33.02 118.745) (angle 90) (layer Contours.Ci) (width 0.14986))
+ (gr_line (start 33.02 34.29) (end 76.2 34.29) (angle 90) (layer Contours.Ci) (width 0.14986))
+
+ (zone (net 3) (net_name GND) (layer Back) (tstamp 50827DC8) (hatch edge 0.508)
+ (connect_pads (clearance 0.508))
+ (min_thickness 0.254)
+ (fill (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.889))
+ (polygon
+ (pts
+ (xy 76.073 118.618) (xy 33.147 118.618) (xy 33.147 34.417) (xy 76.073 34.417)
+ )
+ )
+ )
+)
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.lib b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.lib
new file mode 100644
index 00000000..9f3e0a01
--- /dev/null
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.lib
@@ -0,0 +1,58 @@
+EESchema-LIBRARY Version 2.3 Date: 2012-10-20 11:34:59
+#encoding utf-8
+#
+# CONN28
+#
+DEF CONN28 P 0 40 Y N 1 F N
+F0 "P" -50 0 60 V V C CNN
+F1 "CONN28" 50 0 60 V V C CNN
+DRAW
+S -100 -1400 150 1400 0 1 0 f
+X P1 1 -350 1350 250 R 50 50 1 1 P I
+X P2 2 -350 1250 250 R 50 50 1 1 P I
+X P3 3 -350 1150 250 R 50 50 1 1 P I
+X P4 4 -350 1050 250 R 50 50 1 1 P I
+X P5 5 -350 950 250 R 50 50 1 1 P I
+X P6 6 -350 850 250 R 50 50 1 1 P I
+X P7 7 -350 750 250 R 50 50 1 1 P I
+X P8 8 -350 650 250 R 50 50 1 1 P I
+X P9 9 -350 550 250 R 50 50 1 1 P I
+X P10 10 -350 450 250 R 50 50 1 1 P I
+X P20 20 -350 -550 250 R 50 50 1 1 P I
+X P11 11 -350 350 250 R 50 50 1 1 P I
+X P21 21 -350 -650 250 R 50 50 1 1 P I
+X P12 12 -350 250 250 R 50 50 1 1 P I
+X P22 22 -350 -750 250 R 50 50 1 1 P I
+X P13 13 -350 150 250 R 50 50 1 1 P I
+X P23 23 -350 -850 250 R 50 50 1 1 P I
+X P14 14 -350 50 250 R 50 50 1 1 P I
+X P24 24 -350 -950 250 R 50 50 1 1 P I
+X P15 15 -350 -50 250 R 50 50 1 1 P I
+X P25 25 -350 -1050 250 R 50 50 1 1 P I
+X P16 16 -350 -150 250 R 50 50 1 1 P I
+X P26 26 -350 -1150 250 R 50 50 1 1 P I
+X P17 17 -350 -250 250 R 50 50 1 1 P I
+X P27 27 -350 -1250 250 R 50 50 1 1 P I
+X P18 18 -350 -350 250 R 50 50 1 1 P I
+X P28 28 -350 -1350 250 R 50 50 1 1 P I
+X P19 19 -350 -450 250 R 50 50 1 1 P I
+ENDDRAW
+ENDDEF
+#
+# CONN6
+#
+DEF CONN6 P 0 40 Y N 1 F N
+F0 "P" -50 0 60 V V C CNN
+F1 "CONN6" 50 0 60 V V C CNN
+DRAW
+S -100 -300 150 300 0 1 0 f
+X P1 1 -350 250 250 R 50 50 1 1 P I
+X P2 2 -350 150 250 R 50 50 1 1 P I
+X P3 3 -350 50 250 R 50 50 1 1 P I
+X P4 4 -350 -50 250 R 50 50 1 1 P I
+X P5 5 -350 -150 250 R 50 50 1 1 P I
+X P6 6 -350 -250 250 R 50 50 1 1 P I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.mod b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.mod
new file mode 100644
index 00000000..f7e8c97e
--- /dev/null
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.mod
@@ -0,0 +1,276 @@
+PCBNEW-LibModule-V1 2012-10-20 12:13:07
+# encoding utf-8
+Units deci-mils
+$INDEX
+PIN_ARRAY_28X1
+PIN_ARRAY_6X1
+$EndINDEX
+$MODULE PIN_ARRAY_28X1
+Po 0 0 0 15 50827920 00000000 ~~
+Li PIN_ARRAY_28X1
+Cd Single rangee contacts 1 x 28 pins
+Kw CONN
+Sc 0
+AR
+Op 0 0 0
+T0 0 -800 249 249 0 62 N V 21 N "PIN_ARRAY_28X1"
+T1 0 800 249 249 0 62 N I 21 N "VAL**"
+DS -14000 -500 14000 -500 59 21
+DS 14000 -500 14000 500 59 21
+DS 14000 500 -14000 500 59 21
+DS -14000 500 -14000 -500 59 21
+$PAD
+Sh "1" R 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -13500 0
+$EndPAD
+$PAD
+Sh "2" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -12500 0
+$EndPAD
+$PAD
+Sh "11" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -3500 0
+$EndPAD
+$PAD
+Sh "4" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -10500 0
+$EndPAD
+$PAD
+Sh "13" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -1500 0
+$EndPAD
+$PAD
+Sh "6" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -8500 0
+$EndPAD
+$PAD
+Sh "15" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 500 0
+$EndPAD
+$PAD
+Sh "8" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -6500 0
+$EndPAD
+$PAD
+Sh "17" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 2500 0
+$EndPAD
+$PAD
+Sh "10" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -4500 0
+$EndPAD
+$PAD
+Sh "19" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 4500 0
+$EndPAD
+$PAD
+Sh "12" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -2500 0
+$EndPAD
+$PAD
+Sh "21" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 6500 0
+$EndPAD
+$PAD
+Sh "14" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -500 0
+$EndPAD
+$PAD
+Sh "23" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 8500 0
+$EndPAD
+$PAD
+Sh "16" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 1500 0
+$EndPAD
+$PAD
+Sh "25" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 10500 0
+$EndPAD
+$PAD
+Sh "18" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 3500 0
+$EndPAD
+$PAD
+Sh "27" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 12500 0
+$EndPAD
+$PAD
+Sh "20" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 5500 0
+$EndPAD
+$PAD
+Sh "22" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 7500 0
+$EndPAD
+$PAD
+Sh "24" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 9500 0
+$EndPAD
+$PAD
+Sh "26" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 11500 0
+$EndPAD
+$PAD
+Sh "28" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 13500 0
+$EndPAD
+$PAD
+Sh "3" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -11500 0
+$EndPAD
+$PAD
+Sh "5" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -9500 0
+$EndPAD
+$PAD
+Sh "7" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -7500 0
+$EndPAD
+$PAD
+Sh "9" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -5500 0
+$EndPAD
+$EndMODULE PIN_ARRAY_28X1
+$MODULE PIN_ARRAY_6X1
+Po 0 0 0 15 508278F8 00000000 ~~
+Li PIN_ARRAY_6X1
+Cd Single rangee contacts 1 x 6 pins
+Kw CONN
+Sc 0
+AR
+Op 0 0 0
+T0 0 -700 249 249 0 62 N V 21 N "PIN_ARRAY_6X1"
+T1 0 800 249 249 0 62 N I 21 N "VAL**"
+DS -3000 -500 3000 -500 59 21
+DS 3000 -500 3000 500 59 21
+DS 3000 500 -3000 500 59 21
+DS -3000 500 -3000 -500 59 21
+$PAD
+Sh "1" R 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -2500 0
+$EndPAD
+$PAD
+Sh "2" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -1500 0
+$EndPAD
+$PAD
+Sh "4" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 500 0
+$EndPAD
+$PAD
+Sh "6" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 2500 0
+$EndPAD
+$PAD
+Sh "3" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po -500 0
+$EndPAD
+$PAD
+Sh "5" C 600 600 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+Po 1500 0
+$EndPAD
+$EndMODULE PIN_ARRAY_6X1
+$EndLIBRARY
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.net b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.net
new file mode 100644
index 00000000..44f90069
--- /dev/null
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.net
@@ -0,0 +1,80 @@
+# EESchema Netlist Version 1.1 created 2012-10-20 12:24:05
+(
+ ( /50827277 $noname P1 CONN28 {Lib=CONN28}
+ ( 1 GND )
+ ( 2 ? )
+ ( 3 +3.3V )
+ ( 4 ? )
+ ( 5 ? )
+ ( 6 ? )
+ ( 7 ? )
+ ( 8 ? )
+ ( 9 ? )
+ ( 10 ? )
+ ( 11 ? )
+ ( 12 ? )
+ ( 13 ? )
+ ( 14 ? )
+ ( 15 ? )
+ ( 16 ? )
+ ( 17 ? )
+ ( 18 ? )
+ ( 19 ? )
+ ( 20 ? )
+ ( 21 ? )
+ ( 22 ? )
+ ( 23 ? )
+ ( 24 ? )
+ ( 25 ? )
+ ( 26 ? )
+ ( 27 ? )
+ ( 28 GND )
+ )
+ ( /50827286 $noname P2 CONN28 {Lib=CONN28}
+ ( 1 GND )
+ ( 2 ? )
+ ( 3 ? )
+ ( 4 ? )
+ ( 5 ? )
+ ( 6 ? )
+ ( 7 ? )
+ ( 8 ? )
+ ( 9 ? )
+ ( 10 ? )
+ ( 11 ? )
+ ( 12 ? )
+ ( 13 ? )
+ ( 14 ? )
+ ( 15 ? )
+ ( 16 ? )
+ ( 17 ? )
+ ( 18 ? )
+ ( 19 ? )
+ ( 20 ? )
+ ( 21 ? )
+ ( 22 ? )
+ ( 23 ? )
+ ( 24 ? )
+ ( 25 ? )
+ ( 26 +5V )
+ ( 27 ? )
+ ( 28 GND )
+ )
+ ( /50827295 $noname P3 CONN6 {Lib=CONN6}
+ ( 1 ? )
+ ( 2 ? )
+ ( 3 ? )
+ ( 4 ? )
+ ( 5 ? )
+ ( 6 ? )
+ )
+)
+*
+{ Pin List by Nets
+Net 59 "GND" "GND"
+ P1 1
+ P2 28
+ P1 28
+ P2 1
+}
+#End
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.pro b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.pro
new file mode 100644
index 00000000..ebb404f9
--- /dev/null
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.pro
@@ -0,0 +1,81 @@
+update=2012-10-20 12:46:25
+version=1
+last_client=pcbnew
+[general]
+version=1
+[cvpcb]
+version=1
+NetIExt=net
+[cvpcb/libraries]
+EquName1=devcms
+[eeschema]
+version=1
+LibDir=
+NetFmtName=
+RptD_X=0
+RptD_Y=100
+RptLab=1
+LabSize=40
+[eeschema/libraries]
+LibName1=stm32f100-discovery-shield
+LibName2=stm32
+LibName3=power
+LibName4=device
+LibName5=transistors
+LibName6=conn
+LibName7=linear
+LibName8=regul
+LibName9=74xx
+LibName10=cmos4000
+LibName11=adc-dac
+LibName12=memory
+LibName13=xilinx
+LibName14=special
+LibName15=microcontrollers
+LibName16=dsp
+LibName17=microchip
+LibName18=analog_switches
+LibName19=motorola
+LibName20=texas
+LibName21=intel
+LibName22=audio
+LibName23=interface
+LibName24=digital-audio
+LibName25=philips
+LibName26=display
+LibName27=cypress
+LibName28=siliconi
+LibName29=opto
+LibName30=atmel
+LibName31=contrib
+LibName32=valves
+[pcbnew]
+version=1
+LastNetListRead=
+PadDrill=0.59944
+PadSizeH=1.00076
+PadSizeV=1.00076
+PcbTextSizeV=1.00076
+PcbTextSizeH=1.00076
+PcbTextThickness=0.29972
+ModuleTextSizeV=1.00076
+ModuleTextSizeH=1.00076
+ModuleTextSizeThickness=0.14986
+SolderMaskClearance=0
+DrawSegmentWidth=0.20066
+BoardOutlineThickness=0.14986
+ModuleOutlineThickness=0.14986
+[pcbnew/libraries]
+LibDir=
+LibName1=stm32f100-discovery-shield
+LibName2=sockets
+LibName3=connect
+LibName4=discret
+LibName5=pin_array
+LibName6=divers
+LibName7=libcms
+LibName8=display
+LibName9=led
+LibName10=dip_sockets
+LibName11=pga_sockets
+LibName12=valves
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.sch b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.sch
new file mode 100644
index 00000000..fe7e4ca1
--- /dev/null
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.sch
@@ -0,0 +1,368 @@
+EESchema Schematic File Version 2 date 2012-10-20 12:45:55
+LIBS:stm32f100-discovery-shield
+LIBS:stm32
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:special
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:stm32f100-discovery-shield-cache
+EELAYER 27 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title "STM32 Value Line Discovery - Shiled board"
+Date "20 oct 2012"
+Rev "1.0"
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L CONN28 P1
+U 1 1 50827277
+P 10950 1950
+F 0 "P1" V 10900 1950 60 0000 C CNN
+F 1 "CONN28" V 11000 1950 60 0000 C CNN
+ 1 10950 1950
+ 1 0 0 -1
+$EndComp
+$Comp
+L CONN28 P2
+U 1 1 50827286
+P 10950 4850
+F 0 "P2" V 10900 4850 60 0000 C CNN
+F 1 "CONN28" V 11000 4850 60 0000 C CNN
+ 1 10950 4850
+ 1 0 0 1
+$EndComp
+$Comp
+L CONN6 P3
+U 1 1 50827295
+P 10950 6650
+F 0 "P3" V 10900 6650 60 0000 C CNN
+F 1 "CONN6" V 11000 6650 60 0000 C CNN
+ 1 10950 6650
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 10600 600 10300 600
+Wire Wire Line
+ 10600 800 10300 800
+Wire Wire Line
+ 10600 900 10300 900
+Wire Wire Line
+ 10600 1000 10300 1000
+Wire Wire Line
+ 10600 1100 10300 1100
+Wire Wire Line
+ 10600 1200 10300 1200
+Wire Wire Line
+ 10600 1300 10300 1300
+Wire Wire Line
+ 10600 1400 10300 1400
+Wire Wire Line
+ 10600 1500 10300 1500
+Wire Wire Line
+ 10600 1600 10300 1600
+Wire Wire Line
+ 10600 1700 10300 1700
+Wire Wire Line
+ 10600 1800 10300 1800
+Wire Wire Line
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+Wire Wire Line
+ 10600 2000 10300 2000
+Wire Wire Line
+ 10600 2100 10300 2100
+Wire Wire Line
+ 10600 2200 10300 2200
+Wire Wire Line
+ 10600 2300 10300 2300
+Wire Wire Line
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+Wire Wire Line
+ 10600 2500 10300 2500
+Wire Wire Line
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+Wire Wire Line
+ 10600 2700 10300 2700
+Wire Wire Line
+ 10600 2800 10300 2800
+Wire Wire Line
+ 10600 2900 10300 2900
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+ 10600 5900 10300 5900
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+ 10600 6700 10300 6700
+Wire Wire Line
+ 10600 6800 10300 6800
+Wire Wire Line
+ 10600 6900 10300 6900
+Text Label 10350 6400 0 40 ~ 0
+PB10
+Text Label 10350 6500 0 40 ~ 0
+PB11
+Text Label 10350 6600 0 40 ~ 0
+PB12
+Text Label 10350 6700 0 40 ~ 0
+PB13
+Text Label 10350 6800 0 40 ~ 0
+PB14
+Text Label 10350 6900 0 40 ~ 0
+PB15
+NoConn ~ 10600 700
+NoConn ~ 10600 3600
+$Comp
+L GND #PWR01
+U 1 1 50827354
+P 10300 650
+F 0 "#PWR01" H 10300 650 30 0001 C CNN
+F 1 "GND" H 10300 580 30 0001 C CNN
+ 1 10300 650
+ 1 0 0 -1
+$EndComp
+$Comp
+L GND #PWR02
+U 1 1 50827361
+P 10300 3350
+F 0 "#PWR02" H 10300 3350 30 0001 C CNN
+F 1 "GND" H 10300 3280 30 0001 C CNN
+ 1 10300 3350
+ 1 0 0 -1
+$EndComp
+$Comp
+L GND #PWR03
+U 1 1 50827367
+P 10300 3550
+F 0 "#PWR03" H 10300 3550 30 0001 C CNN
+F 1 "GND" H 10300 3480 30 0001 C CNN
+ 1 10300 3550
+ 1 0 0 -1
+$EndComp
+$Comp
+L GND #PWR04
+U 1 1 5082736D
+P 10300 6250
+F 0 "#PWR04" H 10300 6250 30 0001 C CNN
+F 1 "GND" H 10300 6180 30 0001 C CNN
+ 1 10300 6250
+ 1 0 0 -1
+$EndComp
+$Comp
+L +3.3V #PWR05
+U 1 1 50827375
+P 10300 800
+F 0 "#PWR05" H 10300 760 30 0001 C CNN
+F 1 "+3.3V" H 10300 910 30 0000 C CNN
+ 1 10300 800
+ 0 -1 -1 0
+$EndComp
+$Comp
+L +5V #PWR06
+U 1 1 50827384
+P 10300 3700
+F 0 "#PWR06" H 10300 3790 20 0001 C CNN
+F 1 "+5V" H 10300 3790 30 0000 C CNN
+ 1 10300 3700
+ 0 -1 -1 0
+$EndComp
+Wire Wire Line
+ 10300 6200 10300 6250
+Wire Wire Line
+ 10300 3500 10300 3550
+Wire Wire Line
+ 10300 3300 10300 3350
+Wire Wire Line
+ 10300 600 10300 650
+Text Label 10350 900 0 40 ~ 0
+VBAT
+Text Label 10350 1000 0 40 ~ 0
+PC13
+Text Label 10350 1100 0 40 ~ 0
+PC14
+Text Label 10350 1200 0 40 ~ 0
+PC15
+Text Label 10350 1300 0 40 ~ 0
+PD0
+Text Label 10350 1400 0 40 ~ 0
+PD1
+Text Label 10350 1500 0 40 ~ 0
+RST
+Text Label 10350 1600 0 40 ~ 0
+PC0
+Text Label 10350 1700 0 40 ~ 0
+PC1
+Text Label 10350 1800 0 40 ~ 0
+PC2
+Text Label 10350 1900 0 40 ~ 0
+PC3
+Text Label 10350 2000 0 40 ~ 0
+PA0
+Text Label 10350 2100 0 40 ~ 0
+PA1
+Text Label 10350 2200 0 40 ~ 0
+PA2
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+PA3
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+PA4
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+PA5
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+PA6
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+PA7
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+PC4
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+PC5
+Text Label 10350 3000 0 40 ~ 0
+PB0
+Text Label 10350 3100 0 40 ~ 0
+PB1
+Text Label 10350 3200 0 40 ~ 0
+PB2
+Text Label 10350 3800 0 40 ~ 0
+PB9
+Text Label 10350 3900 0 40 ~ 0
+PB8
+Text Label 10350 4000 0 40 ~ 0
+BOOT
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+PB7
+Text Label 10350 4200 0 40 ~ 0
+PB6
+Text Label 10350 4300 0 40 ~ 0
+PB5
+Text Label 10350 4400 0 40 ~ 0
+PB4
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+PB3
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+PD2
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+PC12
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+PC11
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+PC10
+Text Label 10350 5000 0 40 ~ 0
+PA15
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+PA14
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+PA12
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+PA10
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+PA8
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+PA9
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+PC9
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+PC8
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+PC7
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+PC6
+$EndSCHEMATC