Updated KiCAD

This commit is contained in:
Oliver Walters 2016-04-14 16:41:20 +10:00
parent a10924fdf7
commit f9bf805d43
43 changed files with 0 additions and 8938 deletions

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@ -1,79 +0,0 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# +3V3
#
DEF +3V3 #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "+3V3" 0 140 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
ALIAS +3.3V
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# CONN_01X14
#
DEF CONN_01X14 P 0 40 Y N 1 F N
F0 "P" 0 750 50 H V C CNN
F1 "CONN_01X14" 100 0 50 V V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
Pin_Header_Straight_1X14
Pin_Header_Angled_1X14
Socket_Strip_Straight_1X14
Socket_Strip_Angled_1X14
$ENDFPLIST
DRAW
S -50 -645 10 -655 0 1 0 N
S -50 -545 10 -555 0 1 0 N
S -50 -445 10 -455 0 1 0 N
S -50 -345 10 -355 0 1 0 N
S -50 -245 10 -255 0 1 0 N
S -50 -145 10 -155 0 1 0 N
S -50 -45 10 -55 0 1 0 N
S -50 55 10 45 0 1 0 N
S -50 155 10 145 0 1 0 N
S -50 255 10 245 0 1 0 N
S -50 355 10 345 0 1 0 N
S -50 455 10 445 0 1 0 N
S -50 555 10 545 0 1 0 N
S -50 655 10 645 0 1 0 N
S -50 700 50 -700 0 1 0 N
X P1 1 -200 650 150 R 50 50 1 1 P
X P2 2 -200 550 150 R 50 50 1 1 P
X P3 3 -200 450 150 R 50 50 1 1 P
X P4 4 -200 350 150 R 50 50 1 1 P
X P5 5 -200 250 150 R 50 50 1 1 P
X P6 6 -200 150 150 R 50 50 1 1 P
X P7 7 -200 50 150 R 50 50 1 1 P
X P8 8 -200 -50 150 R 50 50 1 1 P
X P9 9 -200 -150 150 R 50 50 1 1 P
X P10 10 -200 -250 150 R 50 50 1 1 P
X P11 11 -200 -350 150 R 50 50 1 1 P
X P12 12 -200 -450 150 R 50 50 1 1 P
X P13 13 -200 -550 150 R 50 50 1 1 P
X P14 14 -200 -650 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

View file

@ -1,307 +0,0 @@
(kicad_pcb (version 4) (host pcbnew 4.0.2-4+6225~38~ubuntu14.04.1-stable)
(general
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(no_connects 2)
(area 127.457999 61.925999 155.498001 126.796001)
(thickness 1.6)
(drawings 30)
(tracks 0)
(zones 0)
(modules 2)
(nets 27)
)
(page A4)
(title_block
(date "sam. 04 avril 2015")
)
(layers
(0 F.Cu signal)
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(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
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(uvias_allowed no)
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(visible_elements FFFFFF7F)
(pcbplotparams
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(outputdirectory ""))
)
(net 0 "")
(net 1 GND)
(net 2 /2)
(net 3 "/3(**)")
(net 4 /4)
(net 5 "/5(**)")
(net 6 "/6(**)")
(net 7 /7)
(net 8 /8)
(net 9 "/9(**)")
(net 10 "/10(**/SCK)")
(net 11 "/11(**/MOSI)")
(net 12 "/12(MISO)")
(net 13 "/13(SS)")
(net 14 /AREF)
(net 15 /RxI)
(net 16 /TxO)
(net 17 /DTR)
(net 18 /A0)
(net 19 /A1)
(net 20 /A2)
(net 21 /A3)
(net 22 "/A4(SDA)")
(net 23 "/A5(SCL)")
(net 24 /A6)
(net 25 /A7)
(net 26 +3V3)
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.6)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +3V3)
(add_net "/10(**/SCK)")
(add_net "/11(**/MOSI)")
(add_net "/12(MISO)")
(add_net "/13(SS)")
(add_net /2)
(add_net "/3(**)")
(add_net /4)
(add_net "/5(**)")
(add_net "/6(**)")
(add_net /7)
(add_net /8)
(add_net "/9(**)")
(add_net /A0)
(add_net /A1)
(add_net /A2)
(add_net /A3)
(add_net "/A4(SDA)")
(add_net "/A5(SCL)")
(add_net /A6)
(add_net /A7)
(add_net /AREF)
(add_net /DTR)
(add_net /RxI)
(add_net /TxO)
(add_net GND)
)
(module Socket_Arduino_Fio:Socket_Strip_Straight_1x14 locked (layer F.Cu) (tedit 5521661A) (tstamp 551FD256)
(at 130.048 92.456 270)
(descr "Through hole socket strip")
(tags "socket strip")
(path /56D705A1)
(fp_text reference P1 (at 17.78 -2.794 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Digital (at 21.59 -2.794 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
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(net 26 +3V3))
(pad 2 thru_hole oval (at 2.54 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 3 thru_hole oval (at 5.08 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 2 /2))
(pad 4 thru_hole oval (at 7.62 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 3 "/3(**)"))
(pad 5 thru_hole oval (at 10.16 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 4 /4))
(pad 6 thru_hole oval (at 12.7 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 5 "/5(**)"))
(pad 7 thru_hole oval (at 15.24 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 6 "/6(**)"))
(pad 8 thru_hole oval (at 17.78 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 7 /7))
(pad 9 thru_hole oval (at 20.32 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 8 /8))
(pad 10 thru_hole oval (at 22.86 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 "/9(**)"))
(pad 11 thru_hole oval (at 25.4 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 10 "/10(**/SCK)"))
(pad 12 thru_hole oval (at 27.94 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 11 "/11(**/MOSI)"))
(pad 13 thru_hole oval (at 30.48 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 12 "/12(MISO)"))
(pad 14 thru_hole oval (at 33.02 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 13 "/13(SS)"))
(model ${KIPRJMOD}/Socket_Arduino_Fio.3dshapes/Socket_header_Arduino_1x14.wrl
(at (xyz 0.65 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
(module Socket_Arduino_Fio:Socket_Strip_Straight_1x14 locked (layer F.Cu) (tedit 5521662F) (tstamp 551FD273)
(at 152.908 92.456 270)
(descr "Through hole socket strip")
(tags "socket strip")
(path /56D706EC)
(fp_text reference P2 (at 17.78 2.794 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Analog (at 21.59 2.794 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.27 -1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start 34.8 -1.75) (end 34.8 1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 34.8 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 1.75) (end 34.8 1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.27 -1.27) (end 34.29 -1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start 1.27 1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole oval (at 0 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 2 thru_hole oval (at 2.54 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 14 /AREF))
(pad 3 thru_hole oval (at 5.08 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 26 +3V3))
(pad 4 thru_hole oval (at 7.62 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 15 /RxI))
(pad 5 thru_hole oval (at 10.16 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 16 /TxO))
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(net 17 /DTR))
(pad 7 thru_hole oval (at 15.24 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(pad 8 thru_hole oval (at 17.78 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(pad 11 thru_hole oval (at 25.4 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 22 "/A4(SDA)"))
(pad 12 thru_hole oval (at 27.94 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 23 "/A5(SCL)"))
(pad 13 thru_hole oval (at 30.48 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 24 /A6))
(pad 14 thru_hole oval (at 33.02 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 25 /A7))
(model ${KIPRJMOD}/Socket_Arduino_Fio.3dshapes/Socket_header_Arduino_1x14.wrl
(at (xyz 0.65 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
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)
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)

View file

@ -1,113 +0,0 @@
(export (version D)
(design
(source /home/jo/Documents/hobbies/git/kicad_git/kicad-library/template/Arduino_Fio/Arduino_Fio.sch)
(date "mer. 02 mars 2016 19:32:39 CET")
(tool "Eeschema 4.0.2-4+6225~38~ubuntu14.04.1-stable")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title)
(company)
(rev)
(date "sam. 04 avril 2015")
(source Arduino_Fio.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref P1)
(value Digital)
(footprint Socket_Arduino_Fio:Socket_Strip_Straight_1x14)
(libsource (lib conn) (part CONN_01X14))
(sheetpath (names /) (tstamps /))
(tstamp 56D705A1))
(comp (ref P2)
(value Analog)
(footprint Socket_Arduino_Fio:Socket_Strip_Straight_1x14)
(libsource (lib conn) (part CONN_01X14))
(sheetpath (names /) (tstamps /))
(tstamp 56D706EC)))
(libparts
(libpart (lib conn) (part CONN_01X14)
(description "Connector 01x14")
(footprints
(fp Pin_Header_Straight_1X14)
(fp Pin_Header_Angled_1X14)
(fp Socket_Strip_Straight_1X14)
(fp Socket_Strip_Angled_1X14))
(fields
(field (name Reference) P)
(field (name Value) CONN_01X14))
(pins
(pin (num 1) (name P1) (type passive))
(pin (num 2) (name P2) (type passive))
(pin (num 3) (name P3) (type passive))
(pin (num 4) (name P4) (type passive))
(pin (num 5) (name P5) (type passive))
(pin (num 6) (name P6) (type passive))
(pin (num 7) (name P7) (type passive))
(pin (num 8) (name P8) (type passive))
(pin (num 9) (name P9) (type passive))
(pin (num 10) (name P10) (type passive))
(pin (num 11) (name P11) (type passive))
(pin (num 12) (name P12) (type passive))
(pin (num 13) (name P13) (type passive))
(pin (num 14) (name P14) (type passive)))))
(libraries
(library (logical conn)
(uri /usr/share/kicad/library/conn.lib)))
(nets
(net (code 1) (name GND)
(node (ref P2) (pin 1))
(node (ref P1) (pin 2)))
(net (code 2) (name "/10(**/SCK)")
(node (ref P1) (pin 11)))
(net (code 3) (name "/9(**)")
(node (ref P1) (pin 10)))
(net (code 4) (name /8)
(node (ref P1) (pin 9)))
(net (code 5) (name /7)
(node (ref P1) (pin 8)))
(net (code 6) (name "/6(**)")
(node (ref P1) (pin 7)))
(net (code 7) (name "/5(**)")
(node (ref P1) (pin 6)))
(net (code 8) (name /4)
(node (ref P1) (pin 5)))
(net (code 9) (name "/3(**)")
(node (ref P1) (pin 4)))
(net (code 10) (name /2)
(node (ref P1) (pin 3)))
(net (code 11) (name "/11(**/MOSI)")
(node (ref P1) (pin 12)))
(net (code 12) (name +3V3)
(node (ref P1) (pin 1))
(node (ref P2) (pin 3)))
(net (code 13) (name /A7)
(node (ref P2) (pin 14)))
(net (code 14) (name /A6)
(node (ref P2) (pin 13)))
(net (code 15) (name "/A5(SCL)")
(node (ref P2) (pin 12)))
(net (code 16) (name "/A4(SDA)")
(node (ref P2) (pin 11)))
(net (code 17) (name /A3)
(node (ref P2) (pin 10)))
(net (code 18) (name /AREF)
(node (ref P2) (pin 2)))
(net (code 19) (name /A2)
(node (ref P2) (pin 9)))
(net (code 20) (name /A1)
(node (ref P2) (pin 8)))
(net (code 21) (name /A0)
(node (ref P2) (pin 7)))
(net (code 22) (name /DTR)
(node (ref P2) (pin 6)))
(net (code 23) (name /TxO)
(node (ref P2) (pin 5)))
(net (code 24) (name /RxI)
(node (ref P2) (pin 4)))
(net (code 25) (name "/13(SS)")
(node (ref P1) (pin 14)))
(net (code 26) (name "/12(MISO)")
(node (ref P1) (pin 13)))))

View file

@ -1,60 +0,0 @@
update=mer. 02 mars 2016 14:57:12 CET
version=1
last_client=kicad
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[general]
version=1
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=microcontrollers
LibName13=dsp
LibName14=microchip
LibName15=analog_switches
LibName16=motorola
LibName17=texas
LibName18=intel
LibName19=audio
LibName20=interface
LibName21=digital-audio
LibName22=philips
LibName23=display
LibName24=cypress
LibName25=siliconi
LibName26=opto
LibName27=atmel
LibName28=contrib
LibName29=valves

View file

@ -1,236 +0,0 @@
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:Arduino_Fio-cache
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date "sam. 04 avril 2015"
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text Label 8850 1250 0 60 ~ 0
2
Text Label 8850 1350 0 60 ~ 0
3(**)
Text Label 8850 1450 0 60 ~ 0
4
Text Label 8850 1550 0 60 ~ 0
5(**)
Text Label 8850 1650 0 60 ~ 0
6(**)
Text Label 8850 1750 0 60 ~ 0
7
Text Label 8850 1850 0 60 ~ 0
8
Text Label 8850 1950 0 60 ~ 0
9(**)
Text Label 8850 2050 0 60 ~ 0
10(**/SCK)
Text Label 8850 2150 0 60 ~ 0
11(**/MOSI)
Text Label 8850 2250 0 60 ~ 0
12(MISO)
Text Label 8850 2350 0 60 ~ 0
13(SS)
Text Label 10700 2350 0 60 ~ 0
A7
Text Label 10700 2250 0 60 ~ 0
A6
Text Label 10700 2150 0 60 ~ 0
A5(SCL)
Text Label 10700 2050 0 60 ~ 0
A4(SDA)
Text Label 10700 1950 0 60 ~ 0
A3
Text Label 10700 1850 0 60 ~ 0
A2
Text Label 10700 1750 0 60 ~ 0
A1
Text Label 10700 1650 0 60 ~ 0
A0
Text Label 10700 1550 0 60 ~ 0
DTR
Text Label 10700 1450 0 60 ~ 0
TxO
Text Label 10700 1350 0 60 ~ 0
RxI
Text Label 10700 1150 0 60 ~ 0
AREF
Text Notes 8600 575 0 60 ~ 0
Shield Arduino Fio
Wire Notes Line
8575 475 8575 2675
Wire Notes Line
8575 650 9500 650
Wire Notes Line
9500 650 9500 475
Wire Notes Line
8575 2675 11225 2675
$Comp
L CONN_01X14 P1
U 1 1 56D705A1
P 9750 1700
F 0 "P1" H 9750 2450 50 0000 C CNN
F 1 "Digital" V 9850 1700 50 0000 C CNN
F 2 "Socket_Arduino_Fio:Socket_Strip_Straight_1x14" H 9750 1700 50 0001 C CNN
F 3 "" H 9750 1700 50 0000 C CNN
1 9750 1700
1 0 0 -1
$EndComp
$Comp
L CONN_01X14 P2
U 1 1 56D706EC
P 10100 1700
F 0 "P2" H 10100 2450 50 0000 C CNN
F 1 "Analog" V 10200 1700 50 0000 C CNN
F 2 "Socket_Arduino_Fio:Socket_Strip_Straight_1x14" H 10100 1700 50 0001 C CNN
F 3 "" H 10100 1700 50 0000 C CNN
1 10100 1700
-1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR01
U 1 1 56D707AD
P 9450 950
F 0 "#PWR01" H 9450 800 50 0001 C CNN
F 1 "+3.3V" H 9450 1090 50 0000 C CNN
F 2 "" H 9450 950 50 0000 C CNN
F 3 "" H 9450 950 50 0000 C CNN
1 9450 950
1 0 0 -1
$EndComp
Wire Wire Line
9550 1050 9450 1050
Wire Wire Line
9450 1050 9450 950
Wire Wire Line
9550 1150 9450 1150
$Comp
L GND #PWR02
U 1 1 56D7084A
P 9450 2450
F 0 "#PWR02" H 9450 2200 50 0001 C CNN
F 1 "GND" H 9450 2300 50 0000 C CNN
F 2 "" H 9450 2450 50 0000 C CNN
F 3 "" H 9450 2450 50 0000 C CNN
1 9450 2450
1 0 0 -1
$EndComp
Wire Wire Line
9450 1150 9450 2450
Wire Wire Line
8850 1250 9550 1250
Wire Wire Line
8850 1350 9550 1350
Wire Wire Line
8850 1450 9550 1450
Wire Wire Line
9550 1550 8850 1550
Wire Wire Line
8850 1650 9550 1650
Wire Wire Line
8850 1750 9550 1750
Wire Wire Line
8850 1850 9550 1850
Wire Wire Line
9550 1950 8850 1950
Wire Wire Line
8850 2050 9550 2050
Wire Wire Line
8850 2150 9550 2150
Wire Wire Line
8850 2250 9550 2250
Wire Wire Line
9550 2350 8850 2350
Wire Wire Line
10300 1250 10400 1250
Wire Wire Line
10400 1250 10400 950
$Comp
L +3.3V #PWR03
U 1 1 56D70A18
P 10400 950
F 0 "#PWR03" H 10400 800 50 0001 C CNN
F 1 "+3.3V" H 10400 1090 50 0000 C CNN
F 2 "" H 10400 950 50 0000 C CNN
F 3 "" H 10400 950 50 0000 C CNN
1 10400 950
1 0 0 -1
$EndComp
Wire Wire Line
10300 1050 10500 1050
Wire Wire Line
10500 1050 10500 2450
$Comp
L GND #PWR04
U 1 1 56D70A5E
P 10500 2450
F 0 "#PWR04" H 10500 2200 50 0001 C CNN
F 1 "GND" H 10500 2300 50 0000 C CNN
F 2 "" H 10500 2450 50 0000 C CNN
F 3 "" H 10500 2450 50 0000 C CNN
1 10500 2450
1 0 0 -1
$EndComp
Wire Wire Line
10300 1150 10700 1150
Wire Wire Line
10700 1350 10300 1350
Wire Wire Line
10700 1450 10300 1450
Wire Wire Line
10700 1550 10300 1550
Wire Wire Line
10700 1650 10300 1650
Wire Wire Line
10300 1750 10700 1750
Wire Wire Line
10700 1850 10300 1850
Wire Wire Line
10700 1950 10300 1950
Wire Wire Line
10700 2050 10300 2050
Wire Wire Line
10300 2150 10700 2150
Wire Wire Line
10700 2250 10300 2250
Wire Wire Line
10700 2350 10300 2350
Text Notes 9850 1050 0 60 ~ 0
1
$EndSCHEMATC