+ Updated Atmel library
+ Moved DIP Packages to dip_sockets.mod from support.mod + Made DIP Packages board
This commit is contained in:
jerryjacobs
parent
2ae2d5eab6
commit
edbb878cfe
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@ -1,4 +1,4 @@
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EESchema-DOCLIB Version 2.0 Date: 4/10/2008-22:08:42
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EESchema-DOCLIB Version 2.0 Date: 12/10/2008-09:48:58
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#
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$CMP ATMEGA16-A
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D 8 Bit AVR Microcontroller, 16kB Flash, 1024B SRAM, 512B EEPROM
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@ -1,4 +1,4 @@
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EESchema-LIBRARY Version 2.3 Date: 4/10/2008-22:08:42
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EESchema-LIBRARY Version 2.3 Date: 12/10/2008-09:48:58
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#
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# ATMEGA16-A
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#
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@ -10,10 +10,10 @@ $FPLIST
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TQFP44
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$ENDFPLIST
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DRAW
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P 2 1 0 0 -900 -1800 -900 1800 N
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P 2 1 0 0 900 -1800 -900 -1800 N
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P 2 1 0 0 900 1800 900 -1800 N
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P 2 1 0 0 -900 1800 900 1800 N
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P 2 1 0 0 900 1800 900 -1800 N
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P 2 1 0 0 900 -1800 -900 -1800 N
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P 2 1 0 0 -900 -1800 -900 1800 N
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X VCC 5 -150 2000 200 D 40 40 1 1 W
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X VCC 17 -50 2000 200 D 40 40 1 1 W
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X AVCC 27 50 2000 200 D 40 40 1 1 W
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@ -71,10 +71,10 @@ $FPLIST
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MLF44
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$ENDFPLIST
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DRAW
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P 2 1 0 0 -900 -1800 -900 1800 N
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P 2 1 0 0 900 -1800 -900 -1800 N
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P 2 1 0 0 900 1800 900 -1800 N
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P 2 1 0 0 -900 1800 900 1800 N
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P 2 1 0 0 900 1800 900 -1800 N
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P 2 1 0 0 900 -1800 -900 -1800 N
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P 2 1 0 0 -900 -1800 -900 1800 N
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X VCC 5 -150 2000 200 D 40 40 1 1 W
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X VCC 17 -50 2000 200 D 40 40 1 1 W
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X AVCC 27 50 2000 200 D 40 40 1 1 W
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@ -133,10 +133,10 @@ $FPLIST
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40dip600
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$ENDFPLIST
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DRAW
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P 2 1 0 0 -800 1700 800 1700 N
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P 2 1 0 0 800 1700 800 -1900 N
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P 2 1 0 0 800 -1900 -800 -1900 N
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P 2 1 0 0 -800 -1900 -800 1700 N
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P 2 1 0 0 800 -1900 -800 -1900 N
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P 2 1 0 0 800 1700 800 -1900 N
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P 2 1 0 0 -800 1700 800 1700 N
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X VCC 10 -50 1900 200 D 40 40 1 1 W
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X AVCC 30 50 1900 200 D 40 40 1 1 W
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X (RXD)PD0 14 1000 -1800 200 L 40 40 1 1 B
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@ -190,10 +190,10 @@ $FPLIST
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TQFP44
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$ENDFPLIST
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DRAW
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P 2 1 0 0 -800 -1800 -800 1800 N
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P 2 1 0 0 800 -1800 -800 -1800 N
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P 2 1 0 0 800 1800 800 -1800 N
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P 2 1 0 0 -800 1800 800 1800 N
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P 2 1 0 0 800 1800 800 -1800 N
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P 2 1 0 0 800 -1800 -800 -1800 N
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P 2 1 0 0 -800 -1800 -800 1800 N
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X VCC 5 -150 2000 200 D 40 40 1 1 W
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X VCC 17 -50 2000 200 D 40 40 1 1 W
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X AVCC 27 50 2000 200 D 40 40 1 1 W
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@ -251,10 +251,10 @@ $FPLIST
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MLF44
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$ENDFPLIST
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DRAW
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P 2 1 0 0 -800 -1800 -800 1800 N
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P 2 1 0 0 800 -1800 -800 -1800 N
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P 2 1 0 0 800 1800 800 -1800 N
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P 2 1 0 0 -800 1800 800 1800 N
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P 2 1 0 0 800 1800 800 -1800 N
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P 2 1 0 0 800 -1800 -800 -1800 N
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P 2 1 0 0 -800 -1800 -800 1800 N
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X VCC 5 -150 2000 200 D 40 40 1 1 W
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X VCC 17 -50 2000 200 D 40 40 1 1 W
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X AVCC 27 50 2000 200 D 40 40 1 1 W
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@ -313,10 +313,10 @@ $FPLIST
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40dip600
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$ENDFPLIST
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DRAW
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P 2 1 0 0 -800 -1800 -800 1800 N
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P 2 1 0 0 800 -1800 -800 -1800 N
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P 2 1 0 0 800 1800 800 -1800 N
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P 2 1 0 0 -800 1800 800 1800 N
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P 2 1 0 0 800 1800 800 -1800 N
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P 2 1 0 0 800 -1800 -800 -1800 N
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P 2 1 0 0 -800 -1800 -800 1800 N
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X VCC 10 -50 2000 200 D 40 40 1 1 W
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X AVCC 30 50 2000 200 D 40 40 1 1 W
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X (RXD)PD0 14 1000 -1700 200 L 40 40 1 1 B
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@ -367,10 +367,10 @@ F0 "IC" -1100 2150 50 H V L B
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F1 "ATMEGA64-A" 500 -2500 50 H V L B
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F2 "TQFP64" 800 -2575 50 H I C C
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DRAW
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P 2 1 0 0 -1100 -2400 -1100 2100 N
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P 2 1 0 0 1100 -2400 -1100 -2400 N
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P 2 1 0 0 1100 2100 1100 -2400 N
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P 2 1 0 0 -1100 2100 1100 2100 N
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P 2 1 0 0 1100 2100 1100 -2400 N
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P 2 1 0 0 1100 -2400 -1100 -2400 N
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P 2 1 0 0 -1100 -2400 -1100 2100 N
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X VCC 21 -100 2300 200 D 40 40 1 1 W
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X VCC 52 0 2300 200 D 40 40 1 1 W
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X AVCC 64 100 2300 200 D 40 40 1 1 B
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@ -445,10 +445,10 @@ F0 "IC" -1100 2150 50 H V L B
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F1 "ATMEGA64-M" 500 -2500 50 H V L B
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F2 "MLF64" 800 -2575 50 H I C C
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DRAW
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P 2 1 0 0 -1100 2100 1100 2100 N
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P 2 1 0 0 1100 2100 1100 -2400 N
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P 2 1 0 0 1100 -2400 -1100 -2400 N
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P 2 1 0 0 -1100 -2400 -1100 2100 N
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P 2 1 0 0 1100 -2400 -1100 -2400 N
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P 2 1 0 0 1100 2100 1100 -2400 N
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P 2 1 0 0 -1100 2100 1100 2100 N
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X VCC 21 -100 2300 200 D 40 40 1 1 W
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X VCC 52 0 2300 200 D 40 40 1 1 W
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X AVCC 64 100 2300 200 D 40 40 1 1 B
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@ -526,10 +526,10 @@ $FPLIST
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TQFP32
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$ENDFPLIST
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DRAW
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P 2 1 0 0 -700 -1400 -700 1100 N
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P 2 1 0 0 800 -1400 -700 -1400 N
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P 2 1 0 0 800 1100 800 -1400 N
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P 2 1 0 0 -700 1100 800 1100 N
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P 2 1 0 0 800 1100 800 -1400 N
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P 2 1 0 0 800 -1400 -700 -1400 N
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P 2 1 0 0 -700 -1400 -700 1100 N
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X VCC 4 -50 1300 200 D 40 40 1 1 B
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X VCC 6 50 1300 200 D 40 40 1 1 B
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X PB5(SCK) 17 1000 -1300 200 L 40 40 1 1 B
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@ -575,10 +575,10 @@ $FPLIST
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MLF32
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$ENDFPLIST
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DRAW
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P 2 1 0 0 -700 1100 800 1100 N
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P 2 1 0 0 800 1100 800 -1400 N
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P 2 1 0 0 800 -1400 -700 -1400 N
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P 2 1 0 0 -700 -1400 -700 1100 N
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P 2 1 0 0 800 -1400 -700 -1400 N
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P 2 1 0 0 800 1100 800 -1400 N
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P 2 1 0 0 -700 1100 800 1100 N
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X VCC 4 -50 1300 200 D 40 40 1 1 B
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X VCC 6 50 1300 200 D 40 40 1 1 B
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X PB5(SCK) 17 1000 -1300 200 L 40 40 1 1 B
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@ -625,10 +625,10 @@ $FPLIST
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28dip600
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$ENDFPLIST
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DRAW
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P 2 1 0 0 -700 1200 800 1200 N
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P 2 1 0 0 800 1200 800 -1300 N
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P 2 1 0 0 800 -1300 -700 -1300 N
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P 2 1 0 0 -700 -1300 -700 1200 N
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P 2 1 0 0 800 -1300 -700 -1300 N
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P 2 1 0 0 800 1200 800 -1300 N
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P 2 1 0 0 -700 1200 800 1200 N
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X VCC 7 0 1400 200 D 40 40 1 1 B
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X PB5(SCK) 19 1000 -1200 200 L 40 40 1 1 B
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X PB4(MISO) 18 1000 -1100 200 L 40 40 1 1 B
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@ -662,101 +662,89 @@ ENDDEF
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#
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# AVR-ISP-10
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#
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DEF AVR-ISP-10 CON 0 40 Y Y 1 F N
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F0 "CON" -170 330 50 H V C C
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F1 "AVR-ISP-10" -340 -330 50 H V L B
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F2 "AVR-ISP-10" -750 50 50 V I C C
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DEF AVR-ISP-10 J 0 40 Y Y 1 F N
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F0 "J" -150 350 50 H V C C
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F1 "AVR-ISP-10" -275 -375 50 H V L B
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F2 "AVR-ISP-10" -625 0 50 V I C C
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DRAW
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S -280 -230 130 -250 0 1 0 F
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S -280 -40 -260 -250 0 1 0 F
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S -260 290 -280 40 0 1 0 F
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S 110 290 130 -230 0 1 0 F
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S -260 290 130 270 0 1 0 F
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T 0 -400 -200 45 0 1 0 MISO
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T 0 -380 -100 45 0 0 0 SCK
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T 0 -370 0 45 0 1 0 RST
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T 0 -450 100 45 0 1 0 LED/NC
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T 0 -390 200 45 0 1 0 MOSI
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T 0 230 200 45 0 0 0 VCC
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T 0 230 100 45 0 1 0 GND
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T 0 230 -200 45 0 1 0 GND
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T 0 230 -100 45 0 1 0 GND
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T 0 230 0 45 0 1 0 GND
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X ~ 10 50 -200 100 L 40 40 1 1 P
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X ~ 8 50 -100 100 L 40 40 1 1 P
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X ~ 6 50 0 100 L 40 40 1 1 P
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X ~ 4 50 100 100 L 40 40 1 1 P
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X ~ 2 50 200 100 L 40 40 1 1 P
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X ~ 9 -200 -200 100 R 40 40 1 1 P
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X ~ 7 -200 -100 100 R 40 40 1 1 P
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X ~ 5 -200 0 100 R 40 40 1 1 P
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X ~ 3 -200 100 100 R 40 40 1 1 P
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X ~ 1 -200 200 100 R 40 40 1 1 P
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S -200 300 200 -300 0 1 0 N
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T 0 -350 -200 45 0 1 0 MISO
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T 0 -330 -100 45 0 0 0 SCK
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T 0 -320 0 45 0 1 0 RST
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T 0 -400 100 45 0 1 0 LED/NC
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T 0 -340 200 45 0 1 0 MOSI
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T 0 330 200 45 0 0 0 VCC
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T 0 330 100 45 0 1 0 GND
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T 0 330 -200 45 0 1 0 GND
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T 0 330 -100 45 0 1 0 GND
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T 0 330 0 45 0 1 0 GND
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X ~ 10 150 -200 100 L 40 40 1 1 P
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X ~ 8 150 -100 100 L 40 40 1 1 P
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X ~ 6 150 0 100 L 40 40 1 1 P
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X ~ 4 150 100 100 L 40 40 1 1 P
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X ~ 2 150 200 100 L 40 40 1 1 P
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X ~ 9 -150 -200 100 R 40 40 1 1 P
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X ~ 7 -150 -100 100 R 40 40 1 1 P
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X ~ 5 -150 0 100 R 40 40 1 1 P
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X ~ 3 -150 100 100 R 40 40 1 1 P
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X ~ 1 -150 200 100 R 40 40 1 1 P
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ENDDRAW
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ENDDEF
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#
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# AVR-ISP-6
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#
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DEF AVR-ISP-6 CON 0 40 Y Y 1 F N
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F0 "CON" -80 240 50 H V C C
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F1 "AVR-ISP-6" -240 -230 50 H V L B
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F2 "AVR-ISP-6" -520 40 50 V I C C
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DEF AVR-ISP-6 J 0 40 Y Y 1 F N
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F0 "J" -150 250 50 H V C C
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F1 "AVR-ISP-6" -250 -275 50 H V L B
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F2 "AVR-ISP-6" -500 0 50 V I C C
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DRAW
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S -180 200 180 180 0 1 0 F
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S -180 -140 190 -160 0 1 0 F
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S -175 -160 -195 -40 0 1 0 F
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S -175 200 -195 40 0 1 0 F
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S 180 200 200 -160 0 1 0 F
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S -200 200 200 -200 0 1 0 N
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T 0 -308 102 45 0 1 0 MISO
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T 0 -290 5 45 0 0 0 SCK
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T 0 -290 -100 45 0 1 0 RST
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T 0 332 -2 45 0 1 0 MOSI
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T 0 300 110 45 0 0 0 VCC
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T 0 310 -105 45 0 1 0 GND
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X ~ 6 125 -100 100 L 40 40 1 1 P
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X ~ 4 125 0 100 L 40 40 1 1 P
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X ~ 2 125 100 100 L 40 40 1 1 P
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X ~ 5 -125 -100 100 R 40 40 1 1 P
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X ~ 3 -125 0 100 R 40 40 1 1 P
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X ~ 1 -125 100 100 R 40 40 1 1 P
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X ~ 6 150 -100 100 L 40 40 1 1 P
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X ~ 4 150 0 100 L 40 40 1 1 P
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X ~ 2 150 100 100 L 40 40 1 1 P
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X ~ 5 -150 -100 100 R 40 40 1 1 P
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X ~ 3 -150 0 100 R 40 40 1 1 P
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X ~ 1 -150 100 100 R 40 40 1 1 P
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ENDDRAW
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ENDDEF
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#
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# AVR-JTAG-10
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#
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DEF AVR-JTAG-10 CON 0 40 Y Y 1 F N
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F0 "CON" -170 330 50 H V C C
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F1 "AVR-JTAG-10" -340 -330 50 H V L B
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F2 "AVR-JTAG-10" -570 20 50 V I C C
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DEF AVR-JTAG-10 J 0 40 Y Y 1 F N
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F0 "J" -150 350 50 H V C C
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F1 "AVR-JTAG-10" -275 -375 50 H V L B
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F2 "AVR-JTAG-10" -525 25 50 V I C C
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$FPLIST
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AVR-JTAG-10
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$ENDFPLIST
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DRAW
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S -280 -230 130 -250 0 1 0 F
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S -280 -40 -260 -250 0 1 0 F
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S -260 290 -280 40 0 1 0 F
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S 110 290 130 -230 0 1 0 F
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S -260 290 130 270 0 1 0 F
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T 0 -370 -200 45 0 1 0 TDI
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T 0 -360 -100 45 0 0 0 NC
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T 0 -380 0 45 0 1 0 TMS
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T 0 -380 100 45 0 1 0 TDO
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T 0 -380 200 45 0 1 0 TCK
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T 0 230 200 45 0 0 0 GND
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T 0 260 100 45 0 1 0 VREF
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T 0 240 -200 45 0 1 0 GND
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T 0 290 -100 45 0 1 0 nTRST
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T 0 290 0 45 0 1 0 nSRST
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X ~ 10 50 -200 100 L 40 40 1 1 P
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X ~ 8 50 -100 100 L 40 40 1 1 P
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X ~ 6 50 0 100 L 40 40 1 1 P
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X ~ 4 50 100 100 L 40 40 1 1 P
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X ~ 2 50 200 100 L 40 40 1 1 P
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X ~ 9 -200 -200 100 R 40 40 1 1 P
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X ~ 7 -200 -100 100 R 40 40 1 1 P
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X ~ 5 -200 0 100 R 40 40 1 1 P
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X ~ 3 -200 100 100 R 40 40 1 1 P
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X ~ 1 -200 200 100 R 40 40 1 1 P
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S -200 300 200 -300 0 1 0 N
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T 0 -320 -200 45 0 1 0 TDI
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T 0 -310 -100 45 0 0 0 NC
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T 0 -330 0 45 0 1 0 TMS
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T 0 -330 100 45 0 1 0 TDO
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T 0 -330 200 45 0 1 0 TCK
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T 0 330 200 45 0 0 0 GND
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T 0 360 100 45 0 1 0 VREF
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T 0 340 -200 45 0 1 0 GND
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T 0 390 -100 45 0 1 0 nTRST
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T 0 390 0 45 0 1 0 nSRST
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X ~ 10 150 -200 100 L 40 40 1 1 P
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X ~ 8 150 -100 100 L 40 40 1 1 P
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X ~ 6 150 0 100 L 40 40 1 1 P
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X ~ 4 150 100 100 L 40 40 1 1 P
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X ~ 2 150 200 100 L 40 40 1 1 P
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X ~ 9 -150 -200 100 R 40 40 1 1 P
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X ~ 7 -150 -100 100 R 40 40 1 1 P
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X ~ 5 -150 0 100 R 40 40 1 1 P
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X ~ 3 -150 100 100 R 40 40 1 1 P
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X ~ 1 -150 200 100 R 40 40 1 1 P
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ENDDRAW
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ENDDEF
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#
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8572
modules/dip_sockets.brd
Normal file
8572
modules/dip_sockets.brd
Normal file
File diff suppressed because it is too large
Load diff
9016
modules/dip_sockets.mod
Normal file
9016
modules/dip_sockets.mod
Normal file
File diff suppressed because it is too large
Load diff
9019
modules/supports.mod
9019
modules/supports.mod
File diff suppressed because it is too large
Load diff
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Reference in a new issue