From ed02d3a01fe06afaff7aed18f1d799f1723bbda8 Mon Sep 17 00:00:00 2001
From: Lubomir Rintel <lkundrak@v3.sk>
Date: Fri, 24 Apr 2015 00:20:47 +0200
Subject: [PATCH] intel: add 8088

---
 library/intel.dcm |  6 +++++
 library/intel.lib | 56 +++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 62 insertions(+)

diff --git a/library/intel.dcm b/library/intel.dcm
index 5a565a44..095355bd 100644
--- a/library/intel.dcm
+++ b/library/intel.dcm
@@ -41,6 +41,12 @@ D 8050, MCS-48 8-bit Microcontroller, 4KB Mask ROM, 256B RAM, DIP-40
 K MCS-48 uC Microcontroller
 $ENDCMP
 #
+$CMP 8088
+D 8088, 8-Bit HMOS Microprocessor, PDIP-40
+K MPRO
+F http://datasheets.chipdb.org/Intel/x86/808x/datashts/8088/231456-006.pdf
+$ENDCMP
+#
 $CMP 8250
 D PC8250A, Universal Asynchronous Receiver/Transmitter, PDIP-40
 K 1ch UART
diff --git a/library/intel.lib b/library/intel.lib
index cdf0ea79..75696f23 100644
--- a/library/intel.lib
+++ b/library/intel.lib
@@ -170,6 +170,62 @@ X T1 39 -700 -1100 150 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# 8088
+#
+DEF 8088 U 0 40 Y Y 1 F N
+F0 "U" -500 1700 50 H V C CNN
+F1 "8088" 400 1700 50 H V C CNN
+F2 "DIP-40" 50 100 50 H V C CIN
+F3 "" 0 50 50 H V C CNN
+$FPLIST
+ DIP*
+ PDIP*
+$ENDFPLIST
+DRAW
+S 550 -1650 -550 1650 0 1 10 f
+X GND 1 -100 -1800 150 U 50 50 1 1 W
+X A14 2 700 -400 150 L 50 50 1 1 O
+X A13 3 700 -300 150 L 50 50 1 1 O
+X A12 4 700 -200 150 L 50 50 1 1 O
+X A11 5 700 -100 150 L 50 50 1 1 O
+X A10 6 700 0 150 L 50 50 1 1 O
+X A9 7 700 100 150 L 50 50 1 1 O
+X A8 8 700 200 150 L 50 50 1 1 O
+X AD7 9 700 400 150 L 50 50 1 1 B
+X AD6 10 700 500 150 L 50 50 1 1 B
+X GND 20 100 -1800 150 U 50 50 1 1 W
+X HLDA 30 -700 300 150 R 50 50 1 1 O
+X VCC 40 0 1800 150 D 50 50 1 1 W
+X AD5 11 700 600 150 L 50 50 1 1 B
+X RESET 21 -700 1100 150 R 50 50 1 1 I
+X HOLD 31 -700 100 150 R 50 50 1 1 I
+X AD4 12 700 700 150 L 50 50 1 1 B
+X READY 22 -700 1300 150 R 50 50 1 1 I
+X ~RD~ 32 700 -1400 150 L 50 50 1 1 O V
+X AD3 13 700 800 150 L 50 50 1 1 B
+X ~TEST~ 23 -700 -300 150 R 50 50 1 1 I
+X MN/~MX~ 33 -700 -500 150 R 50 50 1 1 I
+X AD2 14 700 900 150 L 50 50 1 1 B
+X ~INTA~ 24 -700 500 150 R 50 50 1 1 O
+X ~SSO~ 34 -700 -100 150 R 50 50 1 1 O
+X AD1 15 700 1000 150 L 50 50 1 1 B
+X ALE 25 700 1300 150 L 50 50 1 1 O
+X A19/S6 35 700 -1000 150 L 50 50 1 1 O
+X AD0 16 700 1100 150 L 50 50 1 1 B
+X DEN 26 700 1400 150 L 50 50 1 1 O
+X A18/S5 36 700 -900 150 L 50 50 1 1 O
+X NMI 17 -700 900 150 R 50 50 1 1 I
+X DT/~R~ 27 700 1500 150 L 50 50 1 1 O
+X A17/S4 37 700 -800 150 L 50 50 1 1 O
+X INTR 18 -700 700 150 R 50 50 1 1 I
+X IO/~M~ 28 700 -1200 150 L 50 50 1 1 O
+X A16/S3 38 700 -700 150 L 50 50 1 1 O
+X CLK 19 -700 1500 150 R 50 50 1 1 I C
+X WR 29 700 -1300 150 L 50 50 1 1 O
+X A15 39 700 -500 150 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
 # 8252
 #
 DEF 8252 U 0 40 Y Y 1 F N