diff --git a/library/intersil.lib b/library/intersil.lib
index 1aba99ef..a5b93660 100644
--- a/library/intersil.lib
+++ b/library/intersil.lib
@@ -256,16 +256,38 @@ X BHS 19 500 100 100 L 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
-# ICL7673
+# ICL7673CBAZA
 #
-DEF ICL7673 U 0 40 Y Y 1 F N
+DEF ICL7673CBAZA U 0 40 Y Y 1 F N
 F0 "U" -240 250 50 H V C CNN
-F1 "ICL7673" 150 250 50 H V L CNN
-F2 "" 0 0 50 H I C CNN
+F1 "ICL7673CBAZA" 150 250 50 H V L CNN
+F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 40 -450 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
- *SOIC*3*9*
- *DIP*7*62*
+ SOIC*3.9x4.9mm*Pitch1.27mm*
+$ENDFPLIST
+DRAW
+X VO 1 500 100 100 L 50 50 1 0 w
+X VS 2 100 300 100 D 50 50 1 0 W
+X SBAR 3 500 0 100 L 50 50 1 0 C
+X GND 4 0 -300 100 U 50 50 1 0 W
+X NC 5 -200 -300 100 U 50 50 1 0 N N
+X PBAR 6 500 -100 100 L 50 50 1 0 C
+X NC 7 -100 -300 100 U 50 50 1 0 N N
+X VP 8 0 300 100 D 50 50 1 0 W
+S -300 200 400 -200 0 1 10 f
+ENDDRAW
+ENDDEF
+#
+# ICL7673CPAZ
+#
+DEF ICL7673CPAZ U 0 40 Y Y 1 F N
+F0 "U" -240 250 50 H V C CNN
+F1 "ICL7673CPAZ" 150 250 50 H V L CNN
+F2 "Housings_DIP:DIP-8_W7.62mm" 40 -450 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ ?DIP*W7.62mm*
 $ENDFPLIST
 DRAW
 X VO 1 500 100 100 L 50 50 1 0 w