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Put pin SPLIT between CANH and CANL; modified default housing reference, field position and visibility

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Joachim 2016-06-02 12:32:18 +02:00
parent 918b5f9cfb
commit ce3f7adca3
1 changed files with 10 additions and 10 deletions
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20
library/interface.lib
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@ -2571,7 +2571,7 @@ ENDDEF
DEF TJA1021T U 0 40 Y Y 1 F N
F0 "U" -400 350 50 H V L CNN
F1 "TJA1021T" 50 350 50 H V L CNN
F2 "SOIC-8" 0 0 50 H V C CIN
F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 -500 50 H I C CIN
F3 "" -400 450 50 H V C CNN
$FPLIST
SOIC-8*
@ -2594,7 +2594,7 @@ ENDDEF
DEF TJA1021TK U 0 40 Y Y 1 F N
F0 "U" -400 350 50 H V L CNN
F1 "TJA1021TK" 50 350 50 H V L CNN
F2 "DFN-8-1EP" 0 0 50 H V C CIN
F2 "Housings_DFN_QFN:DFN-8-1EP_3x3mm_Pitch0.65mm" 0 -500 50 H I C CIN
F3 "" 0 0 50 H V C CNN
$FPLIST
DFN-8*
@ -2619,7 +2619,7 @@ ENDDEF
DEF TJA1029T U 0 40 Y Y 1 F N
F0 "U" -400 350 50 H V L CNN
F1 "TJA1029T" 50 350 50 H V L CNN
F2 "SOIC-8" 0 0 50 H V C CIN
F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 -500 50 H I C CIN
F3 "" 0 0 50 H V C CNN
$FPLIST
SOIC-8*
@ -2642,7 +2642,7 @@ ENDDEF
DEF TJA1029TK U 0 40 Y Y 1 F N
F0 "U" -400 350 50 H V L CNN
F1 "TJA1029TK" 50 350 50 H V L CNN
F2 "DFN-8-1EP" 0 0 50 H V C CIN
F2 "Housings_DFN_QFN:DFN-8-1EP_3x3mm_Pitch0.65mm" 0 -500 50 H I C CIN
F3 "" 0 0 50 H V C CNN
$FPLIST
DFN-8*
@ -2667,7 +2667,7 @@ ENDDEF
DEF TJA1049T U 0 40 Y Y 1 F N
F0 "U" -400 350 50 H V L CNN
F1 "TJA1049T" 50 350 50 H V L CNN
F2 "SOIC-8" 0 0 50 H V C CIN
F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 -500 50 H I C CIN
F3 "" 0 0 50 H V C CNN
$FPLIST
SOIC-8*
@ -2678,7 +2678,7 @@ X TXD 1 -500 100 100 R 50 50 1 1 I
X GND 2 0 -400 100 U 50 50 1 1 W
X VCC 3 0 400 100 D 50 50 1 1 W
X RXD 4 -500 200 100 R 50 50 1 1 O
X SPLIT 5 500 -200 100 L 50 50 1 1 w
X SPLIT 5 500 0 100 L 50 50 1 1 w
X CANL 6 500 -100 100 L 50 50 1 1 B
X CANH 7 500 100 100 L 50 50 1 1 B
X STB 8 -500 -200 100 R 50 50 1 1 I
@ -2690,7 +2690,7 @@ ENDDEF
DEF TJA1049T/3 U 0 40 Y Y 1 F N
F0 "U" -400 350 50 H V L CNN
F1 "TJA1049T/3" 50 350 50 H V L CNN
F2 "SOIC-8" 0 0 50 H V C CIN
F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 -500 50 H I C CIN
F3 "" 0 0 50 H V C CNN
$FPLIST
SOIC-8*
@ -2713,7 +2713,7 @@ ENDDEF
DEF TJA1049TK U 0 40 Y Y 1 F N
F0 "U" -400 350 50 H V L CNN
F1 "TJA1049TK" 50 350 50 H V L CNN
F2 "DFN-8-1EP" 0 0 50 H V C CIN
F2 "Housings_DFN_QFN:DFN-8-1EP_3x3mm_Pitch0.65mm" 0 -500 50 H I C CIN
F3 "" 0 0 50 H V C CNN
$FPLIST
DFN-8*
@ -2725,7 +2725,7 @@ X TXD 1 -500 100 100 R 50 50 1 1 I
X GND 2 0 -400 100 U 50 50 1 1 W
X VCC 3 0 400 100 D 50 50 1 1 W
X RXD 4 -500 200 100 R 50 50 1 1 O
X SPLIT 5 500 -200 100 L 50 50 1 1 w
X SPLIT 5 500 0 100 L 50 50 1 1 w
X CANL 6 500 -100 100 L 50 50 1 1 B
X CANH 7 500 100 100 L 50 50 1 1 B
X STB 8 -500 -200 100 R 50 50 1 1 I
@ -2738,7 +2738,7 @@ ENDDEF
DEF TJA1049TK/3 U 0 40 Y Y 1 F N
F0 "U" -400 350 50 H V L CNN
F1 "TJA1049TK/3" 50 350 50 H V L CNN
F2 "DFN-8-1EP" 0 0 50 H V C CIN
F2 "Housings_DFN_QFN:DFN-8-1EP_3x3mm_Pitch0.65mm" 0 -500 50 H I C CIN
F3 "" 0 0 50 H V C CNN
$FPLIST
DFN-8*