Merge branch 'master' of https://github.com/KiCad/kicad-library into modify_resistor_3Dmodels

README.md

@@ -1,15 +1,19 @@
-kicad-library
+KiCad Library
 =============
 
-The schematic and 3D libraries supported by KiCad team.
+This repository contains the official schematic and 3D libraries supported by the KiCad library team.
 
 The footprint libraries are the `*.pretty` repos themselves and are used online by default. If you want to download them locally, the `library-repos-install.bat` and `library-repos-install.sh` scripts [in the KiCad source](http://bazaar.launchpad.net/~kicad-product-committers/kicad/product/files/head:/scripts/) can do this automatically.
 
 
-For more information, please check: http://kicad-pcb.org/contribute/librarians/
-
-
 How to Contribute
 =================
 
-Please, check the [CONTRIBUTING.md](CONTRIBUTING.md) file.
+Please, check the [CONTRIBUTING.md](CONTRIBUTING.md) file, or refer to the [Wiki Page](https://github.com/KiCad/kicad-library/wiki/How-To-Contribute).
+
+Further Information
+===================
+
+* [KiCad Website](http://kicad-pcb.org/contribute/librarians/)
+* [KiCad Library Convention](https://github.com/KiCad/kicad-library/wiki/Kicad-Library-Convention) (KLC)
+* [KiCad Library Wiki](https://github.com/KiCad/kicad-library/wiki)

library/adc-dac.dcm

@@ -449,6 +449,18 @@ K sigma-delta adc
 F http://cds.linear.com/docs/en/datasheet/18645lfs.pdf
 $ENDCMP
 #
+$CMP LTC2508CDKD-32
+D 32-Bit Oversampling ADC with Configurable Digital Filter, 0°C to 70°C, DFN-24 package
+K LT ADC 32bit
+F http://cds.linear.com/docs/en/datasheet/250832fa.pdf
+$ENDCMP
+#
+$CMP LTC2508IDKD-32
+D 32-Bit Oversampling ADC with Configurable Digital Filter, -40°C to 85°C, DFN-24 package
+K LT ADC 32bit
+F http://cds.linear.com/docs/en/datasheet/250832fa.pdf
+$ENDCMP
+#
 $CMP MAX11614
 D 8-channel single-ended or 4-channel, differential, 12-bit ADC, I2C, 4.096V internal reference, 16-QSOP package
 K adc i2c

library/adc-dac.lib

@@ -1617,6 +1617,44 @@ X VCC 8 -100 400 150 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# LTC2508CDKD-32
+#
+DEF LTC2508CDKD-32 U 0 40 Y Y 1 F N
+F0 "U" -400 750 50 H V R CNN
+F1 "LTC2508CDKD-32" 900 750 50 H V R CNN
+F2 "Housings_DFN_QFN:DFN-24-1EP_4x7mm_Pitch0.5mm" -950 -950 50 H I L CNN
+F3 "" 200 -1050 50 H I C CNN
+ALIAS LTC2508IDKD-32
+DRAW
+S -500 700 500 -700 0 1 10 f
+X RDLA 1 700 400 200 L 50 50 1 1 O I
+X RDLB 2 700 300 200 L 50 50 1 1 O I
+X VDD 3 -200 900 200 D 50 50 1 1 W
+X GND 4 -100 -900 200 U 50 50 1 1 W
+X IN+ 5 -700 400 200 R 50 50 1 1 I
+X IN- 6 -700 300 200 R 50 50 1 1 I
+X GND 7 0 -900 200 U 50 50 1 1 W
+X REF 8 0 900 200 D 50 50 1 1 P
+X REF 9 100 900 200 D 50 50 1 1 P
+X REF 10 200 900 200 D 50 50 1 1 P
+X SDOB 20 700 -400 200 L 50 50 1 1 T
+X SEL0 11 -700 -200 200 R 50 50 1 1 I
+X BUSY 21 700 100 200 L 50 50 1 1 O
+X SEL1 12 -700 -300 200 R 50 50 1 1 I
+X OVDD 22 -100 900 200 D 50 50 1 1 W
+X MCLK 13 -700 100 200 R 50 50 1 1 I C
+X GND 23 200 -900 200 U 50 50 1 1 W
+X SYNC 14 -700 0 200 R 50 50 1 1 I
+X GND 24 300 -900 200 U 50 50 1 1 W
+X DRL 15 700 200 200 L 50 50 1 1 O I
+X EPAD 25 -200 -900 200 U 50 50 1 1 W
+X GND 16 100 -900 200 U 50 50 1 1 W
+X SDOA 17 700 -200 200 L 50 50 1 1 T
+X SCKA 18 700 -100 200 L 50 50 1 1 I C
+X SCKB 19 700 -300 200 L 50 50 1 1 I C
+ENDDRAW
+ENDDEF
+#
 # MAX11614
 #
 DEF MAX11614 U 0 40 Y Y 1 F N

library/analog_devices.dcm

@@ -132,6 +132,12 @@ K Energy Metering
 F http://www.analog.com/media/en/technical-documentation/data-sheets/ADE7758.pdf
 $ENDCMP
 #
+$CMP ADM2484E
+D Isolated RS485/RS422 Transceiver, Half-/Full-Duplex, 500kbps,SOIC-16W
+K RS485 Transceiver RS422 Transceiver
+F http://www.analog.com/media/en/technical-documentation/data-sheets/ADM2484E.pdf
+$ENDCMP
+#
 $CMP ADM2582E
 D Isolated RS485/RS422 Transciever,Integrated Isolated DC-DC Converter, 16Mbps,SO-20
 K RS485 Transciever,RS422 Transciever

library/analog_devices.lib

@@ -160,6 +160,86 @@ X CLKIN 19 500 500 100 L 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# ADM2484E
+#
+DEF ADM2484E U 0 40 Y Y 1 F N
+F0 "U" 0 750 50 H V C CNN
+F1 "ADM2484E" 0 650 50 H V C CNN
+F2 "Housings_SOIC:SOIC-16W_7.5x10.3mm_Pitch1.27mm" 0 -700 50 H I C CNN
+F3 "" -750 50 50 H I C CNN
+$FPLIST
+ SOIC*7.5x10.3mm*Pitch1.27mm*
+$ENDFPLIST
+DRAW
+P 2 0 0 0 -25 -535 -25 -585 N
+P 2 0 0 0 -25 -460 -25 -510 N
+P 2 0 0 0 -25 -385 -25 -435 N
+P 2 0 0 0 -25 -310 -25 -360 N
+P 2 0 0 0 -25 -235 -25 -285 N
+P 2 0 0 0 -25 -160 -25 -210 N
+P 2 0 0 0 -25 -85 -25 -135 N
+P 2 0 0 0 -25 -10 -25 -60 N
+P 2 0 0 0 -25 65 -25 15 N
+P 2 0 0 0 -25 140 -25 90 N
+P 2 0 0 0 -25 215 -25 165 N
+P 2 0 0 0 -25 290 -25 240 N
+P 2 0 0 0 -25 365 -25 315 N
+P 2 0 0 0 -25 440 -25 390 N
+P 2 0 0 0 -25 515 -25 465 N
+P 2 0 0 0 -25 590 -25 540 N
+P 2 0 0 0 25 -535 25 -585 N
+P 2 0 0 0 25 -460 25 -510 N
+P 2 0 0 0 25 -385 25 -435 N
+P 2 0 0 0 25 -310 25 -360 N
+P 2 0 0 0 25 -235 25 -285 N
+P 2 0 0 0 25 -160 25 -210 N
+P 2 0 0 0 25 -85 25 -135 N
+P 2 0 0 0 25 -10 25 -60 N
+P 2 0 0 0 25 65 25 15 N
+P 2 0 0 0 25 140 25 90 N
+P 2 0 0 0 25 215 25 165 N
+P 2 0 0 0 25 290 25 240 N
+P 2 0 0 0 25 365 25 315 N
+P 2 0 0 0 25 440 25 390 N
+P 2 0 0 0 25 515 25 465 N
+P 2 0 0 0 25 590 25 540 N
+C 262 -299 12 0 1 0 N
+C 262 1 12 0 1 0 N
+S -500 600 500 -600 0 1 10 f
+P 2 0 1 0 -210 -200 -280 -200 N
+P 2 0 1 0 -210 0 -280 0 N
+P 2 0 1 0 -210 200 -280 200 N
+P 2 0 1 0 250 -200 340 -200 N
+P 2 0 1 0 250 100 340 100 N
+P 2 0 1 0 250 125 250 -25 N
+P 2 0 1 0 274 -300 340 -300 N
+P 2 0 1 0 274 0 340 0 N
+P 3 0 1 0 -280 -300 -160 -300 -160 -230 N
+P 3 0 1 0 90 200 200 200 200 85 N
+P 4 0 1 0 -210 -200 -100 -130 -100 -270 -210 -200 N
+P 4 0 1 0 -100 0 -210 70 -210 -70 -100 0 N
+P 4 0 1 0 -100 200 -210 270 -210 130 -100 200 N
+P 4 0 1 0 140 -250 250 -180 250 -320 140 -250 N
+P 4 0 1 0 250 50 140 120 140 -20 250 50 N
+X VDD1 1 -600 500 100 R 50 50 1 1 W
+X GND1 2 -600 400 100 R 50 50 1 1 W
+X RxD 3 -600 -200 100 R 50 50 1 1 O
+X ~RE 4 -600 -300 100 R 50 50 1 1 I
+X DE 5 -600 200 100 R 50 50 1 1 I
+X TxD 6 -600 0 100 R 50 50 1 1 I
+X NC 7 -600 -400 100 R 50 50 1 1 N N
+X GND1 8 -600 -500 100 R 50 50 1 1 W
+X GND2 9 600 -500 100 L 50 50 1 1 W
+X NC 10 600 -400 100 L 50 50 1 1 N N
+X Y 11 600 100 100 L 50 50 1 1 O
+X Z 12 600 0 100 L 50 50 1 1 O
+X B 13 600 -300 100 L 50 50 1 1 I
+X A 14 600 -200 100 L 50 50 1 1 I
+X GND2 15 600 400 100 L 50 50 1 1 W
+X VDD2 16 600 500 100 L 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # ADM2587E
 #
 DEF ADM2587E U 0 40 Y Y 1 F N

library/device.dcm

@@ -846,6 +846,21 @@ D resettable fuse, polymeric positive temperature coefficient (PPTC), small symb
 K resettable fuse PTC PPTC polyfuse polyswitch
 $ENDCMP
 #
+$CMP Q_DUAL_NPN_NPN_E1B1C2E2B2C1
+D Dual NPN/NPN Transistor, 6-pin package
+K NPN/NPN Transistor
+$ENDCMP
+#
+$CMP Q_DUAL_NPN_PNP_E1B1C2E2B2C1
+D Dual NPN/PNP Transistor, 6-pin package
+K NPN/PNP Transistor
+$ENDCMP
+#
+$CMP Q_DUAL_PNP_PNP_E1B1C2E2B2C1
+D Dual PNP/PNP Transistor, 6-pin package
+K PNP/PNP Transistor
+$ENDCMP
+#
 $CMP Q_NIGBT_CEG
 D Transistor N-IGBT (general)
 K igbt n-igbt transistor

library/device.lib

@@ -4001,6 +4001,95 @@ X ~ 2 0 -100 25 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# Q_DUAL_NPN_NPN_E1B1C2E2B2C1
+#
+DEF Q_DUAL_NPN_NPN_E1B1C2E2B2C1 Q 0 0 Y N 2 L N
+F0 "Q" 200 50 50 H V L CNN
+F1 "Q_DUAL_NPN_NPN_E1B1C2E2B2C1" 200 -50 50 H V L CNN
+F2 "" 200 100 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ SC?70*
+ SC?88*
+ SOT?363*
+$ENDFPLIST
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 0 -100 0 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X E1 1 100 -200 100 U 50 50 1 1 P
+X B1 2 -200 0 100 R 50 50 1 1 I
+X C1 6 100 200 100 D 50 50 1 1 P
+X C2 3 100 200 100 D 50 50 2 1 P
+X E2 4 100 -200 100 U 50 50 2 1 P
+X B2 5 -200 0 100 R 50 50 2 1 I
+ENDDRAW
+ENDDEF
+#
+# Q_DUAL_NPN_PNP_E1B1C2E2B2C1
+#
+DEF Q_DUAL_NPN_PNP_E1B1C2E2B2C1 Q 0 0 Y N 2 L N
+F0 "Q" 200 50 50 H V L CNN
+F1 "Q_DUAL_NPN_PNP_E1B1C2E2B2C1" 200 -50 50 H V L CNN
+F2 "" 200 100 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ SC?70*
+ SC?88*
+ SOT?363*
+$ENDFPLIST
+DRAW
+C 50 0 111 0 1 10 N
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 0 -100 0 N
+P 2 1 1 0 25 25 100 100 N
+P 3 1 1 0 25 -25 100 -100 100 -100 N
+P 3 1 1 20 25 75 25 -75 25 -75 N
+P 5 1 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X E1 1 100 -200 100 U 50 50 1 1 P
+X B1 2 -200 0 100 R 50 50 1 1 I
+X C1 6 100 200 100 D 50 50 1 1 P
+P 2 2 1 0 25 25 100 100 N
+P 3 2 1 0 25 -25 100 -100 100 -100 N
+P 3 2 1 20 25 75 25 -75 25 -75 N
+P 5 2 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C2 3 100 200 100 D 50 50 2 1 P
+X E2 4 100 -200 100 U 50 50 2 1 P
+X B2 5 -200 0 100 R 50 50 2 1 I
+ENDDRAW
+ENDDEF
+#
+# Q_DUAL_PNP_PNP_E1B1C2E2B2C1
+#
+DEF Q_DUAL_PNP_PNP_E1B1C2E2B2C1 Q 0 0 Y N 2 L N
+F0 "Q" 200 50 50 H V L CNN
+F1 "Q_DUAL_PNP_PNP_E1B1C2E2B2C1" 200 -50 50 H V L CNN
+F2 "" 200 100 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ SC?70*
+ SC?88*
+ SOT?363*
+$ENDFPLIST
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 0 -100 0 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X E1 1 100 -200 100 U 50 50 1 1 P
+X B1 2 -200 0 100 R 50 50 1 1 I
+X C1 6 100 200 100 D 50 50 1 1 P
+X C2 3 100 200 100 D 50 50 2 1 P
+X E2 4 100 -200 100 U 50 50 2 1 P
+X B2 5 -200 0 100 R 50 50 2 1 I
+ENDDRAW
+ENDDEF
+#
 # Q_NIGBT_CEG
 #
 DEF Q_NIGBT_CEG Q 0 0 Y N 1 F N

library/linear.dcm

@@ -771,12 +771,42 @@ K comparator, low power, push-pull
 F http://ww1.microchip.com/downloads/en/DeviceDoc/22139C.pdf
 $ENDCMP
 #
+$CMP MCP6566
+D Low power open drain output comparator
+K comparator low power open drain
+F http://ww1.microchip.com/downloads/en/DeviceDoc/DS20002143E.pdf
+$ENDCMP
+#
+$CMP MCP6566R
+D Low power open drain output comparator
+K comparator low power open drain
+F http://ww1.microchip.com/downloads/en/DeviceDoc/DS20002143E.pdf
+$ENDCMP
+#
+$CMP MCP6566U
+D Low power open drain output comparator
+K comparator low power open drain
+F http://ww1.microchip.com/downloads/en/DeviceDoc/DS20002143E.pdf
+$ENDCMP
+#
 $CMP MCP6567
 D Dual low power open drain output comparator
 K comparator, low power, open drain
 F http://www.farnell.com/datasheets/2133492.pdf
 $ENDCMP
 #
+$CMP MCP6L91
+D Rail-to-rail Op Amp, 10MHz, SOT-23-5
+K opamp rail-to-rail
+F http://ww1.microchip.com/downloads/en/DeviceDoc/22141b.pdf
+$ENDCMP
+#
+$CMP MCP6L91R
+D Rail-to-rail Op Amp, 10MHz, SOT-23-5
+K opamp rail-to-rail
+F http://ww1.microchip.com/downloads/en/DeviceDoc/22141b.pdf
+$ENDCMP
+#
 $CMP MIC845H
 D Precision single-input comparator, internal 2.55V reference, Active-High Push-Pull output, SC-70-5 package
 K comparator

library/linear.lib

@@ -1927,6 +1927,67 @@ X ~ 7 300 0 100 L 50 50 2 1 O
 ENDDRAW
 ENDDEF
 #
+# MCP6566
+#
+DEF MCP6566 U 0 20 Y Y 1 F N
+F0 "U" 0 200 50 H V L CNN
+F1 "MCP6566" 0 -200 50 H V L CNN
+F2 "" 0 -400 50 H I C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ SOT-23-*
+ SC?70*
+$ENDFPLIST
+DRAW
+P 4 0 1 10 -200 200 200 0 -200 -200 -200 200 f
+X V- 2 -100 -300 150 U 50 50 0 1 W
+X V+ 5 -100 300 150 D 50 50 0 1 W
+X ~ 1 300 0 100 L 50 50 1 1 C
+X + 3 -300 100 100 R 50 50 1 1 I
+X - 4 -300 -100 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# MCP6566R
+#
+DEF MCP6566R U 0 20 Y Y 1 F N
+F0 "U" 0 200 50 H V L CNN
+F1 "MCP6566R" 0 -200 50 H V L CNN
+F2 "TO_SOT_Packages_SMD:SOT-23-5" 0 -400 50 H I C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ SOT-23-*
+$ENDFPLIST
+DRAW
+P 4 0 1 10 -200 200 200 0 -200 -200 -200 200 f
+X V+ 2 -100 300 150 D 50 50 0 1 W
+X V- 5 -100 -300 150 U 50 50 0 1 W
+X ~ 1 300 0 100 L 50 50 1 1 C
+X + 3 -300 100 100 R 50 50 1 1 I
+X - 4 -300 -100 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# MCP6566U
+#
+DEF MCP6566U U 0 20 Y Y 1 F N
+F0 "U" 0 200 50 H V L CNN
+F1 "MCP6566U" 0 -200 50 H V L CNN
+F2 "TO_SOT_Packages_SMD:SOT-23-5" 0 -400 50 H I C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ SOT-23-*
+$ENDFPLIST
+DRAW
+P 4 0 1 10 -200 200 200 0 -200 -200 -200 200 f
+X V- 2 -100 -300 150 U 50 50 0 1 W
+X V+ 5 -100 300 150 D 50 50 0 1 W
+X + 1 -300 100 100 R 50 50 1 1 I
+X - 3 -300 -100 100 R 50 50 1 1 I
+X ~ 4 300 0 100 L 50 50 1 1 C
+ENDDRAW
+ENDDEF
+#
 # MCP6567
 #
 DEF MCP6567 U 0 20 Y Y 2 F N
@@ -1951,6 +2012,46 @@ X ~ 7 300 0 100 L 50 50 2 1 C
 ENDDRAW
 ENDDEF
 #
+# MCP6L91
+#
+DEF MCP6L91 U 0 20 Y Y 1 F N
+F0 "U" 0 200 50 H V L CNN
+F1 "MCP6L91" 0 -200 50 H V L CNN
+F2 "TO_SOT_Packages_SMD:SOT-23-5" 0 -400 50 H I C CNN
+F3 "" 0 200 50 H V C CNN
+$FPLIST
+ SOT-23-*
+$ENDFPLIST
+DRAW
+P 4 0 1 10 -200 200 200 0 -200 -200 -200 200 f
+X V- 2 -100 -300 150 U 50 50 0 1 W
+X V+ 5 -100 300 150 D 50 50 0 1 W
+X ~ 1 300 0 100 L 50 50 1 1 O
+X + 3 -300 100 100 R 50 50 1 1 I
+X - 4 -300 -100 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# MCP6L91R
+#
+DEF MCP6L91R U 0 20 Y Y 1 F N
+F0 "U" 0 200 50 H V L CNN
+F1 "MCP6L91R" 0 -200 50 H V L CNN
+F2 "TO_SOT_Packages_SMD:SOT-23-5" 0 -400 50 H I C CNN
+F3 "" 0 200 50 H V C CNN
+$FPLIST
+ SOT-23-*
+$ENDFPLIST
+DRAW
+P 4 0 1 10 -200 200 200 0 -200 -200 -200 200 f
+X V+ 2 -100 300 150 D 50 50 0 1 W
+X V- 5 -100 -300 150 U 50 50 0 1 W
+X ~ 1 300 0 100 L 50 50 1 1 O
+X + 3 -300 100 100 R 50 50 1 1 I
+X - 4 -300 -100 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
 # MIC845H
 #
 DEF MIC845H U 0 20 Y Y 1 F N

library/nxp_armmcu.dcm

@@ -126,6 +126,24 @@ K ARM, 32bit, CortexM0, M0, NXP, Microcontroller
 F http://www.nxp.com/documents/data_sheet/LPC1111_12_13_14.pdf
 $ENDCMP
 #
+$CMP LPC11E12FBD48/201
+D LPC11E1x, 50MHz Cortex-M0 MCU, 16kB Flash, 1kB EEPROM, 6kB SRAM, USART, I2C, SSP, ADC, Power Profile, LQFP48
+K nxp lpc arm microcontroller cortex
+F http://www.nxp.com/documents/data_sheet/LPC11E1X.pdf
+$ENDCMP
+#
+$CMP LPC11E13FBD48/301
+D LPC11E1x, 50MHz Cortex-M0 MCU, 24kB Flash, 2kB EEPROM, 8kB SRAM, USART, I2C, SSP, ADC, Power Profile, LQFP48
+K nxp lpc arm microcontroller cortex
+F http://www.nxp.com/documents/data_sheet/LPC11E1X.pdf
+$ENDCMP
+#
+$CMP LPC11E14FBD48/401
+D LPC11E1x, 50MHz Cortex-M0 MCU, 32kB Flash, 4kB EEPROM, 10kB SRAM, USART, I2C, SSP, ADC, Power Profile, LQFP48
+K nxp lpc arm microcontroller cortex
+F http://www.nxp.com/documents/data_sheet/LPC11E1X.pdf
+$ENDCMP
+#
 $CMP LPC11U12FBD48
 D LPC11U00 USB series, 50MHz Cortex-M0 MCU, USB, ADC, USART, I2C, SPI, LQFP48 package
 K nxp lpc arm microcontroller cortex

library/nxp_armmcu.lib

@@ -989,6 +989,70 @@ X VDD 29 50 1050 150 D 35 35 1 1 W
 ENDDRAW
 ENDDEF
 #
+# LPC11E12FBD48/201
+#
+DEF LPC11E12FBD48/201 U 0 40 Y Y 1 F N
+F0 "U" -200 1450 50 H V R CNN
+F1 "LPC11E12FBD48/201" -200 1350 50 H V R CNN
+F2 "Housing_QFP:LQFP-48_7x7mm_Pitch0.5mm" 50 -1450 50 H I L CNN
+F3 "" 50 1350 50 H I L CNN
+ALIAS LPC11E13FBD48/301 LPC11E14FBD48/401
+$FPLIST
+ LQFP*7x7mm*Pitch0.5mm*
+$ENDFPLIST
+DRAW
+S -1300 1300 1400 -1400 0 1 10 f
+X PIO1_25/CT32B0_MAT1 1 1500 100 100 L 50 50 1 1 B
+X PIO1_19/~DTR~/SSEL1 2 1500 700 100 L 50 50 1 1 B
+X ~RESET~/PIO0_0 3 -1400 1100 100 R 50 50 1 1 B
+X PIO0_1/CLKOUT/CT32B0_MAT2 4 -1400 1000 100 R 50 50 1 1 B
+X VSS 5 -100 -1500 100 U 50 50 1 1 W
+X XTALIN 6 1500 -700 100 L 50 50 1 1 P
+X XTALOUT 7 1500 -600 100 L 50 50 1 1 P
+X VDD 8 -100 1400 100 D 50 50 1 1 W
+X PIO0_20/CT16B1_CAP0 9 -1400 -900 100 R 50 50 1 1 B
+X PIO0_2/SSEL0/CT16B0_CAP0 10 -1400 900 100 R 50 50 1 1 B
+X NC 20 1500 -900 100 L 50 50 1 1 N N
+X PIO0_22/AD6/CT16B1_MAT1/MISO1 30 -1400 -1100 100 R 50 50 1 1 B
+X PIO0_16/AD5/CT32B1_MAT3/WAKEUP 40 -1400 -500 100 R 50 50 1 1 B
+X PIO1_26/CT32B0_MAT2/RXD 11 1500 0 100 L 50 50 1 1 B
+X PIO1_24/CT32B0_MAT0 21 1500 200 100 L 50 50 1 1 B
+X PIO1_29/SCK0/CT32B0_CAP1 31 1500 -300 100 L 50 50 1 1 B
+X VSS 41 0 -1500 100 U 50 50 1 1 W
+X PIO1_27/CT32B0_MAT3/TXD 12 1500 -100 100 L 50 50 1 1 B
+X PIO0_6/SCK0 22 -1400 500 100 R 50 50 1 1 B
+X TDI/PIO0_11/AD0/CT32B0_MAT3 32 -1400 0 100 R 50 50 1 1 B
+X PIO0_23/AD7 42 -1400 -1200 100 R 50 50 1 1 B
+X PIO1_20/~DSR~/SCK1 13 1500 600 100 L 50 50 1 1 B
+X PIO0_7/~CTS~ 23 -1400 400 100 R 50 50 1 1 B
+X TMS/PIO0_12/AD1/CT32B1_CAP0 33 -1400 -100 100 R 50 50 1 1 B
+X PIO1_15/~DCD~/CT16B0_MAT2/SCK1 43 1500 900 100 L 50 50 1 1 B
+X PIO0_3 14 -1400 800 100 R 50 50 1 1 B
+X PIO1_28/CT32B0_CAP0/SCLK 24 1500 -200 100 L 50 50 1 1 B
+X TDO/PIO0_13/AD2/CT32B1_MAT0 34 -1400 -200 100 R 50 50 1 1 B
+X VDD 44 0 1400 100 D 50 50 1 1 W
+X PIO0_4/SCL 15 -1400 700 100 R 50 50 1 1 C
+X PIO1_31 25 1500 -400 100 L 50 50 1 1 B
+X ~TRST~/PIO0_14/AD3/CT32B1_MAT1 35 -1400 -300 100 R 50 50 1 1 B
+X PIO0_17/~RTS~/CT32B0_CAP0/SCLK 45 -1400 -600 100 R 50 50 1 1 B
+X PIO0_5/SDA 16 -1400 600 100 R 50 50 1 1 C
+X PIO1_21/~DCD~/MISO1 26 1500 500 100 L 50 50 1 1 B
+X PIO1_13/~DTR~/CT16B0_MAT0/TXD 36 1500 1100 100 L 50 50 1 1 B
+X PIO0_18/RXD/CT32B0_MAT0 46 -1400 -700 100 R 50 50 1 1 B
+X PIO0_21/CT16B1_MAT0/MOSI1 17 -1400 -1000 100 R 50 50 1 1 B
+X PIO0_8/MISO0/CT16B0_MAT0 27 -1400 300 100 R 50 50 1 1 B
+X PIO1_14/DSR/CT16B0_MAT1/RXD 37 1500 1000 100 L 50 50 1 1 B
+X PIO0_19/TXD/CT32B0_MAT1 47 -1400 -800 100 R 50 50 1 1 B
+X PIO1_23/CT16B1_MAT1/SSEL1 18 1500 300 100 L 50 50 1 1 B
+X PIO0_9/MOSI0/CT16B0_MAT1 28 -1400 200 100 R 50 50 1 1 B
+X PIO1_22/~RI~/MOSI1 38 1500 400 100 L 50 50 1 1 B
+X PIO1_16/~RI~/CT16B0_CAP0 48 1500 800 100 L 50 50 1 1 B
+X NC 19 1500 -1000 100 L 50 50 1 1 N N
+X SWCLK/PIO0_10/SCK0/CT16B0_MAT2 29 -1400 100 100 R 50 50 1 1 B
+X SWDIO/PIO0_15/AD4/CT32B1_MAT2 39 -1400 -400 100 R 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
 # LPC11U12FBD48
 #
 DEF LPC11U12FBD48 U 0 40 Y Y 1 F N

library/opto.dcm

@@ -650,4 +650,64 @@ K NPN DC Optocoupler
 F http://www.semicon.toshiba.co.jp/docs/datasheet/en/Opto/TLP785_TLP785F_en_datasheet_120220.pdf
 $ENDCMP
 #
+$CMP VO615A
+D DIP4, DC Optocoupler, Vce 70V, CTR 50-600% @ 5mA, Viso 5000Vrms
+K NPN DC Optocoupler
+F http://www.vishay.com/docs/81753/vo615a.pdf
+$ENDCMP
+#
+$CMP VO615A-1
+D DIP4, DC Optocoupler, Vce 70V, CTR 40-80% @ 10mA, Viso 5000Vrms
+K NPN DC Optocoupler
+F http://www.vishay.com/docs/81753/vo615a.pdf
+$ENDCMP
+#
+$CMP VO615A-2
+D DIP4, DC Optocoupler, Vce 70V, CTR 63-125% @ 10mA, Viso 5000Vrms
+K NPN DC Optocoupler
+F http://www.vishay.com/docs/81753/vo615a.pdf
+$ENDCMP
+#
+$CMP VO615A-3
+D DIP4, DC Optocoupler, Vce 70V, CTR 100-200% @ 10mA, Viso 5000Vrms
+K NPN DC Optocoupler
+F http://www.vishay.com/docs/81753/vo615a.pdf
+$ENDCMP
+#
+$CMP VO615A-4
+D DIP4, DC Optocoupler, Vce 70V, CTR 160-320% @ 10mA, Viso 5000Vrms
+K NPN DC Optocoupler
+F http://www.vishay.com/docs/81753/vo615a.pdf
+$ENDCMP
+#
+$CMP VO615A-5
+D DIP4, DC Optocoupler, Vce 70V, CTR 50-150% @ 5mA, Viso 5000Vrms
+K NPN DC Optocoupler
+F http://www.vishay.com/docs/81753/vo615a.pdf
+$ENDCMP
+#
+$CMP VO615A-6
+D DIP4, DC Optocoupler, Vce 70V, CTR 100-300% @ 5mA, Viso 5000Vrms
+K NPN DC Optocoupler
+F http://www.vishay.com/docs/81753/vo615a.pdf
+$ENDCMP
+#
+$CMP VO615A-7
+D DIP4, DC Optocoupler, Vce 70V, CTR 80-160% @ 5mA, Viso 5000Vrms
+K NPN DC Optocoupler
+F http://www.vishay.com/docs/81753/vo615a.pdf
+$ENDCMP
+#
+$CMP VO615A-8
+D DIP4, DC Optocoupler, Vce 70V, CTR 130-260% @ 5mA, Viso 5000Vrms
+K NPN DC Optocoupler
+F http://www.vishay.com/docs/81753/vo615a.pdf
+$ENDCMP
+#
+$CMP VO615A-9
+D DIP4, DC Optocoupler, Vce 70V, CTR 200-400% @ 5mA, Viso 5000Vrms
+K NPN DC Optocoupler
+F http://www.vishay.com/docs/81753/vo615a.pdf
+$ENDCMP
+#
 #End Doc Library

library/opto.lib

@@ -2662,4 +2662,40 @@ X ~ 4 300 100 100 L 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# VO615A
+#
+DEF VO615A U 0 1 Y Y 1 F N
+F0 "U" 0 300 50 H V C CNN
+F1 "VO615A" 0 200 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS VO615A-1 VO615A-2 VO615A-3 VO615A-4 VO615A-5 VO615A-6 VO615A-7 VO615A-8 VO615A-9
+$FPLIST
+ DIP*W7.62mm*
+ DIP*W10.16mm*
+ DIP*W7.62mm*SMD*
+ DIP*W9.53mm*SMD*
+ DIP*W11.48mm*SMD*
+$ENDFPLIST
+DRAW
+S -200 150 200 -150 0 1 10 f
+P 2 0 1 0 -125 -25 -75 -25 N
+P 2 0 1 0 100 25 175 100 N
+P 2 0 1 0 175 -100 100 -25 F
+P 2 0 1 0 175 -100 200 -100 N
+P 2 0 1 0 175 100 200 100 N
+P 3 0 1 20 100 75 100 -75 100 -75 N
+P 4 0 1 0 -200 100 -100 100 -100 -100 -200 -100 N
+P 4 0 1 0 -100 -25 -125 25 -75 25 -100 -25 N
+P 4 0 1 0 -20 10 1 30 1 10 31 40 N
+P 4 0 1 0 31 40 11 30 21 20 31 40 N
+P 5 0 1 0 120 -65 140 -45 160 -85 120 -65 120 -65 F
+P 7 0 1 0 -20 -30 1 -10 1 -30 31 0 11 -10 21 -20 31 0 N
+X ~ 1 -300 100 100 R 50 50 1 1 P
+X ~ 2 -300 -100 100 R 50 50 1 1 P
+X ~ 3 300 -100 100 L 50 50 1 1 P
+X ~ 4 300 100 100 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 #End Library

library/powerint.lib

@@ -3,16 +3,18 @@ EESchema-LIBRARY Version 2.3
 #
 # CAP002DG
 #
-DEF CAP002DG U 0 40 Y Y 1 F N
-F0 "U" 250 100 50 H V L CNN
-F1 "CAP002DG" 250 0 50 H V L CNN
-F2 "SO-8" 250 -100 50 H V L CIN
+DEF CAP002DG U 0 50 Y Y 1 F N
+F0 "U" 150 350 50 H V L CNN
+F1 "CAP002DG" 150 250 50 H V L CNN
+F2 "Power_Integrations:SO-8" 0 0 50 H I C CIN
 F3 "" 40 0 50 H V C CNN
 ALIAS CAP003DG CAP004DG CAP005DG CAP006DG CAP007DG CAP008DG CAP009DG CAP012DG CAP013DG CAP014DG CAP015DG CAP016DG CAP017DG CAP018DG CAP019DG
 $FPLIST
  SO-8*
 $ENDFPLIST
 DRAW
+A -88 0 12 -1799 -1 0 1 0 N -100 0 -75 0
+A -62 0 12 1 1799 0 1 0 N -50 0 -75 0
 C -100 -125 5 0 1 0 N
 C -100 125 5 0 1 0 N
 C 100 -125 5 0 1 0 N
@@ -20,6 +22,8 @@ C 100 -25 5 0 1 0 N
 C 100 0 5 0 1 0 N
 C 100 25 5 0 1 0 N
 C 100 125 5 0 1 0 N
+S -200 200 200 -200 0 1 10 f
+S -150 100 0 -100 0 1 0 N
 P 2 0 1 0 -100 -100 -100 -125 N
 P 2 0 1 0 -100 125 -100 100 N
 P 2 0 1 0 35 -85 0 -85 N
@@ -44,14 +48,14 @@ P 4 0 1 0 55 -25 100 -25 100 25 55 25 N
 P 4 0 1 0 60 -55 80 -50 80 -60 60 -55 N
 P 4 0 1 0 60 55 80 60 80 50 60 55 N
 P 2 1 1 14 50 -20 50 -30 N
-S -200 200 200 -200 0 1 10 f
-S -150 100 0 -100 0 1 0 N
+X ~ 1 -300 100 100 R 50 50 1 1 P
 X ~ 2 -100 300 100 D 50 50 1 1 P
 X ~ 3 100 300 100 D 50 50 1 1 P
+X ~ 4 300 100 100 L 50 50 1 1 P
+X ~ 5 -300 -100 100 R 50 50 1 1 P
 X ~ 6 -100 -300 100 U 50 50 1 1 P
 X ~ 7 100 -300 100 U 50 50 1 1 P
-A -88 0 12 -1799 -1 0 1 0 N -100 0 -75 0
-A -62 0 12 1 1799 0 1 0 N -50 0 -75 0
+X ~ 8 300 -100 100 L 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
@@ -60,7 +64,7 @@ ENDDEF
 DEF LNK302D U 0 40 Y Y 1 F N
 F0 "U" -300 -350 50 H V L CNN
 F1 "LNK302D" 0 -350 50 H V L CNN
-F2 "SO-8B" 0 -200 50 H V C CIN
+F2 "Power_Integrations:SO-8B" 0 -200 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK304D LNK305D LNK306D
 $FPLIST
@@ -83,7 +87,7 @@ ENDDEF
 DEF LNK302G U 0 40 Y Y 1 F N
 F0 "U" -300 -350 50 H V L CNN
 F1 "LNK302G" 0 -350 50 H V L CNN
-F2 "SMD-8B" 0 -200 50 H V C CIN
+F2 "Power_Integrations:SMD-8B" 0 -200 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK304G LNK305G LNK306G
 $FPLIST
@@ -106,7 +110,7 @@ ENDDEF
 DEF LNK302P U 0 40 Y Y 1 F N
 F0 "U" -300 -350 50 H V L CNN
 F1 "LNK302P" 0 -350 50 H V L CNN
-F2 "PDIP-8B" 0 -200 50 H V C CIN
+F2 "Power_Integrations:PDIP-8B" 0 -200 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK304P LNK305P LNK306P
 $FPLIST
@@ -129,7 +133,7 @@ ENDDEF
 DEF LNK362D U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK362D" 0 250 50 H V L CNN
-F2 "SO-8C" 0 0 50 H V C CIN
+F2 "Power_Integrations:SO-8C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK363D LNK364D
 $FPLIST
@@ -152,7 +156,7 @@ ENDDEF
 DEF LNK362G U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK362G" 0 250 50 H V L CNN
-F2 "SMD-8B" 0 0 50 H V C CIN
+F2 "Power_Integrations:SMD-8B" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK363G LNK364G
 $FPLIST
@@ -160,10 +164,10 @@ $FPLIST
 $ENDFPLIST
 DRAW
 S -300 200 300 -200 0 1 10 f
-X FB 1 400 100 100 L 50 50 1 1 I
 X S 1 -200 -300 100 U 50 50 1 1 E
-X BP 2 400 -100 100 L 50 50 1 1 I
 X S 2 -100 -300 100 U 50 50 1 1 E
+X BP 3 400 -100 100 L 50 50 1 1 I
+X FB 4 400 100 100 L 50 50 1 1 I
 X D 5 -200 300 100 D 50 50 1 1 C
 X S 7 0 -300 100 U 50 50 1 1 E
 X S 8 100 -300 100 U 50 50 1 1 E
@@ -175,7 +179,7 @@ ENDDEF
 DEF LNK362P U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK362P" 0 250 50 H V L CNN
-F2 "PDIP-8B" 0 0 50 H V C CIN
+F2 "Power_Integrations:PDIP-8B" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK363P LNK364P
 $FPLIST
@@ -183,10 +187,10 @@ $FPLIST
 $ENDFPLIST
 DRAW
 S -300 200 300 -200 0 1 10 f
-X FB 1 400 100 100 L 50 50 1 1 I
 X S 1 -200 -300 100 U 50 50 1 1 E
-X BP 2 400 -100 100 L 50 50 1 1 I
 X S 2 -100 -300 100 U 50 50 1 1 E
+X BP 3 400 -100 100 L 50 50 1 1 I
+X FB 4 400 100 100 L 50 50 1 1 I
 X D 5 -200 300 100 D 50 50 1 1 C
 X S 7 0 -300 100 U 50 50 1 1 E
 X S 8 100 -300 100 U 50 50 1 1 E
@@ -198,7 +202,7 @@ ENDDEF
 DEF LNK403EG U 0 40 Y Y 1 F N
 F0 "U" 200 350 50 H V L CNN
 F1 "LNK403EG" 200 250 50 H V L CNN
-F2 "eSIP-7C" -50 0 50 H V C CIN
+F2 "Power_Integrations:eSIP-7C" -50 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK404EG LNK405EG LNK406EG LNK407EG LNK408EG LNK409EG LNK410EG LNK413EG LNK414EG LNK415EG LNK416EG LNK417EG LNK418EG LNK419EG LNK420EG
 $FPLIST
@@ -220,7 +224,7 @@ ENDDEF
 DEF LNK403LG U 0 40 Y Y 1 F N
 F0 "U" 200 350 50 H V L CNN
 F1 "LNK403LG" 200 250 50 H V L CNN
-F2 "eSIP-7F" -100 0 50 H V C CIN
+F2 "Power_Integrations:eSIP-7F" -100 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK404LG LNK405LG LNK406LG LNK407LG LNK408LG LNK409LG LNK410LG LNK413LG LNK414LG LNK415LG LNK416LG LNK417LG LNK418LG LNK419LG LNK420LG
 $FPLIST
@@ -242,7 +246,7 @@ ENDDEF
 DEF LNK454D U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK454D" 0 250 50 H V L CNN
-F2 "SO-8C" 0 0 50 H V C CIN
+F2 "Power_Integrations:SO-8C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK456D LNK457D
 $FPLIST
@@ -260,22 +264,52 @@ X S 8 0 -300 100 U 50 50 1 1 C
 ENDDRAW
 ENDDEF
 #
+# LNK457K
+#
+DEF LNK457K U 0 40 Y Y 1 F N
+F0 "U" 0 350 50 H V L CNN
+F1 "LNK457K" 0 250 50 H V L CNN
+F2 "Power_Integrations:eSOP-12B" 0 0 50 H I C CIN
+F3 "" 0 0 50 H V C CNN
+ALIAS LNK458K LNK460K
+$FPLIST
+ eSOP-12B*
+$ENDFPLIST
+DRAW
+S -500 200 500 -200 0 1 10 f
+X NC 1 -300 300 100 D 50 50 1 1 N N
+X FB 2 400 -300 100 U 50 50 1 1 I
+X BP 3 600 0 100 L 50 50 1 1 I
+X NC 4 -200 300 100 D 50 50 1 1 N N
+X D 6 -400 300 100 D 50 50 1 1 C
+X S 7 -400 -300 100 U 50 50 1 1 C
+X S 8 -300 -300 100 U 50 50 1 1 C
+X S 9 -200 -300 100 U 50 50 1 1 C
+X S 10 -100 -300 100 U 50 50 1 1 E
+X S 11 0 -300 100 U 50 50 1 1 E
+X S 12 100 -300 100 U 50 50 1 1 E
+X S 13 200 -300 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
 # LNK457V
 #
 DEF LNK457V U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK457V" 0 250 50 H V L CNN
-F2 "eDIP-12" 0 0 50 H V C CIN
+F2 "Power_Integrations:eDIP-12B" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
-ALIAS LNK458V LNK459V
+ALIAS LNK458V LNK460V
 $FPLIST
- eDIP-12*
+ eDIP-12B*
 $ENDFPLIST
 DRAW
 S -500 200 500 -200 0 1 10 f
+X NC 1 -300 300 100 D 50 50 1 1 N N
 X FB 2 300 -300 100 U 50 50 1 1 I
 X BP 3 600 0 100 L 50 50 1 1 I
-X D 6 -200 300 100 D 50 50 1 1 C
+X NC 4 -200 300 100 D 50 50 1 1 N N
+X D 6 -400 300 100 D 50 50 1 1 C
 X S 7 -400 -300 100 U 50 50 1 1 C
 X S 8 -300 -300 100 U 50 50 1 1 C
 X S 9 -200 -300 100 U 50 50 1 1 C
@@ -290,7 +324,7 @@ ENDDEF
 DEF LNK562D U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK562D" 0 250 50 H V L CNN
-F2 "SO-8C" 0 0 50 H V C CIN
+F2 "Power_Integrations:SO-8C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK563D LNK564D
 $FPLIST
@@ -313,7 +347,7 @@ ENDDEF
 DEF LNK562G U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK562G" 0 250 50 H V L CNN
-F2 "SMD-8B" 0 0 50 H V C CIN
+F2 "Power_Integrations:SMD-8B" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK563G LNK564G
 $FPLIST
@@ -336,7 +370,7 @@ ENDDEF
 DEF LNK562P U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK562P" 0 250 50 H V L CNN
-F2 "PDIP-8B" 0 0 50 H V C CIN
+F2 "Power_Integrations:PDIP-8B" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK563P LNK564P
 $FPLIST
@@ -359,7 +393,7 @@ ENDDEF
 DEF LNK603DG U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK603DG" 0 250 50 H V L CNN
-F2 "SO-8C" 0 0 50 H V C CIN
+F2 "Power_Integrations:SO-8C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK604DG LNK605DG LNK606DG LNK613DG LNK614DG LNK615DG LNK616DG
 $FPLIST
@@ -382,7 +416,7 @@ ENDDEF
 DEF LNK603PG U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK603PG" 0 250 50 H V L CNN
-F2 "PDIP-8C" 0 0 50 H V C CIN
+F2 "Power_Integrations:PDIP-8C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK604PG LNK605PG LNK606PG LNK613PG LNK614PG LNK615PG LNK616PG
 $FPLIST
@@ -405,7 +439,7 @@ ENDDEF
 DEF LNK606GG U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK606GG" 0 250 50 H V L CNN
-F2 "SMD-8C" 0 0 50 H V C CIN
+F2 "Power_Integrations:SMD-8C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK616GG
 $FPLIST
@@ -428,7 +462,7 @@ ENDDEF
 DEF LNK623DG U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK623DG" 0 250 50 H V L CNN
-F2 "SO-8C" 0 0 50 H V C CIN
+F2 "Power_Integrations:SO-8C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK624DG LNK625DG LNK626DG
 $FPLIST
@@ -451,7 +485,7 @@ ENDDEF
 DEF LNK623PG U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK623PG" 0 250 50 H V L CNN
-F2 "PDIP-8C" 0 0 50 H V C CIN
+F2 "Power_Integrations:PDIP-8C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS LNK624PG LNK625PG LNK626PG
 $FPLIST
@@ -474,10 +508,10 @@ ENDDEF
 DEF LNK632DG U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "LNK632DG" 0 250 50 H V L CNN
-F2 "PDIP-8C" 0 0 50 H V C CIN
+F2 "Power_Integrations:SO-8C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 $FPLIST
- PDIP-8C*
+ SO-8C*
 $ENDFPLIST
 DRAW
 S -400 200 400 -200 0 1 10 f
@@ -496,7 +530,7 @@ ENDDEF
 DEF TNY263G U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "TNY263G" 0 250 50 H V L CNN
-F2 "SMD-8B" 0 0 50 H V C CIN
+F2 "Power_Integrations:SMD-8B" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS TNY264G TNY265G TNY266G TNY267G TNY268G
 $FPLIST
@@ -519,7 +553,7 @@ ENDDEF
 DEF TNY263P U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "TNY263P" 0 250 50 H V L CNN
-F2 "PDIP-8B" 0 0 50 H V C CIN
+F2 "Power_Integrations:PDIP-8B" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS TNY264P TNY265P TNY266P TNY267P TNY268P
 $FPLIST
@@ -542,7 +576,7 @@ ENDDEF
 DEF TNY274G U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "TNY274G" 0 250 50 H V L CNN
-F2 "SMD-8C" 0 0 50 H V C CIN
+F2 "Power_Integrations:SMD-8C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS TNY275G TNY276G TNY277G TNY278G TNY279G TNY280G
 $FPLIST
@@ -565,7 +599,7 @@ ENDDEF
 DEF TNY274P U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "TNY274P" 0 250 50 H V L CNN
-F2 "PDIP-8C" 0 0 50 H V C CIN
+F2 "Power_Integrations:PDIP-8C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS TNY275P TNY276P TNY277P TNY278P TNY279P TNY280P
 $FPLIST
@@ -627,12 +661,6 @@ X D 6 -300 300 100 D 50 50 1 1 C
 X S 7 -300 -400 100 U 50 50 1 1 E
 X S 8 -200 -400 100 U 50 50 1 1 E
 X S 9 -100 -400 100 U 50 50 1 1 E
-X S 9 -100 -400 100 U 50 50 1 1 E
-X S 9 -100 -400 100 U 50 50 1 1 E
-X S 9 -100 -400 100 U 50 50 1 1 E
-X S 10 0 -400 100 U 50 50 1 1 E
-X S 10 0 -400 100 U 50 50 1 1 E
-X S 10 0 -400 100 U 50 50 1 1 E
 X S 10 0 -400 100 U 50 50 1 1 E
 X S 11 100 -400 100 U 50 50 1 1 E
 X S 12 200 -400 100 U 50 50 1 1 E
@@ -668,7 +696,7 @@ ENDDEF
 DEF TOP100YN U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "TOP100YN" 0 250 50 H V L CNN
-F2 "TO-220" 0 0 50 H V C CIN
+F2 "Power_Integrations:TO-220" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS TOP101YN TOP102YN TOP103YN TOP104YN
 $FPLIST
@@ -687,9 +715,9 @@ ENDDEF
 DEF TOP200YAI U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "TOP200YAI" 0 250 50 H V L CNN
-F2 "TO-220" 0 0 50 H V C CIN
+F2 "Power_Integrations:TO-220" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
-ALIAS TOP201YAI TOP202YAI TOP203YAI TOP204YAI
+ALIAS TOP201YAI TOP202YAI TOP203YAI TOP204YAI TOP214YAI
 $FPLIST
  TO-220*
 $ENDFPLIST
@@ -706,7 +734,7 @@ ENDDEF
 DEF TOP209G U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "TOP209G" 0 250 50 H V L CNN
-F2 "SMD-8" 0 0 50 H V C CIN
+F2 "Power_Integrations:SMD-8" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS TOP210G
 $FPLIST
@@ -715,8 +743,12 @@ $ENDFPLIST
 DRAW
 S -300 200 300 -200 0 1 10 f
 X S 1 -200 -300 100 U 50 50 1 1 E
+X NC 2 0 -300 100 U 50 50 1 1 N N
+X NC 3 100 -300 100 U 50 50 1 1 N N
 X C 4 400 0 100 L 50 50 1 1 I
 X D 5 -200 300 100 D 50 50 1 1 C
+X NC 6 200 -300 100 U 50 50 1 1 N N
+X NC 7 300 -300 100 U 50 50 1 1 N N
 X S 8 -100 -300 100 U 50 50 1 1 E
 ENDDRAW
 ENDDEF
@@ -726,65 +758,33 @@ ENDDEF
 DEF TOP209P U 0 40 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "TOP209P" 0 250 50 H V L CNN
-F2 "PDIP-8" 0 0 50 H V C CIN
+F2 "Power_Integrations:PDIP-8" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
+ALIAS TOP210PFI
 $FPLIST
  PDIP-8*
 $ENDFPLIST
 DRAW
 S -300 200 300 -200 0 1 10 f
 X S 1 -200 -300 100 U 50 50 1 1 E
+X NC 2 0 -300 100 U 50 50 1 1 N N
+X NC 3 100 -300 100 U 50 50 1 1 N N
 X C 4 400 0 100 L 50 50 1 1 I
 X D 5 -200 300 100 D 50 50 1 1 C
+X NC 6 200 -300 100 U 50 50 1 1 N N
+X NC 7 300 -300 100 U 50 50 1 1 N N
 X S 8 -100 -300 100 U 50 50 1 1 E
 ENDDRAW
 ENDDEF
 #
-# TOP210PFI
-#
-DEF TOP210PFI U 0 40 Y Y 1 F N
-F0 "U" 0 350 50 H V L CNN
-F1 "TOP210PFI" 0 250 50 H V L CNN
-F2 "PDIP-8" 0 0 50 H V C CIN
-F3 "" 0 0 50 H V C CNN
-$FPLIST
- PDIP-8*
-$ENDFPLIST
-DRAW
-S -300 200 300 -200 0 1 10 f
-X S 1 -200 -300 100 U 50 50 1 1 E
-X C 4 400 0 100 L 50 50 1 1 I
-X D 5 -200 300 100 D 50 50 1 1 C
-X S 8 -100 -300 100 U 50 50 1 1 E
-ENDDRAW
-ENDDEF
-#
-# TOP214YAI
-#
-DEF TOP214YAI U 0 40 Y Y 1 F N
-F0 "U" 0 350 50 H V L CNN
-F1 "TOP214YAI" 0 250 50 H V L CNN
-F2 "TO-220" 0 0 50 H V C CIN
-F3 "" 0 0 50 H V C CNN
-$FPLIST
- TO-220*
-$ENDFPLIST
-DRAW
-S -300 200 300 -200 0 1 10 f
-X C 1 400 0 100 L 50 50 1 1 I
-X S 2 -200 -300 100 U 50 50 1 1 E
-X D 3 -200 300 100 D 50 50 1 1 C
-ENDDRAW
-ENDDEF
-#
 # TOP252EN
 #
 DEF TOP252EN U 0 40 Y Y 1 F N
 F0 "U" 200 350 50 H V L CNN
 F1 "TOP252EN" 200 250 50 H V L CNN
-F2 "eSIP-7C" 0 0 50 H V C CIN
+F2 "Power_Integrations:eSIP-7C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
-ALIAS TOP253EN TOP254EN TOP255EN TOP256EN TOP257EN TOP258EN TOP259EN TOP260EN TOP261EN
+ALIAS TOP252EG TOP253EG TOP253EN TOP254EG TOP254EN TOP255EG TOP255EN TOP256EG TOP256EN TOP257EG TOP257EN TOP258EG TOP258EN TOP259EG TOP259EN TOP260EG TOP260EN TOP261EG TOP261EN TOP262EN
 $FPLIST
  eSIP-7C*
 $ENDFPLIST
@@ -804,7 +804,7 @@ ENDDEF
 DEF TOP252GN U 0 40 Y Y 1 F N
 F0 "U" 200 350 50 H V L CNN
 F1 "TOP252GN" 200 250 50 H V L CNN
-F2 "SMD-8C" 0 0 50 H V C CIN
+F2 "Power_Integrations:SMD-8C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS TOP253GN TOP254GN TOP255GN TOP256GN TOP257GN TOP258GN
 $FPLIST
@@ -827,7 +827,7 @@ ENDDEF
 DEF TOP252MN U 0 40 Y Y 1 F N
 F0 "U" 300 350 50 H V L CNN
 F1 "TOP252MN" 300 250 50 H V L CNN
-F2 "SDIP-10C" 0 0 50 H V C CIN
+F2 "Power_Integrations:SDIP-10C" 0 0 50 H I C CIN
 F3 "" 50 0 50 H V C CNN
 ALIAS TOP253MN TOP254MN TOP255MN TOP256MN TOP257MN TOP258MN
 $FPLIST
@@ -852,7 +852,7 @@ ENDDEF
 DEF TOP252PN U 0 40 Y Y 1 F N
 F0 "U" 200 350 50 H V L CNN
 F1 "TOP252PN" 200 250 50 H V L CNN
-F2 "PDIP-8C" 0 0 50 H V C CIN
+F2 "Power_Integrations:PDIP-8C" 0 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS TOP253PN TOP254PN TOP255PN TOP256PN TOP257PN TOP258PN
 $FPLIST
@@ -875,7 +875,7 @@ ENDDEF
 DEF TOP254YN U 0 40 Y Y 1 F N
 F0 "U" 200 350 50 H V L CNN
 F1 "TOP254YN" 200 250 50 H V L CNN
-F2 "TO-220-7C" -50 0 50 H V C CIN
+F2 "Power_Integrations:TO-220-7C" -50 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS TOP255YN TOP256YN TOP257YN TOP258YN
 $FPLIST
@@ -892,12 +892,34 @@ X D 7 -200 300 100 D 50 50 1 1 C
 ENDDRAW
 ENDDEF
 #
+# TOP255LN
+#
+DEF TOP255LN U 0 40 Y Y 1 F N
+F0 "U" 300 350 50 H V L CNN
+F1 "TOP255LN" 300 250 50 H V L CNN
+F2 "Power_Integrations:eSIP-7F" 0 0 50 H I C CIN
+F3 "" 50 0 50 H V C CNN
+ALIAS TOP256LN TOP257LN TOP258LN TOP259LN TOP260LN TOP261LN TOP262LN
+$FPLIST
+ eSIP-7F*
+$ENDFPLIST
+DRAW
+S -300 200 300 -200 0 1 10 f
+X V 1 100 300 100 D 50 50 1 1 I
+X X 2 0 -300 100 U 50 50 1 1 I
+X C 3 400 0 100 L 50 50 1 1 I
+X F 4 200 -300 100 U 50 50 1 1 P
+X S 5 -200 -300 100 U 50 50 1 1 E
+X D 7 -200 300 100 D 50 50 1 1 C
+ENDDRAW
+ENDDEF
+#
 # TOP259YN
 #
 DEF TOP259YN U 0 40 Y Y 1 F N
 F0 "U" 200 350 50 H V L CNN
 F1 "TOP259YN" 200 250 50 H V L CNN
-F2 "TO-220-7C" -50 0 50 H V C CIN
+F2 "Power_Integrations:TO-220-7C" -50 0 50 H I C CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS TOP260YN TOP261YN
 $FPLIST
@@ -914,4 +936,80 @@ X D 7 -200 300 100 D 50 50 1 1 C
 ENDDRAW
 ENDDEF
 #
+# TOP264EG
+#
+DEF TOP264EG U 0 40 Y Y 1 F N
+F0 "U" 200 350 50 H V L CNN
+F1 "TOP264EG" 200 250 50 H V L CNN
+F2 "Power_Integrations:eSIP-7C" 0 0 50 H I C CIN
+F3 "" 0 0 50 H V C CNN
+ALIAS TOP265EG TOP266EG TOP267EG TOP268EG TOP269EG TOP270EG TOP271EG
+$FPLIST
+ eSIP-7C*
+$ENDFPLIST
+DRAW
+S -300 200 300 -200 0 1 10 f
+X V 1 100 300 100 D 50 50 1 1 I
+X X 2 0 -300 100 U 50 50 1 1 I
+X C 3 400 0 100 L 50 50 1 1 I
+X F 4 200 -300 100 U 50 50 1 1 P
+X S 5 -200 -300 100 U 50 50 1 1 E
+X D 7 -200 300 100 D 50 50 1 1 C
+ENDDRAW
+ENDDEF
+#
+# TOP264KG
+#
+DEF TOP264KG U 0 40 Y Y 1 F N
+F0 "U" 200 350 50 H V L CNN
+F1 "TOP264KG" 200 250 50 H V L CNN
+F2 "Power_Integrations:eSOP-12B" 0 0 50 H I C CIN
+F3 "" 0 0 50 H V C CNN
+ALIAS TOP265KG TOP266KG TOP267KG TOP268KG TOP269KG TOP270KG TOP271KG
+$FPLIST
+ eSOP-12B*
+$ENDFPLIST
+DRAW
+S -300 200 300 -200 0 1 10 f
+X V 1 100 300 100 D 50 50 1 1 I
+X X 2 0 -300 100 U 50 50 1 1 I
+X C 3 400 0 100 L 50 50 1 1 I
+X F 4 200 -300 100 U 50 50 1 1 P
+X D 6 -200 300 100 D 50 50 1 1 C
+X S 7 -200 -300 100 U 50 50 1 1 E
+X S 8 -200 -300 100 U 50 50 1 1 E N
+X S 9 -200 -300 100 U 50 50 1 1 E N
+X S 10 -200 -300 100 U 50 50 1 1 E N
+X S 11 -200 -300 100 U 50 50 1 1 E N
+X S 12 -200 -300 100 U 50 50 1 1 E N
+ENDDRAW
+ENDDEF
+#
+# TOP264VG
+#
+DEF TOP264VG U 0 40 Y Y 1 F N
+F0 "U" 200 350 50 H V L CNN
+F1 "TOP264VG" 200 250 50 H V L CNN
+F2 "Power_Integrations:eDIP-12B" 0 0 50 H I C CIN
+F3 "" 0 0 50 H V C CNN
+ALIAS TOP265VG TOP266VG TOP267VG TOP268VG TOP269VG TOP270VG TOP271VG
+$FPLIST
+ eDIP-12*
+$ENDFPLIST
+DRAW
+S -300 200 300 -200 0 1 10 f
+X V 1 100 300 100 D 50 50 1 1 I
+X X 2 0 -300 100 U 50 50 1 1 I
+X C 3 400 0 100 L 50 50 1 1 I
+X F 4 200 -300 100 U 50 50 1 1 P
+X D 6 -200 300 100 D 50 50 1 1 C
+X S 7 -200 -300 100 U 50 50 1 1 E
+X S 8 -200 -300 100 U 50 50 1 1 E N
+X S 9 -200 -300 100 U 50 50 1 1 E N
+X S 10 -200 -300 100 U 50 50 1 1 E N
+X S 11 -200 -300 100 U 50 50 1 1 E N
+X S 12 -200 -300 100 U 50 50 1 1 E N
+ENDDRAW
+ENDDEF
+#
 #End Library

library/rfcom.dcm

@@ -94,4 +94,28 @@ K Low Power RF Transciever
 F http://www.nordicsemi.com/eng/content/download/2726/34069/file/nRF24L01P_Product_Specification_1_0.pdf
 $ENDCMP
 #
+$CMP TR-52D
+D IQRF common transceiver, FSK modulation
+K IQRF common transceiver, FSK modulation
+F http://iqrf.org/weben/downloads.php?id=213
+$ENDCMP
+#
+$CMP TR-72D
+D IQRF common transceiver, GMSK modulation
+K IQRF common transceiver, GMSK modulation
+F http://iqrf.org/weben/downloads.php?id=337
+$ENDCMP
+#
+$CMP DCTR-52D
+D IQRF data controlled transceiver, FSK modulation
+K IQRF data controlled transceiver, FSK modulation
+F http://iqrf.org/weben/downloads.php?id=213
+$ENDCMP
+#
+$CMP DCTR-72D
+D IQRF data controlled transceiver, GMSK modulation
+K IQRF data controlled transceiver, GMSK modulation
+F http://iqrf.org/weben/downloads.php?id=337
+$ENDCMP
+#
 #End Doc Library

library/rfcom.lib

@@ -721,4 +721,29 @@ X P17-IO/ADC 29 1000 -400 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
+# TR-52D
+#
+DEF TR-52D IC 0 50 Y Y 1 F N
+F0 "IC" -1400 450 50 H V L CNN
+F1 "TR-52D" 1400 450 50 H V R CNN
+F2 "Connectors:IQRF_KON-SIM-01" -1400 -550 50 H I L CNN
+F3 "" 1400 -650 50 H I R CNN
+ALIAS TR-72D DCTR-52D DCTR-72D
+$FPLIST
+ IQRF?KON?SIM?01*
+$ENDFPLIST
+DRAW
+S -1400 400 1400 -500 0 1 10 f
+X RA0/AN0/C12IN0 1 -1500 0 100 R 50 50 1 1 B
+X RC2/Vout 2 -1500 -100 100 R 50 50 1 1 B
+X Vin 3 0 500 100 D 50 50 1 1 W
+X GND 4 100 -600 100 U 50 50 1 1 W
+X RA5/RB4/RC6/AN4/AN11/TX/~SS~/C2OUT/CCP3 5 1500 -200 100 L 50 50 1 1 B
+X RC3/SCK/SCL 6 1500 -100 100 L 50 50 1 1 B
+X RC4/SDI/SDA 7 1500 0 100 L 50 50 1 1 B
+X RC5/RC7/RX/SDO 8 1500 100 100 L 50 50 1 1 B
+X GND 9 -100 -600 100 U 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 #End Library

library/texas.dcm

@@ -210,6 +210,18 @@ K ARM 7TDM uC TMS470
 F http://www.ti.com/lit/ds/symlink/tms470r1b768.pdf
 $ENDCMP
 #
+$CMP TPS2041B
+D Single power-distribution switcher
+K 1-chanel power-distribution USB
+F http://www.ti.com/lit/ds/symlink/tps2041.pdf
+$ENDCMP
+#
+$CMP TPS2042D
+D Dual power-distribution switcher
+K 2-chanel power-distribution USB
+F http://www.ti.com/lit/ds/symlink/tps2042.pdf
+$ENDCMP
+#
 $CMP TPS2044D
 D Quad power-distribution switcher
 K 4-chanel power-distribution USB

library/texas.lib

@@ -1036,19 +1036,62 @@ X HET[4] 139 -1500 100 150 R 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# TPS2041B
+#
+DEF TPS2041B U 0 40 Y Y 1 F N
+F0 "U" 0 425 50 H V C CNN
+F1 "TPS2041B" 0 350 50 H V C CNN
+F2 "TO_SOT_Packages_SMD:SOT-23-5" 0 500 50 H I C CNN
+F3 "" -50 300 50 H V C CNN
+$FPLIST
+ SOT-23-5*
+$ENDFPLIST
+DRAW
+S -300 300 300 -400 0 1 10 f
+X OUT 1 500 0 200 L 50 50 1 1 w
+X GND 2 0 -600 200 U 50 50 1 1 W
+X ~OC 3 -500 200 200 R 50 50 1 1 C
+X ~EN 4 -500 -200 200 R 50 50 1 1 I
+X IN 5 500 200 200 L 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# TPS2042D
+#
+DEF TPS2042D U 0 40 Y Y 1 F N
+F0 "U" 0 425 50 H V C CNN
+F1 "TPS2042D" 0 350 50 H V C CNN
+F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 500 50 H I C CNN
+F3 "" -50 300 50 H V C CNN
+$FPLIST
+ SOIC*3.9x4.9mm*1.27mm*
+$ENDFPLIST
+DRAW
+S -300 300 300 -400 0 1 10 f
+X GND 1 0 -600 200 U 50 50 1 1 W
+X IN1 2 500 200 200 L 50 50 1 1 W
+X ~EN1 3 -500 -200 200 R 50 50 1 1 I
+X ~EN2 4 -500 -300 200 R 50 50 1 1 I
+X ~OC2 5 -500 100 200 R 50 50 1 1 C
+X OUT2 6 500 -100 200 L 50 50 1 1 w
+X OUT1 7 500 0 200 L 50 50 1 1 w
+X ~OC1 8 -500 200 200 R 50 50 1 1 C
+ENDDRAW
+ENDDEF
+#
 # TPS2044D
 #
 DEF TPS2044D U 0 40 Y Y 2 L N
 F0 "U" 0 425 50 H V C CNN
 F1 "TPS2044D" 0 350 50 H V C CNN
-F2 "Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm" 0 -450 50 H V C CNN
+F2 "Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm" 0 500 50 H I C CNN
 F3 "" -50 300 50 H V C CNN
 $FPLIST
  SOIC*3.9x9.9mm*1.27mm*
 $ENDFPLIST
 DRAW
 S -300 300 300 -400 0 1 10 f
-X GND 1 500 -300 200 L 50 50 1 1 W
+X GND 1 0 -600 200 U 50 50 1 1 W
 X IN1 2 500 200 200 L 50 50 1 1 W
 X ~EN1 3 -500 -200 200 R 50 50 1 1 I
 X ~EN2 4 -500 -300 200 R 50 50 1 1 I
@@ -1056,7 +1099,7 @@ X ~OC2 13 -500 100 200 R 50 50 1 1 C
 X OUT2 14 500 -100 200 L 50 50 1 1 w
 X OUT1 15 500 0 200 L 50 50 1 1 w
 X ~OC1 16 -500 200 200 R 50 50 1 1 C
-X GND 5 500 -300 200 L 50 50 2 1 W
+X GND 5 0 -600 200 U 50 50 2 1 W
 X IN2 6 500 200 200 L 50 50 2 1 W
 X ~EN3 7 -500 -200 200 R 50 50 2 1 I
 X ~EN4 8 -500 -300 200 R 50 50 2 1 I
@@ -1072,14 +1115,14 @@ ENDDEF
 DEF TPS2054D U 0 40 Y Y 2 L N
 F0 "U" 0 425 50 H V C CNN
 F1 "TPS2054D" 0 350 50 H V C CNN
-F2 "Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm" 0 -450 50 H V C CNN
+F2 "Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm" 0 500 50 H I C CNN
 F3 "" -50 300 50 H V C CNN
 $FPLIST
  SOIC*3.9x9.9mm*1.27mm*
 $ENDFPLIST
 DRAW
 S -300 300 300 -400 0 1 10 f
-X GND 1 500 -300 200 L 50 50 1 1 W
+X GND 1 0 -600 200 U 50 50 1 1 W
 X IN1 2 500 200 200 L 50 50 1 1 W
 X EN1 3 -500 -200 200 R 50 50 1 1 I
 X EN2 4 -500 -300 200 R 50 50 1 1 I
@@ -1087,7 +1130,7 @@ X ~OC2 13 -500 100 200 R 50 50 1 1 C
 X OUT2 14 500 -100 200 L 50 50 1 1 W
 X OUT1 15 500 0 200 L 50 50 1 1 w
 X ~OC1 16 -500 200 200 R 50 50 1 1 C
-X GND 5 500 -300 200 L 50 50 2 1 W
+X GND 5 0 -600 200 U 50 50 2 1 W
 X IN2 6 500 200 200 L 50 50 2 1 W
 X EN3 7 -500 -200 200 R 50 50 2 1 I
 X EN4 8 -500 -300 200 R 50 50 2 1 I

library/transistors.dcm

@@ -209,6 +209,54 @@ K BC818 BC337 Equivalent
 F http://www.fairchildsemi.com/ds/BC/BC817.pdf
 $ENDCMP
 #
+$CMP BC846BDW1
+D 65V Vce, 100mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F http://www.onsemi.com/pub_link/Collateral/BC846BDW1T1-D.PDF
+$ENDCMP
+#
+$CMP BC846BPDW1
+D 65V Vce, 100mA IC, Dual NPN/PNP Transistors, SOT-363
+K Transistor NPN/PNP
+F http://www.onsemi.com/pub_link/Collateral/BC846BPDW1T1-D.PDF
+$ENDCMP
+#
+$CMP BC846BPN
+D 65V Vce, 100mA IC, Dual NPN/PNP Transistors, SOT-363
+K Transistor NPN/PNP
+F http://www.nxp.com/documents/data_sheet/BC846BPN.pdf
+$ENDCMP
+#
+$CMP BC846BS
+D 65V Vce, 100mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F http://www.nxp.com/documents/data_sheet/BC846BS.pdf
+$ENDCMP
+#
+$CMP BC847BDW1
+D 45V Vce, 100mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F http://www.onsemi.com/pub_link/Collateral/BC846BDW1T1-D.PDF
+$ENDCMP
+#
+$CMP BC847BPDW1
+D 45V Vce, 100mA IC, Dual NPN/PNP Transistors, SOT-363
+K Transistor NPN/PNP
+F http://www.onsemi.com/pub_link/Collateral/BC846BPDW1T1-D.PDF
+$ENDCMP
+#
+$CMP BC847BPN
+D 45V Vce, 100mA IC, Dual NPN/PNP Transistors, SOT-363
+K Transistor NPN/PNP
+F http://www.nxp.com/documents/data_sheet/BC847BPN.pdf
+$ENDCMP
+#
+$CMP BC847BS
+D 45V Vce, 100mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F http://www.nxp.com/documents/data_sheet/BC847BS.pdf
+$ENDCMP
+#
 $CMP BC849
 D 30V Vce, 0.1A Ic, Low noise, NPN, SOT-23
 K NPN Low Noise Small Signal Transistor
@@ -227,12 +275,36 @@ K BC856 BC556 Equivalent
 F http://www.fairchildsemi.com/ds/BC/BC856.pdf
 $ENDCMP
 #
+$CMP BC856BDW1
+D 65V Vce, 100mA IC, Dual PNP/PNP Transistors, SOT-363
+K Transistor PNP/PNP
+F http://www.onsemi.com/pub_link/Collateral/BC856BDW1T1-D.PDF
+$ENDCMP
+#
+$CMP BC856BS
+D 65V Vce, 100mA IC, Dual PNP/PNP Transistors, SOT-363
+K Transistor PNP/PNP
+F http://www.nxp.com/documents/data_sheet/BC856BS.pdf
+$ENDCMP
+#
 $CMP BC857
 D 45V Vce, 0.1A Ic, PNP, SOT-23
 K BC857 BC557 Equivalent
 F http://www.fairchildsemi.com/ds/BC/BC856.pdf
 $ENDCMP
 #
+$CMP BC857BDW1
+D 45V Vce, 100mA IC, Dual PNP/PNP Transistors, SOT-363
+K Transistor PNP/PNP
+F http://www.onsemi.com/pub_link/Collateral/BC856BDW1T1-D.PDF
+$ENDCMP
+#
+$CMP BC857BS
+D 45V Vce, 100mA IC, Dual PNP/PNP Transistors, SOT-363
+K Transistor PNP/PNP
+F http://www.nxp.com/documents/data_sheet/BC857BS.pdf
+$ENDCMP
+#
 $CMP BC858
 D 30V Vce, 0.1A Ic, PNP, SOT-23
 K BC858 BC558 Equivalent
@@ -1584,28 +1656,94 @@ K Dual N-Channel MOSFET Logic Level
 F http://www.fairchildsemi.com/ds/FD/FDG1024NZ.pdf
 $ENDCMP
 #
+$CMP FDMS8050
+D N-Channel PowerTrench MOSFET, Vds=30V, Rds=0.65mΩ, Id(const)=55A, Qg(max)=285nC, Temp=-55 to 150 °C, SON8 5x6mm package
+K powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS8050.pdf
+$ENDCMP
+#
+$CMP FDMS8050ET30
+D N-Channel PowerTrench MOSFET, Vds=30V, Rds=0.65mΩ, Id(const)=55A, Qg(max)=285nC, Temp=-55 to 175 °C, SON8 5x6mm package
+K powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS8050ET30.pdf
+$ENDCMP
+#
+$CMP FDMS8350L
+D N-Channel PowerTrench MOSFET, Vds=40V, Rds=0.85mΩ, Id(const)=47A, Qg(max)=242nC, Temp=-55 to 150 °C, SON8 5x6mm package
+K powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS8350L.pdf
+$ENDCMP
+#
 $CMP FDMS8350LET40
 D N-Channel PowerTrench MOSFET, Vds=40V, Rds=0.85mΩ, Id(const)=49A, Qg(max)=242nC, Temp=-55 to 175 °C, SON8 5x6mm package
 K powertrench-mosfet mosfet fairchild
 F https://www.fairchildsemi.com/datasheets/FD/FDMS8350LET40.pdf
 $ENDCMP
 #
-$CMP FDMT80060DC
-D N-Channel Dual Cool PowerTrench MOSFET, Vds=60V, Rds=1.1mΩ, Id(const)=43A, Qg(max)=238nC, Temp=-55 to 150 °C, SON8 5x6mm package
-K dual-cool-powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMT80060DC.pdf
+$CMP FDMS86150
+D N-Channel PowerTrench MOSFET, Vds=100V, Rds=4.85mΩ, Id(const)=16A, Qg(max)=62nC, Temp=-55 to 150 °C, SON8 5x6mm package
+K powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS86150.pdf
 $ENDCMP
 #
-$CMP FDMT80080DC
-D N-Channel Dual Cool PowerTrench MOSFET, Vds=80V, Rds=1.35mΩ, Id(const)=36A, Qg(max)=273nC, Temp=-55 to 150 °C, SON8 5x6mm package
-K dual-cool-powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMT80080DC.pdf
+$CMP FDMS86150ET100
+D N-Channel PowerTrench MOSFET, Vds=100V, Rds=4.85mΩ, Id(const)=16A, Qg(max)=62nC, Temp=-55 to 175 °C, SON8 5x6mm package
+K powertrench-mosfet mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS86150ET100.pdf
 $ENDCMP
 #
-$CMP FDMT800120DC
-D N-Channel Dual cool  88 PowerTrench MOSFET, Vds=120V, Rds=4.2mΩ, Id(const)=20A, Qg(max)=107nC, Temp=-55 to 150 °C, SON8 5x6mm package
-K dual-cool-powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMT800120DC.pdf
+$CMP FDMS86152
+D N-Channel PowerTrench MOSFET, Vds=100V, Rds=6mΩ, Id(const)=14A, Qg(max)=50nC, Temp=-55 to 150 °C, SON8 5x6mm package
+K powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS86152.pdf
+$ENDCMP
+#
+$CMP FDMS86202
+D N-Channel Shielded Gate PowerTrench MOSFET, Vds=120V, Rds=7.2mΩ, Id(const)=13.5A, Qg(max)=64nC, Temp=-55 to 150 °C, SON8 5x6mm package
+K shielded-gate-powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS86202.pdf
+$ENDCMP
+#
+$CMP FDMS86202ET120
+D N-Channel Shielded Gate PowerTrench MOSFET, Vds=120V, Rds=7.2mΩ, Id(const)=13.5A, Qg(max)=64nC, Temp=-55 to 175 °C, SON8 5x6mm package
+K shielded-gate-powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS86202ET120.pdf
+$ENDCMP
+#
+$CMP FDMS86255
+D N-Channel Shielded Gate PowerTrench MOSFET, Vds=150V, Rds=12.4mΩ, Id(const)=10A, Qg(max)=63nC, Temp=-55 to 150 °C, SON8 5x6mm package
+K shielded-gate-powertrench-mosfet mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS86255.pdf
+$ENDCMP
+#
+$CMP FDMS86255ET150
+D N-Channel Shielded Gate PowerTrench MOSFET, Vds=150V, Rds=12.4mΩ, Id(const)=10A, Qg(max)=63nC, Temp=-55 to 175 °C, SON8 5x6mm package
+K shielded-gate-powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS86255ET150.pdf
+$ENDCMP
+#
+$CMP FDMS86350
+D N-Channel PowerTrench MOSFET, Vds=80V, Rds=2.4mΩ, Id(const)=25A, Qg(max)=155nC, Temp=-55 to 150 °C, SON8 5x6mm package
+K powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS86350.pdf
+$ENDCMP
+#
+$CMP FDMS86350ET80
+D N-Channel PowerTrench MOSFET, Vds=80V, Rds=2.4mΩ, Id(const)=25A, Qg(max)=155nC, Temp=-55 to 175 °C, SON8 5x6mm package
+K powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS86350ET80.pdf
+$ENDCMP
+#
+$CMP FDMS86550
+D N-Channel PowerTrench MOSFET, Vds=60V, Rds=1.65mΩ, Id(const)=32A, Qg(max)=154nC, Temp=-55 to 150 °C, SON8 5x6mm package
+K powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS86550.pdf
+$ENDCMP
+#
+$CMP FDMS86550ET60
+D N-Channel PowerTrench MOSFET, Vds=60V, Rds=1.65mΩ, Id(const)=32A, Qg(max)=154nC, Temp=-55 to 175 °C, SON8 5x6mm package
+K powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMS86550ET60.pdf
 $ENDCMP
 #
 $CMP FDMT800100DC
@@ -1614,6 +1752,12 @@ K dual-cool-powertrench mosfet fairchild
 F https://www.fairchildsemi.com/datasheets/FD/FDMT800100DC.pdf
 $ENDCMP
 #
+$CMP FDMT800120DC
+D N-Channel Dual cool  88 PowerTrench MOSFET, Vds=120V, Rds=4.2mΩ, Id(const)=20A, Qg(max)=107nC, Temp=-55 to 150 °C, SON8 5x6mm package
+K dual-cool-powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMT800120DC.pdf
+$ENDCMP
+#
 $CMP FDMT800150DC
 D N-Channel Dual cool PowerTrench MOSFET, Vds=150V, Rds=6.5mΩ, Id(const)=15A, Qg(max)=108nC, Temp=-55 to 150 °C, SON8 5x6mm package
 K dual-cool-powertrench mosfet fairchild
@@ -1626,88 +1770,34 @@ K dual-cool-powertrench mosfet fairchild
 F https://www.fairchildsemi.com/datasheets/FD/FDMT800152DC.pdf
 $ENDCMP
 #
-$CMP FDMS8050ET30
-D N-Channel PowerTrench MOSFET, Vds=30V, Rds=0.65mΩ, Id(const)=55A, Qg(max)=285nC, Temp=-55 to 175 °C, SON8 5x6mm package
-K powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS8050ET30.pdf
+$CMP FDMT80060DC
+D N-Channel Dual Cool PowerTrench MOSFET, Vds=60V, Rds=1.1mΩ, Id(const)=43A, Qg(max)=238nC, Temp=-55 to 150 °C, SON8 5x6mm package
+K dual-cool-powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMT80060DC.pdf
 $ENDCMP
 #
-$CMP FDMS86202ET120
-D N-Channel Shielded Gate PowerTrench MOSFET, Vds=120V, Rds=7.2mΩ, Id(const)=13.5A, Qg(max)=64nC, Temp=-55 to 175 °C, SON8 5x6mm package
-K shielded-gate-powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS86202ET120.pdf
+$CMP FDMT80080DC
+D N-Channel Dual Cool PowerTrench MOSFET, Vds=80V, Rds=1.35mΩ, Id(const)=36A, Qg(max)=273nC, Temp=-55 to 150 °C, SON8 5x6mm package
+K dual-cool-powertrench mosfet fairchild
+F https://www.fairchildsemi.com/datasheets/FD/FDMT80080DC.pdf
 $ENDCMP
 #
-$CMP FDMS86150ET100
-D N-Channel PowerTrench MOSFET, Vds=100V, Rds=4.85mΩ, Id(const)=16A, Qg(max)=62nC, Temp=-55 to 175 °C, SON8 5x6mm package
-K powertrench-mosfet mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS86150ET100.pdf
+$CMP FDS4559
+D Dual N and P Channel MOSFET, 60V Vds, 4.5A Id, 55mΩ Rds @ 10V Vgs, SO8L
+K Dual N-Channel P-Channel MOSFET
+F https://www.fairchildsemi.com/datasheets/FD/FDS4559.pdf
 $ENDCMP
 #
-$CMP FDMS86255ET150
-D N-Channel Shielded Gate PowerTrench MOSFET, Vds=150V, Rds=12.4mΩ, Id(const)=10A, Qg(max)=63nC, Temp=-55 to 175 °C, SON8 5x6mm package
-K shielded-gate-powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS86255ET150.pdf
+$CMP FDS4897AC
+D Dual N and P Channel MOSFET, 40V Vds, 6.1A Id, 26mΩ Rds @ 10V Vgs, SO8L
+K Dual N-Channel P-Channel MOSFET
+F https://www.fairchildsemi.com/datasheets/FD/FDS4897AC.pdf
 $ENDCMP
 #
-$CMP FDMS86350ET80
-D N-Channel PowerTrench MOSFET, Vds=80V, Rds=2.4mΩ, Id(const)=25A, Qg(max)=155nC, Temp=-55 to 175 °C, SON8 5x6mm package
-K powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS86350ET80.pdf
-$ENDCMP
-#
-$CMP FDMS86550ET60
-D N-Channel PowerTrench MOSFET, Vds=60V, Rds=1.65mΩ, Id(const)=32A, Qg(max)=154nC, Temp=-55 to 175 °C, SON8 5x6mm package
-K powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS86550ET60.pdf
-$ENDCMP
-#
-$CMP FDMS8050
-D N-Channel PowerTrench MOSFET, Vds=30V, Rds=0.65mΩ, Id(const)=55A, Qg(max)=285nC, Temp=-55 to 150 °C, SON8 5x6mm package
-K powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS8050.pdf
-$ENDCMP
-#
-$CMP FDMS8350L
-D N-Channel PowerTrench MOSFET, Vds=40V, Rds=0.85mΩ, Id(const)=47A, Qg(max)=242nC, Temp=-55 to 150 °C, SON8 5x6mm package
-K powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS8350L.pdf
-$ENDCMP
-#
-$CMP FDMS86255
-D N-Channel Shielded Gate PowerTrench MOSFET, Vds=150V, Rds=12.4mΩ, Id(const)=10A, Qg(max)=63nC, Temp=-55 to 150 °C, SON8 5x6mm package
-K shielded-gate-powertrench-mosfet mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS86255.pdf
-$ENDCMP
-#
-$CMP FDMS86550
-D N-Channel PowerTrench MOSFET, Vds=60V, Rds=1.65mΩ, Id(const)=32A, Qg(max)=154nC, Temp=-55 to 150 °C, SON8 5x6mm package
-K powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS86550.pdf
-$ENDCMP
-#
-$CMP FDMS86202
-D N-Channel Shielded Gate PowerTrench MOSFET, Vds=120V, Rds=7.2mΩ, Id(const)=13.5A, Qg(max)=64nC, Temp=-55 to 150 °C, SON8 5x6mm package
-K shielded-gate-powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS86202.pdf
-$ENDCMP
-#
-$CMP FDMS86350
-D N-Channel PowerTrench MOSFET, Vds=80V, Rds=2.4mΩ, Id(const)=25A, Qg(max)=155nC, Temp=-55 to 150 °C, SON8 5x6mm package
-K powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS86350.pdf
-$ENDCMP
-#
-$CMP FDMS86152
-D N-Channel PowerTrench MOSFET, Vds=100V, Rds=6mΩ, Id(const)=14A, Qg(max)=50nC, Temp=-55 to 150 °C, SON8 5x6mm package
-K powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS86152.pdf
-$ENDCMP
-#
-$CMP FDMS86150
-D N-Channel PowerTrench MOSFET, Vds=100V, Rds=4.85mΩ, Id(const)=16A, Qg(max)=62nC, Temp=-55 to 150 °C, SON8 5x6mm package
-K powertrench mosfet fairchild
-F https://www.fairchildsemi.com/datasheets/FD/FDMS86150.pdf
+$CMP FDS4897C
+D Dual N and P Channel MOSFET, 40V Vds, 6.2A Id, 29mΩ Rds @ 10V Vgs, SO8L
+K Dual N-Channel P-Channel MOSFET
+F https://www.fairchildsemi.com/datasheets/FD/FDS4897C.pdf
 $ENDCMP
 #
 $CMP FDS6890A
@@ -1728,12 +1818,54 @@ K Dual N-Channel MOSFET
 F http://www.fairchildsemi.com/ds/FD/FDS6898A.pdf
 $ENDCMP
 #
+$CMP FDS8960C
+D Dual N and P Channel MOSFET, 35V Vds, 7A Id, 24mΩ Rds @ 10V Vgs, SO8L
+K Dual N-Channel P-Channel MOSFET
+F https://www.fairchildsemi.com/datasheets/FD/FDS8960C.pdf
+$ENDCMP
+#
 $CMP FDS9926A
 D 20V Vds, 6.5A Id, 30mOhm Rds, Dual N-Channel MOSFET, SO-8
 K Dual N-Channel MOSFET
 F http://www.fairchildsemi.com/ds/FD/FDS9926A.pdf
 $ENDCMP
 #
+$CMP FDS9934C
+D Dual N and P Channel MOSFET, 20V Vds, 6.5A Id, 30mΩ Rds @ 4.5V Vgs, SO8L
+K Dual N-Channel P-Channel MOSFET
+F https://www.fairchildsemi.com/datasheets/FD/FDS9934C.pdf
+$ENDCMP
+#
+$CMP FFB2222A
+D 40V Vce, 600mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F https://www.fairchildsemi.com/datasheets/FF/FFB2222A.pdf
+$ENDCMP
+#
+$CMP FFB3904
+D 40V Vce, 200mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F https://www.fairchildsemi.com/datasheets/FF/FFB3904.pdf
+$ENDCMP
+#
+$CMP FFB3906
+D 40V Vce, 200mA IC, Dual PNP/PNP Transistors, SOT-363
+K Transistor PNP/PNP
+F https://www.fairchildsemi.com/datasheets/FF/FFB3906.pdf
+$ENDCMP
+#
+$CMP FFB3946
+D 40V Vce, 200mA IC, Dual NPN/PNP Transistors, SOT-363
+K Transistor NPN/PNP
+F https://www.fairchildsemi.com/datasheets/FF/FFB3946.pdf
+$ENDCMP
+#
+$CMP FFB5551
+D 160V Vce, 200mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F https://www.fairchildsemi.com/datasheets/FF/FFB5551.pdf
+$ENDCMP
+#
 $CMP IPS6011PBF
 D 39V, 60A, Intelligent Power Switch High Side, TO-220-5
 K  Intelligent Power Switch High Side MOSFET
@@ -1920,6 +2052,30 @@ K Precision Dual Monolithic Transistor Low Noise EOL
 F http://www.elenota.pl/datasheet_download/93431/MAT02
 $ENDCMP
 #
+$CMP MBT2222ADW1T1
+D 40V Vce, 600mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F http://www.onsemi.com/pub_link/Collateral/MBT2222ADW1T1-D.PDF
+$ENDCMP
+#
+$CMP MBT3904DW1
+D 40V Vce, 200mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F http://www.onsemi.com/pub_link/Collateral/MBT3904DW1T1-D.PDF
+$ENDCMP
+#
+$CMP MBT3906DW1
+D 40V Vce, 200mA IC, Dual PNP/PNP Transistors, SOT-363
+K Transistor PNP/PNP
+F http://www.onsemi.com/pub_link/Collateral/MBT3906DW1T1-D.PDF
+$ENDCMP
+#
+$CMP MBT3946DW1T1
+D 40V Vce, 200mA IC, Dual NPN/PNP Transistors, SOT-363
+K Transistor NPN/PNP
+F http://www.onsemi.com/pub_link/Collateral/MBT3946DW1T1-D.PDF
+$ENDCMP
+#
 $CMP MJE13003
 D 1.5A Ic, 400V Vce, Silicon Switching Power Transistor NPN, TO-225
 K Switching Power High Voltage Transistor NPN
@@ -1962,6 +2118,42 @@ K MMBT3904 PNP Transistor
 F http://www.nxp.com/documents/data_sheet/MMBT3906.pdf
 $ENDCMP
 #
+$CMP MMDT2222A
+D 40V Vce, 600mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F http://www.diodes.com/_files/datasheets/ds30125.pdf
+$ENDCMP
+#
+$CMP MMDT3904
+D 40V Vce, 200mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F http://www.diodes.com/_files/datasheets/ds30088.pdf
+$ENDCMP
+#
+$CMP MMDT3906
+D 40V Vce, 200mA IC, Dual PNP/PNP Transistors, SOT-363
+K Transistor PNP/PNP
+F http://www.diodes.com/_files/datasheets/ds30124.pdf
+$ENDCMP
+#
+$CMP MMDT3946
+D 40V Vce, 200mA IC, Dual NPN/PNP Transistors, SOT-363
+K Transistor NPN/PNP
+F http://www.diodes.com/_files/datasheets/ds30123.pdf
+$ENDCMP
+#
+$CMP MMDT5401
+D 160V Vce, 200mA IC, Dual PNP/PNP Transistors, SOT-363
+K Transistor PNP/PNP
+F http://www.diodes.com/_files/datasheets/ds30169.pdf
+$ENDCMP
+#
+$CMP MMDT5551
+D 160V Vce, 200mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F http://www.diodes.com/_files/datasheets/ds30172.pdf
+$ENDCMP
+#
 $CMP MPSA42
 D Vce 300V, Ic 500mA, NPN High Voltage Transistor, TO-92
 K NPN High Voltage Transistor
@@ -1974,6 +2166,30 @@ K PNP High Voltage Transistor
 F http://www.onsemi.com/pub_link/Collateral/MPSA92-D.PDF
 $ENDCMP
 #
+$CMP PMBT2222AYS
+D 40V Vce, 600mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F http://www.nxp.com/documents/data_sheet/PMBT2222AYS.pdf
+$ENDCMP
+#
+$CMP PMBT3904YS
+D 40V Vce, 200mA IC, Dual NPN/NPN Transistors, SOT-363
+K Transistor NPN/NPN
+F http://www.nxp.com/documents/data_sheet/PMBT3904YS.pdf
+$ENDCMP
+#
+$CMP PMBT3906YS
+D 40V Vce, 200mA IC, Dual PNP/PNP Transistors, SOT-363
+K Transistor PNP/PNP
+F http://www.nxp.com/documents/data_sheet/PMBT3906YS.pdf
+$ENDCMP
+#
+$CMP PMBT3946YPN
+D 40V Vce, 200mA IC, Dual NPN/PNP Transistors, SOT-363
+K Transistor NPN/PNP
+F http://www.nxp.com/documents/data_sheet/PMBT3946YPN.pdf
+$ENDCMP
+#
 $CMP PN2222A
 D 40V Vce, 1A Ic, NPN, General Purpose Transistor, TO-92
 K NPN Transistor
@@ -2004,6 +2220,18 @@ K S8550 PNP Low Voltage High Current Transistor
 F http://www.unisonic.com.tw/datasheet/S8550.pdf
 $ENDCMP
 #
+$CMP Si4532DY
+D Dual N and P Channel MOSFET, 30V Vds, 3.9A Id, 65mΩ Rds @ 10V Vgs, SO8L
+K Dual N-Channel P-Channel MOSFET
+F https://www.fairchildsemi.com/datasheets/SI/SI4532DY.pdf
+$ENDCMP
+#
+$CMP Si4542DY
+D Dual N and P Channel MOSFET, 30V Vds, 6A Id, 28mΩ Rds @ 10V Vgs, SO8L
+K Dual N-Channel P-Channel MOSFET
+F https://www.fairchildsemi.com/datasheets/SI/SI4542DY.pdf
+$ENDCMP
+#
 $CMP TIP120
 D 5A Ic, 60V Vce, Silicon Darlington Power Transistor NPN, TO-220
 K Darlington Power Transistor NPN

library/transistors.lib

@@ -504,6 +504,69 @@ X C 3 100 200 100 D 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# BC846BPN
+#
+DEF BC846BPN Q 0 0 Y N 2 L N
+F0 "Q" 200 50 50 H V L CNN
+F1 "BC846BPN" 200 -50 50 H V L CNN
+F2 "TO_SOT_Packages_SMD:SOT-363" 200 100 50 H I C CNN
+F3 "" 0 0 50 H V C CNN
+ALIAS BC846BPDW1 BC847BPN BC847BPDW1 PMBT3946YPN MMDT3946 MBT3946DW1T1 FFB3946
+$FPLIST
+ SC?70*
+ SC?88*
+ SOT?363*
+$ENDFPLIST
+DRAW
+C 50 0 111 0 1 10 N
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 0 -100 0 N
+P 2 1 1 0 25 25 100 100 N
+P 3 1 1 0 25 -25 100 -100 100 -100 N
+P 3 1 1 20 25 75 25 -75 25 -75 N
+P 5 1 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X E1 1 100 -200 100 U 50 50 1 1 P
+X B1 2 -200 0 100 R 50 50 1 1 I
+X C1 6 100 200 100 D 50 50 1 1 P
+P 2 2 1 0 25 25 100 100 N
+P 3 2 1 0 25 -25 100 -100 100 -100 N
+P 3 2 1 20 25 75 25 -75 25 -75 N
+P 5 2 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C2 3 100 200 100 D 50 50 2 1 P
+X E2 4 100 -200 100 U 50 50 2 1 P
+X B2 5 -200 0 100 R 50 50 2 1 I
+ENDDRAW
+ENDDEF
+#
+# BC846BS
+#
+DEF BC846BS Q 0 0 Y N 2 L N
+F0 "Q" 200 50 50 H V L CNN
+F1 "BC846BS" 200 -50 50 H V L CNN
+F2 "TO_SOT_Packages_SMD:SOT-363" 200 100 50 H I C CNN
+F3 "" 0 0 50 H V C CNN
+ALIAS BC846BDW1 BC847BS BC847BDW1 PMBT2222AYS MMDT2222A MBT2222ADW1T1 FFB2222A PMBT3904YS MMDT3904 MBT3904DW1 FFB3904 MMDT5551 FFB5551
+$FPLIST
+ SC?70*
+ SC?88*
+ SOT?363*
+$ENDFPLIST
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 0 -100 0 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X E1 1 100 -200 100 U 50 50 1 1 P
+X B1 2 -200 0 100 R 50 50 1 1 I
+X C1 6 100 200 100 D 50 50 1 1 P
+X C2 3 100 200 100 D 50 50 2 1 P
+X E2 4 100 -200 100 U 50 50 2 1 P
+X B2 5 -200 0 100 R 50 50 2 1 I
+ENDDRAW
+ENDDEF
+#
 # BC850
 #
 DEF BC850 Q 0 0 Y Y 1 F N
@@ -552,6 +615,35 @@ X C 3 100 200 100 D 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# BC856BS
+#
+DEF BC856BS Q 0 0 Y N 2 L N
+F0 "Q" 200 50 50 H V L CNN
+F1 "BC856BS" 200 -50 50 H V L CNN
+F2 "TO_SOT_Packages_SMD:SOT-363" 200 100 50 H I C CNN
+F3 "" 0 0 50 H V C CNN
+ALIAS BC856BDW1 BC857BS BC857BDW1 PMBT3906YS MMDT3906 MBT3906DW1 FFB3906 MMDT5401
+$FPLIST
+ SC?70*
+ SC?88*
+ SOT?363*
+$ENDFPLIST
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 0 -100 0 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X E1 1 100 -200 100 U 50 50 1 1 P
+X B1 2 -200 0 100 R 50 50 1 1 I
+X C1 6 100 200 100 D 50 50 1 1 P
+X C2 3 100 200 100 D 50 50 2 1 P
+X E2 4 100 -200 100 U 50 50 2 1 P
+X B2 5 -200 0 100 R 50 50 2 1 I
+ENDDRAW
+ENDDEF
+#
 # BCP51
 #
 DEF BCP51 Q 0 0 Y Y 1 F N
@@ -4159,6 +4251,50 @@ X ~ 6 200 200 100 D 50 50 2 1 P
 ENDDRAW
 ENDDEF
 #
+# FDS9934C
+#
+DEF FDS9934C Q 0 0 Y Y 2 F N
+F0 "Q" 250 75 50 H V L CNN
+F1 "FDS9934C" 250 0 50 H V L CNN
+F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 250 -75 50 H I L CNN
+F3 "" 250 -150 50 H I L CNN
+ALIAS Si4542DY FDS4559 Si4532DY FDS4897AC FDS4897C FDS8960C
+$FPLIST
+ SOIC*3.9x4.9mm*Pitch1.27mm*
+$ENDFPLIST
+DRAW
+C 65 0 111 0 1 10 N
+C 100 -70 11 0 1 0 F
+C 100 70 11 0 1 0 F
+P 2 0 1 0 30 -70 100 -70 N
+P 2 0 1 10 30 -50 30 -90 N
+P 2 0 1 0 30 0 100 0 N
+P 2 0 1 10 30 20 30 -20 N
+P 2 0 1 0 30 70 100 70 N
+P 2 0 1 10 30 90 30 50 N
+P 2 0 1 0 100 -70 100 -100 N
+P 2 0 1 0 100 -70 100 0 N
+P 2 0 1 0 100 100 100 70 N
+P 2 0 1 0 100 100 200 100 N
+P 3 0 1 10 10 75 10 -75 10 -75 N
+P 4 0 1 0 100 -70 130 -70 130 70 100 70 N
+P 4 1 1 0 40 0 80 15 80 -15 40 0 F
+P 4 1 1 0 110 20 115 15 145 15 150 10 N
+P 4 1 1 0 130 15 115 -10 145 -10 130 15 N
+X S 1 100 -200 100 U 50 50 1 1 P
+X G 2 -200 0 210 R 50 50 1 1 I
+X ~ 7 200 200 100 D 50 50 1 1 P
+X D 8 100 200 100 D 50 50 1 1 P
+P 4 2 1 0 90 0 50 -15 50 15 90 0 F
+P 4 2 1 0 110 -20 115 -15 145 -15 150 -10 N
+P 4 2 1 0 130 -15 115 10 145 10 130 -15 N
+X S 3 100 -200 100 U 50 50 2 1 P
+X G 4 -200 0 210 R 50 50 2 1 I
+X D 5 100 200 100 D 50 50 2 1 P
+X ~ 6 200 200 100 D 50 50 2 1 P
+ENDDRAW
+ENDDEF
+#
 # IPS6011PBF
 #
 DEF IPS6011PBF Q 0 0 Y Y 1 F N
@@ -4627,27 +4763,27 @@ C 50 0 111 0 1 10 N
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 C 100 50 5 0 1 0 N
 C 130 50 5 0 1 0 N
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-P 2 0 1 20  25 15  25 -15 N
-P 2 0 1 20  25 65  25 40 N
-P 3 0 1 10  0 60  0 -60  0 -60 N
-P 3 0 1 0  200 100  200 50  100 50 N
-P 4 0 1 0  30 -50  100 -50  100 -100  100 -100 N
-P 4 0 1 0  30 50  100 50  100 100  100 100 N
-P 4 0 1 0  55 15  55 -15  95 0  55 15 F
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-P 4 0 1 0  120 10  140 10  130 -15  120 10 F
-P 5 0 1 0  30 0  50 0  100 0  100 -50  100 -50 N
-P 2 1 1 0  120 -20  115 -25 N
-P 2 1 1 0  120 -20  140 -20 N
-P 2 1 1 0  140 -20  145 -15 N
+P 2 0 1 20 25 -40 25 -65 N
+P 2 0 1 20 25 15 25 -15 N
+P 2 0 1 20 25 65 25 40 N
+P 3 0 1 10 0 60 0 -60 0 -60 N
+P 3 0 1 0 200 100 200 50 100 50 N
+P 4 0 1 0 30 -50 100 -50 100 -100 100 -100 N
+P 4 0 1 0 30 50 100 50 100 100 100 100 N
+P 4 0 1 0 55 15 55 -15 95 0 55 15 F
+P 4 0 1 0 100 50 130 50 130 -50 100 -50 N
+P 4 0 1 0 120 10 140 10 130 -15 120 10 F
+P 5 0 1 0 30 0 50 0 100 0 100 -50 100 -50 N
+P 2 1 1 0 120 -20 115 -25 N
+P 2 1 1 0 120 -20 140 -20 N
+P 2 1 1 0 140 -20 145 -15 N
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 X G 2 -200 0 200 R 50 50 1 1 I
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-P 4 2 1 0  115 -20  120 -15  140 -15  145 -10 N
-P 4 2 1 0  130 -15  120 10  140 10  130 -15 F
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+P 4 2 1 0 130 -15 120 10 140 10 130 -15 F
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template/1593K_Enclosure/1593K_Enclosure.kicad_pcb

@@ -0,0 +1,683 @@
+(kicad_pcb (version 20160815) (host pcbnew no-vcs-found-7409~56~ubuntu16.10.1)
+
+  (general
+    (links 0)
+    (no_connects 0)
+    (area 69.845 81.766999 134.395 145.67)
+    (thickness 1.6)
+    (drawings 15)
+    (tracks 0)
+    (zones 0)
+    (modules 5)
+    (nets 1)
+  )
+
+  (page A)
+  (title_block
+    (title "Enter Title On Page Setting Dialog")
+    (rev 1)
+    (company "Ashton Johnson")
+  )
+
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (33 F.Adhes user)
+    (35 F.Paste user)
+    (37 F.SilkS user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (47 F.CrtYd user)
+    (49 F.Fab user)
+  )
+
+  (setup
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+    (user_trace_width 0.1524)
+    (user_trace_width 0.2032)
+    (user_trace_width 0.254)
+    (user_trace_width 0.381)
+    (user_trace_width 0.508)
+    (user_trace_width 0.635)
+    (user_trace_width 0.889)
+    (user_trace_width 1.27)
+    (user_trace_width 2.974416)
+    (trace_clearance 0.254)
+    (zone_clearance 0.508)
+    (zone_45_only yes)
+    (trace_min 0.1524)
+    (segment_width 0.2)
+    (edge_width 0.1)
+    (via_size 0.6858)
+    (via_drill 0.3302)
+    (via_min_size 0.6858)
+    (via_min_drill 0.3302)
+    (user_via 0.6858 0.3302)
+    (uvia_size 254)
+    (uvia_drill 127)
+    (uvias_allowed no)
+    (uvia_min_size 0)
+    (uvia_min_drill 0)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 3.2 3.2)
+    (pad_drill 3.2)
+    (pad_to_mask_clearance 0.0762)
+    (aux_axis_origin 130 100)
+    (grid_origin 130 100)
+    (visible_elements 7FFFFFFF)
+    (pcbplotparams
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+      (usegerberextensions true)
+      (usegerberattributes true)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk true)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+
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+    (uvia_dia 254)
+    (uvia_drill 127)
+    (diff_pair_gap 0.25)
+    (diff_pair_width 0.2)
+  )
+
+  (module Mounting_Holes:MountingHole_3.2mm_M3_ISO14580 locked (layer F.Cu) (tedit 586721DC) (tstamp 58672070)
+    (at 115.695 124.647)
+    (descr "Mounting Hole 3.2mm, no annular, M3, ISO14580")
+    (tags "mounting hole 3.2mm no annular m3 iso14580")
+    (fp_text reference MK4 (at 0 -3.75) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value MountingHole_3.2mm_M3_ISO14580 (at 0 3.75) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 3 0) (layer F.CrtYd) (width 0.05))
+    (fp_circle (center 0 0) (end 2.75 0) (layer Cmts.User) (width 0.15))
+    (pad 1 np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu *.Mask))
+  )
+
+  (module Mounting_Holes:MountingHole_3.2mm_M3_ISO14580 locked (layer F.Cu) (tedit 586721DF) (tstamp 5867206A)
+    (at 87.695 124.647)
+    (descr "Mounting Hole 3.2mm, no annular, M3, ISO14580")
+    (tags "mounting hole 3.2mm no annular m3 iso14580")
+    (fp_text reference MK3 (at 0 -3.75) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value MountingHole_3.2mm_M3_ISO14580 (at 0 3.75) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 3 0) (layer F.CrtYd) (width 0.05))
+    (fp_circle (center 0 0) (end 2.75 0) (layer Cmts.User) (width 0.15))
+    (pad 1 np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu *.Mask))
+  )
+
+  (module Mounting_Holes:MountingHole_3.2mm_M3_ISO14580 locked (layer F.Cu) (tedit 586721D5) (tstamp 58672064)
+    (at 115.695 96.647)
+    (descr "Mounting Hole 3.2mm, no annular, M3, ISO14580")
+    (tags "mounting hole 3.2mm no annular m3 iso14580")
+    (fp_text reference MK2 (at 0 -3.75) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value MountingHole_3.2mm_M3_ISO14580 (at 0 3.75) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 3 0) (layer F.CrtYd) (width 0.05))
+    (fp_circle (center 0 0) (end 2.75 0) (layer Cmts.User) (width 0.15))
+    (pad 1 np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu *.Mask))
+  )
+
+  (module Mounting_Holes:MountingHole_3.2mm_M3_ISO14580 locked (layer F.Cu) (tedit 586721D8) (tstamp 58671FE4)
+    (at 87.695 96.647)
+    (descr "Mounting Hole 3.2mm, no annular, M3, ISO14580")
+    (tags "mounting hole 3.2mm no annular m3 iso14580")
+    (fp_text reference MK1 (at 0 -3.75) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value MountingHole_3.2mm_M3_ISO14580 (at 0 3.75) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 2.75 0) (layer Cmts.User) (width 0.15))
+    (fp_circle (center 0 0) (end 3 0) (layer F.CrtYd) (width 0.05))
+    (pad 1 np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu *.Mask))
+  )
+
+  (module Symbols:KiCad-Logo2_6mm_SilkScreen (layer F.Cu) (tedit 581164A0) (tstamp 581165B4)
+    (at 80 136)
+    (descr "KiCad Logo")
+    (tags "Logo KiCad")
+    (attr virtual)
+    (fp_text reference REF*** (at -3.95 -3.37) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value KiCad-Logo2_6mm_SilkScreen (at -7.34 4.17) (layer F.Fab) hide
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+  )
+
+  (gr_text "NO CONNECTORS " (at 71 108 90) (layer Dwgs.User) (tstamp 581163A4)
+    (effects (font (size 1.5 1.5) (thickness 0.3)))
+  )
+  (gr_text "NO CONNECTORS " (at 133 108 90) (layer Dwgs.User)
+    (effects (font (size 1.5 1.5) (thickness 0.3)))
+  )
+  (gr_text "RIGHT ANGLE CONNECTORS ON \nFRONT AND BACK ONLY" (at 102 143) (layer Dwgs.User)
+    (effects (font (size 1.5 1.5) (thickness 0.3)))
+  )
+  (gr_arc (start 126.695 103.315) (end 126.695 106.63) (angle 180) (layer Edge.Cuts) (width 0.1))
+  (gr_arc (start 76.695 103.315) (end 76.695 100) (angle 180) (layer Edge.Cuts) (width 0.1))
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+  (gr_line (start 73.39 106.63) (end 73.39 139.477) (layer Edge.Cuts) (width 0.1))
+  (gr_line (start 126.695 100) (end 130 100) (layer Edge.Cuts) (width 0.1))
+  (gr_line (start 130 139.477) (end 130 106.63) (layer Edge.Cuts) (width 0.1))
+  (gr_line (start 76.695 106.63) (end 73.39 106.63) (layer Edge.Cuts) (width 0.1))
+  (gr_line (start 130 106.63) (end 126.695 106.63) (layer Edge.Cuts) (width 0.1))
+  (gr_line (start 73.39 100) (end 76.695 100) (layer Edge.Cuts) (width 0.1))
+  (gr_line (start 130 100) (end 130 81.817) (layer Edge.Cuts) (width 0.1))
+
+)

template/1593K_Enclosure/1593K_Enclosure.net

@@ -0,0 +1,54 @@
+(export (version D)
+  (design
+    (source /home/ashton/kicad/kicad-library/template/1593K_Enclosure/1593K_Enclosure.sch)
+    (date "Fri 30 Dec 2016 09:10:05 PM CST")
+    (tool "Eeschema no-vcs-found-7409~56~ubuntu16.10.1")
+    (sheet (number 1) (name /) (tstamps /)
+      (title_block
+        (title)
+        (company)
+        (rev)
+        (date)
+        (source 1593K_Enclosure.sch)
+        (comment (number 1) (value ""))
+        (comment (number 2) (value ""))
+        (comment (number 3) (value ""))
+        (comment (number 4) (value "")))))
+  (components
+    (comp (ref MK1)
+      (value Mounting_Hole)
+      (footprint Mounting_Holes:MountingHole_3.2mm_M3_ISO7380)
+      (libsource (lib mechanical) (part Mounting_Hole))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5867217E))
+    (comp (ref MK3)
+      (value Mounting_Hole)
+      (footprint Mounting_Holes:MountingHole_3.2mm_M3_ISO7380)
+      (libsource (lib mechanical) (part Mounting_Hole))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 58672295))
+    (comp (ref MK2)
+      (value Mounting_Hole)
+      (footprint Mounting_Holes:MountingHole_3.2mm_M3_ISO7380)
+      (libsource (lib mechanical) (part Mounting_Hole))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 586722B5))
+    (comp (ref MK4)
+      (value Mounting_Hole)
+      (footprint Mounting_Holes:MountingHole_3.2mm_M3_ISO7380)
+      (libsource (lib mechanical) (part Mounting_Hole))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5867236D)))
+  (libparts
+    (libpart (lib mechanical) (part Mounting_Hole)
+      (description "Mounting Hole without connection")
+      (footprints
+        (fp Mounting?Hole*)
+        (fp Hole*))
+      (fields
+        (field (name Reference) MK)
+        (field (name Value) Mounting_Hole))))
+  (libraries
+    (library (logical mechanical)
+      (uri /home/ashton/kicad/kicad-library/library/mechanical.lib)))
+  (nets))

template/1593K_Enclosure/1593K_Enclosure.pro

@@ -0,0 +1,32 @@
+update=Fri 30 Dec 2016 09:08:25 PM CST
+version=1
+last_client=kicad
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[general]
+version=1
+[eeschema]
+version=1
+LibDir=../../library
+[eeschema/libraries]
+LibName1=mechanical

template/1593K_Enclosure/1593K_Enclosure.sch

@@ -0,0 +1,61 @@
+EESchema Schematic File Version 2
+LIBS:mechanical
+EELAYER 26 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L Mounting_Hole MK1
+U 1 1 5867217E
+P 4200 7200
+F 0 "MK1" H 4300 7246 50  0000 L CNN
+F 1 "Mounting_Hole" H 4300 7155 50  0000 L CNN
+F 2 "Mounting_Holes:MountingHole_3.2mm_M3_ISO7380" H 4200 7200 60  0001 C CNN
+F 3 "" H 4200 7200 60  0001 C CNN
+	1    4200 7200
+	1    0    0    -1  
+$EndComp
+$Comp
+L Mounting_Hole MK3
+U 1 1 58672295
+P 5100 7200
+F 0 "MK3" H 5200 7246 50  0000 L CNN
+F 1 "Mounting_Hole" H 5200 7155 50  0000 L CNN
+F 2 "Mounting_Holes:MountingHole_3.2mm_M3_ISO7380" H 5100 7200 60  0001 C CNN
+F 3 "" H 5100 7200 60  0001 C CNN
+	1    5100 7200
+	1    0    0    -1  
+$EndComp
+$Comp
+L Mounting_Hole MK2
+U 1 1 586722B5
+P 4200 7450
+F 0 "MK2" H 4300 7496 50  0000 L CNN
+F 1 "Mounting_Hole" H 4300 7405 50  0000 L CNN
+F 2 "Mounting_Holes:MountingHole_3.2mm_M3_ISO7380" H 4200 7450 60  0001 C CNN
+F 3 "" H 4200 7450 60  0001 C CNN
+	1    4200 7450
+	1    0    0    -1  
+$EndComp
+$Comp
+L Mounting_Hole MK4
+U 1 1 5867236D
+P 5100 7450
+F 0 "MK4" H 5200 7496 50  0000 L CNN
+F 1 "Mounting_Hole" H 5200 7405 50  0000 L CNN
+F 2 "Mounting_Holes:MountingHole_3.2mm_M3_ISO7380" H 5100 7450 60  0001 C CNN
+F 3 "" H 5100 7450 60  0001 C CNN
+	1    5100 7450
+	1    0    0    -1  
+$EndComp
+$EndSCHEMATC

template/1593K_Enclosure/meta/info.html

@@ -0,0 +1,29 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
+<HTML>
+<HEAD>
+<META HTTP-EQUIV="CONTENT-TYPE" CONTENT="text/html; charset=windows-1252">
+<TITLE>1593K Enclosure</TITLE>
+<META NAME="GENERATOR" CONTENT="LibreOffice 3.6 (Windows)">
+<META NAME="CREATED" CONTENT="0;0">
+<META NAME="CHANGED" CONTENT="20121015;19015295">
+</HEAD>
+<BODY LANG="en" DIR="LTR">
+<h1>Hammond Manufacturing</h1>
+<h2>1593K Enclosure Template</h2>
+
+<P>This project template is the basis of an PCB for the
+<A HREF="http://www.hammondmfg.com/dwg8.htm" TARGET="blank">Hammond Manufacturing 1593K Enclosure</A> <br>
+<br>Board Dimensions: 56.61mm[2.23"] x 57.66mm[2.27"]
+</BODY>
+
+
+<p>The board outline looks like the following:</p>
+
+<p><img src="brd.png"></p>
+<p><img src="1593K3B.jpg"></p>
+
+<p>(c)2016 Ashton Johnson<br>
+(c)1997-2016 Hammond Mfg Co Inc<br>
+(c)2016 Kicad Developers<br></p>
+</body>
+</html>

template/Arduino_As_Uno_R3/Arduino_As_Uno-cache.lib

@@ -10,9 +10,9 @@ F2 "" 0 0 50 H V C CNN
 F3 "" 0 0 50 H V C CNN
 ALIAS +3.3V
 DRAW
-P 2 0 1 0  -30 50  0 100 N
-P 2 0 1 0  0 0  0 100 N
-P 2 0 1 0  0 100  30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
 X +3V3 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
@@ -25,9 +25,9 @@ F1 "+5V" 0 140 50 H V C CNN
 F2 "" 0 0 50 H V C CNN
 F3 "" 0 0 50 H V C CNN
 DRAW
-P 2 0 1 0  -30 50  0 100 N
-P 2 0 1 0  0 0  0 100 N
-P 2 0 1 0  0 100  30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
 X +5V 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
@@ -162,7 +162,7 @@ F1 "GND" 0 -150 50 H V C CNN
 F2 "" 0 0 50 H V C CNN
 F3 "" 0 0 50 H V C CNN
 DRAW
-P 6 0 1 0  0 0  0 -50  50 -50  0 -100  -50 -50  0 -50 N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
 X GND 1 0 0 0 D 50 50 1 1 W N
 ENDDRAW
 ENDDEF

template/Arduino_As_Uno_R3/Arduino_As_Uno.cmp

@@ -1,59 +0,0 @@
-Cmp-Mod V01 Created by Cvpcb (2015-03-25 BZR 5536)-product   date = mer. 08 avril 2015 09:59:14 UTC
-
-BeginCmp
-TimeStamp = /5517C2C1;
-Reference = P1;
-ValeurCmp = Power;
-IdModule  = Socket_Arduino_Uno:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /5517C323;
-Reference = P2;
-ValeurCmp = Analog;
-IdModule  = Socket_Arduino_Uno:Socket_Strip_Arduino_1x06;
-EndCmp
-
-BeginCmp
-TimeStamp = /5517C46C;
-Reference = P3;
-ValeurCmp = Digital;
-IdModule  = Socket_Arduino_Uno:Socket_Strip_Arduino_1x10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5517C366;
-Reference = P4;
-ValeurCmp = Digital;
-IdModule  = Socket_Arduino_Uno:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBC06;
-Reference = P5;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Uno:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBD10;
-Reference = P6;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Uno:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBD30;
-Reference = P7;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Uno:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBD52;
-Reference = P8;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Uno:Arduino_1pin;
-EndCmp
-
-EndListe

template/Arduino_As_Uno_R3/Arduino_As_Uno.sch

@@ -45,7 +45,7 @@ Comment4 ""
 $EndDescr
 Text Label 8950 1450 1    60   ~ 0
 Vin
-Text Label 9300 1450 1    60   ~ 0
+Text Label 9350 1450 1    60   ~ 0
 IOREF
 Text Label 8900 2500 0    60   ~ 0
 A0
@@ -104,7 +104,7 @@ U 1 1 56D70129
 P 9600 1950
 F 0 "P1" H 9600 2400 50  0000 C CNN
 F 1 "Power" V 9700 1950 50  0000 C CNN
-F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x08" H 9600 1950 50  0001 C CNN
+F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x08" V 9750 1950 20  0000 C CNN
 F 3 "" H 9600 1950 50  0000 C CNN
 	1    9600 1950
 	1    0    0    -1  
@@ -116,7 +116,7 @@ L +3.3V #PWR01
 U 1 1 56D70538
 P 9150 1450
 F 0 "#PWR01" H 9150 1300 50  0001 C CNN
-F 1 "+3.3V" H 9150 1590 30  0000 C CNN
+F 1 "+3.3V" H 9150 1590 50  0000 C CNN
 F 2 "" H 9150 1450 50  0000 C CNN
 F 3 "" H 9150 1450 50  0000 C CNN
 	1    9150 1450
@@ -125,12 +125,12 @@ $EndComp
 $Comp
 L +5V #PWR02
 U 1 1 56D707BB
-P 9050 1450
-F 0 "#PWR02" H 9050 1300 50  0001 C CNN
-F 1 "+5V" H 9050 1590 30  0000 C CNN
-F 2 "" H 9050 1450 50  0000 C CNN
-F 3 "" H 9050 1450 50  0000 C CNN
-	1    9050 1450
+P 9050 1350
+F 0 "#PWR02" H 9050 1200 50  0001 C CNN
+F 1 "+5V" H 9050 1490 50  0000 C CNN
+F 2 "" H 9050 1350 50  0000 C CNN
+F 3 "" H 9050 1350 50  0000 C CNN
+	1    9050 1350
 	1    0    0    -1  
 $EndComp
 $Comp
@@ -161,7 +161,7 @@ U 1 1 56D70DD8
 P 9600 2750
 F 0 "P2" H 9600 3100 50  0000 C CNN
 F 1 "Analog" V 9700 2750 50  0000 C CNN
-F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x06" H 9600 2750 50  0001 C CNN
+F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x06" V 9750 2800 20  0000 C CNN
 F 3 "" H 9600 2750 50  0000 C CNN
 	1    9600 2750
 	1    0    0    -1  
@@ -172,7 +172,7 @@ U 1 1 56D71177
 P 10800 650
 F 0 "P5" V 10900 650 50  0000 C CNN
 F 1 "CONN_01X01" V 10900 650 50  0001 C CNN
-F 2 "Socket_Arduino_Uno:Arduino_1pin" H 10800 650 50  0001 C CNN
+F 2 "Socket_Arduino_Uno:Arduino_1pin" H 10721 724 20  0000 C CNN
 F 3 "" H 10800 650 50  0000 C CNN
 	1    10800 650 
 	0    -1   -1   0   
@@ -183,7 +183,7 @@ U 1 1 56D71274
 P 10900 650
 F 0 "P6" V 11000 650 50  0000 C CNN
 F 1 "CONN_01X01" V 11000 650 50  0001 C CNN
-F 2 "Socket_Arduino_Uno:Arduino_1pin" H 10900 650 50  0001 C CNN
+F 2 "Socket_Arduino_Uno:Arduino_1pin" H 10900 650 20  0001 C CNN
 F 3 "" H 10900 650 50  0000 C CNN
 	1    10900 650 
 	0    -1   -1   0   
@@ -194,7 +194,7 @@ U 1 1 56D712A8
 P 11000 650
 F 0 "P7" V 11100 650 50  0000 C CNN
 F 1 "CONN_01X01" V 11100 650 50  0001 C CNN
-F 2 "Socket_Arduino_Uno:Arduino_1pin" H 11000 650 50  0001 C CNN
+F 2 "Socket_Arduino_Uno:Arduino_1pin" V 11000 650 20  0001 C CNN
 F 3 "" H 11000 650 50  0000 C CNN
 	1    11000 650 
 	0    -1   -1   0   
@@ -205,7 +205,7 @@ U 1 1 56D712DB
 P 11100 650
 F 0 "P8" V 11200 650 50  0000 C CNN
 F 1 "CONN_01X01" V 11200 650 50  0001 C CNN
-F 2 "Socket_Arduino_Uno:Arduino_1pin" H 11100 650 50  0001 C CNN
+F 2 "Socket_Arduino_Uno:Arduino_1pin" H 11024 572 20  0000 C CNN
 F 3 "" H 11100 650 50  0000 C CNN
 	1    11100 650 
 	0    -1   -1   0   
@@ -220,7 +220,7 @@ U 1 1 56D7164F
 P 10000 2650
 F 0 "P4" H 10000 3100 50  0000 C CNN
 F 1 "Digital" V 10100 2650 50  0000 C CNN
-F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x08" H 10000 2650 50  0001 C CNN
+F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x08" V 10150 2600 20  0000 C CNN
 F 3 "" H 10000 2650 50  0000 C CNN
 	1    10000 2650
 	-1   0    0    -1  
@@ -230,9 +230,9 @@ Wire Notes Line
 Wire Notes Line
 	9925 825  9925 475 
 Wire Wire Line
-	9300 1450 9300 1700
+	9350 1450 9350 1700
 Wire Wire Line
-	9300 1700 9400 1700
+	9350 1700 9400 1700
 Wire Wire Line
 	9400 1900 9150 1900
 Wire Wire Line
@@ -247,7 +247,7 @@ Connection ~ 9300 2200
 Wire Wire Line
 	8950 2300 8950 1450
 Wire Wire Line
-	9050 2000 9050 1450
+	9050 2000 9050 1350
 Wire Wire Line
 	9150 1900 9150 1450
 Wire Wire Line
@@ -268,7 +268,7 @@ U 1 1 56D721E0
 P 10000 1650
 F 0 "P3" H 10000 2200 50  0000 C CNN
 F 1 "Digital" V 10100 1650 50  0000 C CNN
-F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x10" H 10000 1650 50  0001 C CNN
+F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x10" V 10150 1650 20  0000 C CNN
 F 3 "" H 10000 1650 50  0000 C CNN
 	1    10000 1650
 	-1   0    0    -1  
@@ -312,7 +312,9 @@ Wire Wire Line
 Wire Wire Line
 	10300 1500 10300 3150
 Wire Wire Line
-	9300 2100 9300 3150
+	9300 2100 9300 2200
+Wire Wire Line
+	9300 2200 9300 3150
 Wire Notes Line
 	8500 500  8500 3450
 Wire Notes Line

template/Arduino_As_Uno_R3/fp-lib-table

@@ -0,0 +1,3 @@
+(fp_lib_table
+  (lib (name Socket_Arduino_Uno)(type KiCad)(uri "$(KIPRJMOD)\\Socket_Arduino_Uno.pretty")(options "")(descr ""))
+)

template/Arduino_Fio/Arduino_Fio-cache.lib

@@ -10,9 +10,9 @@ F2 "" 0 0 50 H V C CNN
 F3 "" 0 0 50 H V C CNN
 ALIAS +3.3V
 DRAW
-P 2 0 1 0  -30 50  0 100 N
-P 2 0 1 0  0 0  0 100 N
-P 2 0 1 0  0 100  30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
 X +3V3 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
@@ -71,7 +71,7 @@ F1 "GND" 0 -150 50 H V C CNN
 F2 "" 0 0 50 H V C CNN
 F3 "" 0 0 50 H V C CNN
 DRAW
-P 6 0 1 0  0 0  0 -50  50 -50  0 -100  -50 -50  0 -50 N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
 X GND 1 0 0 0 D 50 50 1 1 W N
 ENDDRAW
 ENDDEF

template/Arduino_Fio/Arduino_Fio.cmp

@@ -1,17 +0,0 @@
-Cmp-Mod V01 Created by Cvpcb (2015-03-25 BZR 5536)-product   date = sam. 04 avril 2015 11:58:44 UTC
-
-BeginCmp
-TimeStamp = /551FCE8A;
-Reference = P1;
-ValeurCmp = Digital;
-IdModule  = Socket_Arduino_Fio:Socket_Strip_Straight_1x14;
-EndCmp
-
-BeginCmp
-TimeStamp = /551FCED2;
-Reference = P2;
-ValeurCmp = Analog;
-IdModule  = Socket_Arduino_Fio:Socket_Strip_Straight_1x14;
-EndCmp
-
-EndListe

template/Arduino_Fio/Arduino_Fio.sch

@@ -106,8 +106,8 @@ L CONN_01X14 P1
 U 1 1 56D705A1
 P 9750 1700
 F 0 "P1" H 9750 2450 50  0000 C CNN
-F 1 "Digital" V 9850 1700 50  0000 C CNN
-F 2 "Socket_Arduino_Fio:Socket_Strip_Straight_1x14" H 9750 1700 50  0001 C CNN
+F 1 "Digital" H 9750 950 50  0000 C CNN
+F 2 "Socket_Arduino_Fio:Socket_Strip_Straight_1x14" V 9850 1700 30  0000 C CNN
 F 3 "" H 9750 1700 50  0000 C CNN
 	1    9750 1700
 	1    0    0    -1  
@@ -117,8 +117,8 @@ L CONN_01X14 P2
 U 1 1 56D706EC
 P 10100 1700
 F 0 "P2" H 10100 2450 50  0000 C CNN
-F 1 "Analog" V 10200 1700 50  0000 C CNN
-F 2 "Socket_Arduino_Fio:Socket_Strip_Straight_1x14" H 10100 1700 50  0001 C CNN
+F 1 "Analog" H 10100 950 50  0000 C CNN
+F 2 "Socket_Arduino_Fio:Socket_Strip_Straight_1x14" V 10200 1700 30  0000 C CNN
 F 3 "" H 10100 1700 50  0000 C CNN
 	1    10100 1700
 	-1   0    0    -1  
@@ -231,6 +231,4 @@ Wire Wire Line
 	10700 2250 10300 2250
 Wire Wire Line
 	10700 2350 10300 2350
-Text Notes 9850 1050 0    60   ~ 0
-1
 $EndSCHEMATC

template/Arduino_Fio/fp-lib-table

@@ -0,0 +1,3 @@
+(fp_lib_table
+  (lib (name Socket_Arduino_Fio)(type KiCad)(uri "$(KIPRJMOD)\\Socket_Arduino_Fio.pretty")(options "")(descr ""))
+)

template/Arduino_Mega_R3/Arduino_Mega-cache.lib

@@ -10,9 +10,9 @@ F2 "" 0 0 50 H V C CNN
 F3 "" 0 0 50 H V C CNN
 ALIAS +3.3V
 DRAW
-P 2 0 1 0  -30 50  0 100 N
-P 2 0 1 0  0 0  0 100 N
-P 2 0 1 0  0 100  30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
 X +3V3 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
@@ -25,9 +25,9 @@ F1 "+5V" 0 140 50 H V C CNN
 F2 "" 0 0 50 H V C CNN
 F3 "" 0 0 50 H V C CNN
 DRAW
-P 2 0 1 0  -30 50  0 100 N
-P 2 0 1 0  0 0  0 100 N
-P 2 0 1 0  0 100  30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
 X +5V 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
@@ -222,7 +222,7 @@ F1 "GND" 0 -150 50 H V C CNN
 F2 "" 0 0 50 H V C CNN
 F3 "" 0 0 50 H V C CNN
 DRAW
-P 6 0 1 0  0 0  0 -50  50 -50  0 -100  -50 -50  0 -50 N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
 X GND 1 0 0 0 D 50 50 1 1 W N
 ENDDRAW
 ENDDEF

template/Arduino_Mega_R3/Arduino_Mega.cmp

@@ -1,94 +0,0 @@
-Cmp-Mod V01 Created by Cvpcb (2015-03-25 BZR 5536)-product   date = mer. 08 avril 2015 10:06:02 UTC
-
-BeginCmp
-TimeStamp = /5519A11D;
-Reference = P1;
-ValeurCmp = Digital;
-IdModule  = Socket_Arduino_Mega:Socket_Strip_Arduino_2x18;
-EndCmp
-
-BeginCmp
-TimeStamp = /5519888A;
-Reference = P2;
-ValeurCmp = Power;
-IdModule  = Socket_Arduino_Mega:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /5519891B;
-Reference = P3;
-ValeurCmp = Analog;
-IdModule  = Socket_Arduino_Mega:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /551989CF;
-Reference = P4;
-ValeurCmp = Analog;
-IdModule  = Socket_Arduino_Mega:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /55198BE2;
-Reference = P5;
-ValeurCmp = PWM;
-IdModule  = Socket_Arduino_Mega:Socket_Strip_Arduino_1x10;
-EndCmp
-
-BeginCmp
-TimeStamp = /55198A32;
-Reference = P6;
-ValeurCmp = PWM;
-IdModule  = Socket_Arduino_Mega:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /55198B76;
-Reference = P7;
-ValeurCmp = Communication;
-IdModule  = Socket_Arduino_Mega:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBA20;
-Reference = P8;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Mega:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBB85;
-Reference = P9;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Mega:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBBAB;
-Reference = P10;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Mega:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBBD7;
-Reference = P11;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Mega:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBC10;
-Reference = P12;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Mega:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBC3C;
-Reference = P13;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Mega:Arduino_1pin;
-EndCmp
-
-EndListe

template/Arduino_Mega_R3/Arduino_Mega.sch

@@ -288,7 +288,7 @@ L +3.3V #PWR01
 U 1 1 56D71AA9
 P 9100 1200
 F 0 "#PWR01" H 9100 1050 50  0001 C CNN
-F 1 "+3.3V" H 9100 1340 28  0000 C CNN
+F 1 "+3.3V" H 9100 1340 50  0000 C CNN
 F 2 "" H 9100 1200 50  0000 C CNN
 F 3 "" H 9100 1200 50  0000 C CNN
 	1    9100 1200
@@ -299,12 +299,12 @@ Reset
 $Comp
 L +5V #PWR02
 U 1 1 56D71D10
-P 9000 1200
-F 0 "#PWR02" H 9000 1050 50  0001 C CNN
-F 1 "+5V" H 9000 1340 28  0000 C CNN
-F 2 "" H 9000 1200 50  0000 C CNN
-F 3 "" H 9000 1200 50  0000 C CNN
-	1    9000 1200
+P 9000 1050
+F 0 "#PWR02" H 9000 900 50  0001 C CNN
+F 1 "+5V" H 9000 1190 50  0000 C CNN
+F 2 "" H 9000 1050 50  0000 C CNN
+F 3 "" H 9000 1050 50  0000 C CNN
+	1    9000 1050
 	1    0    0    -1  
 $EndComp
 $Comp
@@ -412,7 +412,7 @@ Wire Notes Line
 Wire Wire Line
 	9100 1650 9350 1650
 Wire Wire Line
-	9000 1200 9000 1750
+	9000 1050 9000 1750
 Wire Wire Line
 	9000 1750 9350 1750
 Wire Wire Line
@@ -424,7 +424,9 @@ Wire Wire Line
 Wire Wire Line
 	9350 1850 9250 1850
 Wire Wire Line
-	9250 1850 9250 2150
+	9250 1850 9250 1950
+Wire Wire Line
+	9250 1950 9250 2150
 Wire Wire Line
 	9350 1950 9250 1950
 Connection ~ 9250 1950
@@ -611,9 +613,13 @@ F 3 "" H 10750 4550 50  0000 C CNN
 $EndComp
 Connection ~ 10750 4850
 Wire Wire Line
-	10750 4550 10750 5350
+	10750 4550 10750 4850
 Wire Wire Line
-	8650 4850 8650 5750
+	10750 4850 10750 5350
+Wire Wire Line
+	8650 4850 8650 5350
+Wire Wire Line
+	8650 5350 8650 5750
 Wire Notes Line
 	11200 6050 8350 6050
 Wire Notes Line

template/Arduino_Mega_R3/fp-lib-table

@@ -0,0 +1,3 @@
+(fp_lib_table
+  (lib (name Socket_Arduino_Mega)(type KiCad)(uri "$(KIPRJMOD)\\Socket_Arduino_Mega.pretty")(options "")(descr ""))
+)

template/Arduino_Micro/Arduino_Micro-cache.lib

@@ -10,9 +10,9 @@ F2 "" 0 0 50 H V C CNN
 F3 "" 0 0 50 H V C CNN
 ALIAS +3.3V
 DRAW
-P 2 0 1 0  -30 50  0 100 N
-P 2 0 1 0  0 0  0 100 N
-P 2 0 1 0  0 100  30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
 X +3V3 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
@@ -25,9 +25,9 @@ F1 "+5V" 0 140 50 H V C CNN
 F2 "" 0 0 50 H V C CNN
 F3 "" 0 0 50 H V C CNN
 DRAW
-P 2 0 1 0  -30 50  0 100 N
-P 2 0 1 0  0 0  0 100 N
-P 2 0 1 0  0 100  30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
 X +5V 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
@@ -112,7 +112,7 @@ F1 "GND" 0 -150 50 H V C CNN
 F2 "" 0 0 50 H V C CNN
 F3 "" 0 0 50 H V C CNN
 DRAW
-P 6 0 1 0  0 0  0 -50  50 -50  0 -100  -50 -50  0 -50 N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
 X GND 1 0 0 0 D 50 50 1 1 W N
 ENDDRAW
 ENDDEF

template/Arduino_Micro/Arduino_Micro.cmp

@@ -1,45 +0,0 @@
-Cmp-Mod V01 Created by Cvpcb (2015-03-25 BZR 5536)-product   date = sam. 04 avril 2015 10:45:57 UTC
-
-BeginCmp
-TimeStamp = /551FB57F;
-Reference = P1;
-ValeurCmp = CONN_17;
-IdModule  = Socket_Arduino_Micro:Socket_Strip_Arduino_1x17;
-EndCmp
-
-BeginCmp
-TimeStamp = /551FB60C;
-Reference = P2;
-ValeurCmp = CONN_17;
-IdModule  = Socket_Arduino_Micro:Socket_Strip_Arduino_1x17;
-EndCmp
-
-BeginCmp
-TimeStamp = /551FB455;
-Reference = P3;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Micro:1pin_Micro;
-EndCmp
-
-BeginCmp
-TimeStamp = /551FB4B0;
-Reference = P4;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Micro:1pin_Micro;
-EndCmp
-
-BeginCmp
-TimeStamp = /551FB4D4;
-Reference = P5;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Micro:1pin_Micro;
-EndCmp
-
-BeginCmp
-TimeStamp = /551FB516;
-Reference = P6;
-ValeurCmp = CONN_1;
-IdModule  = Socket_Arduino_Micro:1pin_Micro;
-EndCmp
-
-EndListe

template/Arduino_Micro/Arduino_Micro.pro

@@ -1,4 +1,4 @@
-update=mer. 02 mars 2016 15:02:35 CET
+update=13/12/2016 09:51:37
 version=1
 last_client=kicad
 [pcbnew]
@@ -36,25 +36,10 @@ LibName4=conn
 LibName5=linear
 LibName6=regul
 LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=microcontrollers
-LibName13=dsp
-LibName14=microchip
-LibName15=analog_switches
-LibName16=motorola
-LibName17=texas
-LibName18=intel
-LibName19=audio
-LibName20=interface
-LibName21=digital-audio
-LibName22=philips
-LibName23=display
-LibName24=cypress
-LibName25=siliconi
-LibName26=opto
-LibName27=atmel
-LibName28=contrib
-LibName29=valves
+LibName8=adc-dac
+LibName9=xilinx
+LibName10=microcontrollers
+LibName11=microchip
+LibName12=analog_switches
+LibName13=motorola
+LibName14=texas

template/Arduino_Micro/Arduino_Micro.sch

@@ -115,8 +115,8 @@ L CONN_01X17 P1
 U 1 1 56D719DF
 P 9550 2050
 F 0 "P1" H 9550 2950 50  0000 C CNN
-F 1 "Digital" V 9650 2050 50  0000 C CNN
-F 2 "Socket_Arduino_Micro:Socket_Strip_Arduino_1x17" H 9550 2050 50  0001 C CNN
+F 1 "Digital" H 9550 1150 50  0000 C CNN
+F 2 "Socket_Arduino_Micro:Socket_Strip_Arduino_1x17" V 9650 2050 30  0000 C CNN
 F 3 "" H 9550 2050 50  0000 C CNN
 	1    9550 2050
 	1    0    0    -1  
@@ -126,8 +126,8 @@ L CONN_01X17 P2
 U 1 1 56D71A21
 P 9950 2050
 F 0 "P2" H 9950 2950 50  0000 C CNN
-F 1 "Analog" V 10050 2050 50  0000 C CNN
-F 2 "Socket_Arduino_Micro:Socket_Strip_Arduino_1x17" H 9950 2050 50  0001 C CNN
+F 1 "Analog" H 9950 1150 50  0000 C CNN
+F 2 "Socket_Arduino_Micro:Socket_Strip_Arduino_1x17" V 10050 2050 30  0000 C CNN
 F 3 "" H 9950 2050 50  0000 C CNN
 	1    9950 2050
 	-1   0    0    -1  
@@ -214,12 +214,12 @@ $EndComp
 $Comp
 L +3.3V #PWR04
 U 1 1 56D72867
-P 10450 1100
-F 0 "#PWR04" H 10450 950 50  0001 C CNN
-F 1 "+3.3V" H 10450 1240 28  0000 C CNN
-F 2 "" H 10450 1100 50  0000 C CNN
-F 3 "" H 10450 1100 50  0000 C CNN
-	1    10450 1100
+P 10450 1000
+F 0 "#PWR04" H 10450 850 50  0001 C CNN
+F 1 "+3.3V" H 10450 1140 28  0000 C CNN
+F 2 "" H 10450 1000 50  0000 C CNN
+F 3 "" H 10450 1000 50  0000 C CNN
+	1    10450 1000
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
@@ -249,7 +249,7 @@ Wire Wire Line
 Wire Wire Line
 	10250 1550 10250 3000
 Wire Wire Line
-	10450 1100 10450 2750
+	10450 1000 10450 2750
 Wire Wire Line
 	10450 2750 10150 2750
 Wire Notes Line
@@ -260,7 +260,7 @@ U 1 1 56D72ED3
 P 10800 650
 F 0 "P3" V 10900 650 50  0000 C CNN
 F 1 "CONN_01X01" H 10900 650 50  0001 C CNN
-F 2 "Socket_Arduino_Micro:1pin_Micro" H 10800 650 50  0001 C CNN
+F 2 "Socket_Arduino_Micro:1pin_Micro" H 10722 722 20  0000 C CNN
 F 3 "" H 10800 650 50  0000 C CNN
 	1    10800 650 
 	0    -1   -1   0   
@@ -271,7 +271,7 @@ U 1 1 56D72FBF
 P 10900 650
 F 0 "P4" V 11000 650 50  0000 C CNN
 F 1 "CONN_01X01" H 11000 650 50  0001 C CNN
-F 2 "Socket_Arduino_Micro:1pin_Micro" H 10900 650 50  0001 C CNN
+F 2 "Socket_Arduino_Micro:1pin_Micro" H 10900 650 20  0001 C CNN
 F 3 "" H 10900 650 50  0000 C CNN
 	1    10900 650 
 	0    -1   -1   0   
@@ -282,7 +282,7 @@ U 1 1 56D72FE7
 P 11000 650
 F 0 "P5" V 11100 650 50  0000 C CNN
 F 1 "CONN_01X01" H 11100 650 50  0001 C CNN
-F 2 "Socket_Arduino_Micro:1pin_Micro" H 11000 650 50  0001 C CNN
+F 2 "Socket_Arduino_Micro:1pin_Micro" H 11000 650 20  0001 C CNN
 F 3 "" H 11000 650 50  0000 C CNN
 	1    11000 650 
 	0    -1   -1   0   
@@ -293,7 +293,7 @@ U 1 1 56D73012
 P 11100 650
 F 0 "P6" V 11200 650 50  0000 C CNN
 F 1 "CONN_01X01" H 11200 650 50  0001 C CNN
-F 2 "Socket_Arduino_Micro:1pin_Micro" H 11100 650 50  0001 C CNN
+F 2 "Socket_Arduino_Micro:1pin_Micro" H 11019 581 20  0000 C CNN
 F 3 "" H 11100 650 50  0000 C CNN
 	1    11100 650 
 	0    -1   -1   0   

template/Arduino_Micro/fp-lib-table

@@ -0,0 +1,3 @@
+(fp_lib_table
+  (lib (name Socket_Arduino_Micro)(type KiCad)(uri "$(KIPRJMOD)\\Socket_Arduino_Micro.pretty")(options "")(descr ""))
+)

template/CMakeLists.txt

@@ -13,6 +13,7 @@ set( template_lst
     ti-stellaris-boosterpack40
     ti-stellaris-boosterpack40_min
     BeagleBone-Black-Cape
+    minnowboard-ls-lure
     )
 
 

template/minnowboard-ls-lure/meta/info.html

@@ -0,0 +1,27 @@
+<!DOCTYPE HTML>
+<HTML>
+<HEAD>
+<META HTTP-EQUIV="CONTENT-TYPE" CONTENT="text/html; charset=utf-8">
+<META content="text/html">
+<TITLE>MinnowBoard MAX/Turbot LS Lure Template</TITLE>
+</HEAD>
+<BODY>
+<h1>MinnowBoard</h1>
+<h2>Max/Turbot Low Speed Lure Template</h2>
+<P>
+This project template is the basis of a low speed expansion board (lure) for the
+<A HREF="http://www.minnowboard.org/" TARGET="blank">Minnowboard MAX/Turbot</A>.
+<BR><BR>This template includes a PCB edge defined according to the Minnowboard MAX or Turbot SBC
+with the low speed connector and mounting holes placed correctly to align the two boards.
+<BR><BR>
+The board outline looks like the following:
+</P>
+<P><IMG SRC="brd.png" NAME="brd" ALIGN=BOTTOM BORDER=0>
+<BR>
+NOTE: The outlines in the Dwgs.User layer denote areas that should not contain through-hole or
+bottom side components to avoid connectors on the base board.
+<BR><BR><BR>
+</P>
+<P>Copyright (c) 2016 Michael Welling</P>
+</BODY>
+</HTML>

template/minnowboard-ls-lure/minnowboard-ls-lure-cache.lib

@@ -0,0 +1,134 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# +3V3
+#
+DEF +3V3 #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+3V3" 0 140 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+ALIAS +3.3V
+DRAW
+P 2 0 1 0  -30 50  0 100 N
+P 2 0 1 0  0 0  0 100 N
+P 2 0 1 0  0 100  30 50 N
+X +3V3 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# +5V
+#
+DEF +5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+5V" 0 140 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+DRAW
+P 2 0 1 0  -30 50  0 100 N
+P 2 0 1 0  0 0  0 100 N
+P 2 0 1 0  0 100  30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# CONN_02X13
+#
+DEF CONN_02X13 P 0 1 Y N 1 F N
+F0 "P" 0 700 50 H V C CNN
+F1 "CONN_02X13" 0 0 50 V V C CNN
+F2 "" 0 -1150 50 H V C CNN
+F3 "" 0 -1150 50 H V C CNN
+$FPLIST
+ Pin_Header_Straight_2X13
+ Pin_Header_Angled_2X13
+ Socket_Strip_Straight_2X13
+ Socket_Strip_Angled_2X13
+$ENDFPLIST
+DRAW
+S -100 -595 -50 -605 0 1 0 N
+S -100 -495 -50 -505 0 1 0 N
+S -100 -395 -50 -405 0 1 0 N
+S -100 -295 -50 -305 0 1 0 N
+S -100 -195 -50 -205 0 1 0 N
+S -100 -95 -50 -105 0 1 0 N
+S -100 5 -50 -5 0 1 0 N
+S -100 105 -50 95 0 1 0 N
+S -100 205 -50 195 0 1 0 N
+S -100 305 -50 295 0 1 0 N
+S -100 405 -50 395 0 1 0 N
+S -100 505 -50 495 0 1 0 N
+S -100 605 -50 595 0 1 0 N
+S -100 650 100 -650 0 1 0 N
+S 50 -595 100 -605 0 1 0 N
+S 50 -495 100 -505 0 1 0 N
+S 50 -395 100 -405 0 1 0 N
+S 50 -295 100 -305 0 1 0 N
+S 50 -195 100 -205 0 1 0 N
+S 50 -95 100 -105 0 1 0 N
+S 50 5 100 -5 0 1 0 N
+S 50 105 100 95 0 1 0 N
+S 50 205 100 195 0 1 0 N
+S 50 305 100 295 0 1 0 N
+S 50 405 100 395 0 1 0 N
+S 50 505 100 495 0 1 0 N
+S 50 605 100 595 0 1 0 N
+X P1 1 -250 600 150 R 50 50 1 1 P
+X P2 2 250 600 150 L 50 50 1 1 P
+X P3 3 -250 500 150 R 50 50 1 1 P
+X P4 4 250 500 150 L 50 50 1 1 P
+X P5 5 -250 400 150 R 50 50 1 1 P
+X P6 6 250 400 150 L 50 50 1 1 P
+X P7 7 -250 300 150 R 50 50 1 1 P
+X P8 8 250 300 150 L 50 50 1 1 P
+X P9 9 -250 200 150 R 50 50 1 1 P
+X P10 10 250 200 150 L 50 50 1 1 P
+X P20 20 250 -300 150 L 50 50 1 1 P
+X P11 11 -250 100 150 R 50 50 1 1 P
+X P21 21 -250 -400 150 R 50 50 1 1 P
+X P12 12 250 100 150 L 50 50 1 1 P
+X P22 22 250 -400 150 L 50 50 1 1 P
+X P13 13 -250 0 150 R 50 50 1 1 P
+X P23 23 -250 -500 150 R 50 50 1 1 P
+X P14 14 250 0 150 L 50 50 1 1 P
+X P24 24 250 -500 150 L 50 50 1 1 P
+X P15 15 -250 -100 150 R 50 50 1 1 P
+X P25 25 -250 -600 150 R 50 50 1 1 P
+X P16 16 250 -100 150 L 50 50 1 1 P
+X P26 26 250 -600 150 L 50 50 1 1 P
+X P17 17 -250 -200 150 R 50 50 1 1 P
+X P18 18 250 -200 150 L 50 50 1 1 P
+X P19 19 -250 -300 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+DRAW
+P 6 0 1 0  0 0  0 -50  50 -50  0 -100  -50 -50  0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# Mounting_Hole
+#
+DEF Mounting_Hole MK 0 40 Y Y 1 F N
+F0 "MK" 0 200 50 H V C CNN
+F1 "Mounting_Hole" 0 125 50 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+$FPLIST
+ Mounting?Hole*
+ Hole*
+$ENDFPLIST
+DRAW
+C 0 0 50 0 1 50 N
+ENDDRAW
+ENDDEF
+#
+#End Library

template/minnowboard-ls-lure/minnowboard-ls-lure.kicad_pcb

@@ -0,0 +1,321 @@
+(kicad_pcb (version 20160815) (host pcbnew no-vcs-found-7409~56~ubuntu16.10.1)
+
+  (general
+    (links 1)
+    (no_connects 1)
+    (area 38.235286 69.47162 197.449762 147.28)
+    (thickness 1.6)
+    (drawings 20)
+    (tracks 0)
+    (zones 0)
+    (modules 5)
+    (nets 26)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
+    (trace_clearance 0.2)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (segment_width 0.2)
+    (edge_width 0.2)
+    (via_size 0.6)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 3.302 3.302)
+    (pad_drill 3.302)
+    (pad_to_mask_clearance 0.0762)
+    (aux_axis_origin 96.52 144.78)
+    (grid_origin 96.52 144.78)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x000fc_80000001)
+      (usegerberextensions false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+  (net 1 GND)
+  (net 2 +5V)
+  (net 3 +3V3)
+  (net 4 GPIO_SPI_CS#)
+  (net 5 GPIO_UART1_TXD)
+  (net 6 GPIO_SPI_MISO)
+  (net 7 GPIO_UART1_RXD)
+  (net 8 GPIO_SPI_MOSI)
+  (net 9 GPIO_UART1_CTS)
+  (net 10 GPIO_SPI_CLK)
+  (net 11 GPIO_UART1_RTS)
+  (net 12 GPIO_I2C_SCL)
+  (net 13 GPIO_I2S_CLK)
+  (net 14 GPIO_I2C_SDA)
+  (net 15 GPIO_I2S_FRM)
+  (net 16 GPIO_UART2_TXD)
+  (net 17 GPIO_I2S_DO)
+  (net 18 GPIO_UART2_RXD)
+  (net 19 GPIO_I2S_DI)
+  (net 20 GPIO_S5_0)
+  (net 21 GPIO_PWM0)
+  (net 22 GPIO_S5_1)
+  (net 23 GPIO_PWM1)
+  (net 24 GPIO_S5_2)
+  (net 25 I2SMCLK_GPIO)
+
+  (net_class Default "This is the default net class."
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 0.6)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (diff_pair_gap 0.25)
+    (diff_pair_width 0.2)
+    (add_net +3V3)
+    (add_net +5V)
+    (add_net GND)
+    (add_net GPIO_I2C_SCL)
+    (add_net GPIO_I2C_SDA)
+    (add_net GPIO_I2S_CLK)
+    (add_net GPIO_I2S_DI)
+    (add_net GPIO_I2S_DO)
+    (add_net GPIO_I2S_FRM)
+    (add_net GPIO_PWM0)
+    (add_net GPIO_PWM1)
+    (add_net GPIO_S5_0)
+    (add_net GPIO_S5_1)
+    (add_net GPIO_S5_2)
+    (add_net GPIO_SPI_CLK)
+    (add_net GPIO_SPI_CS#)
+    (add_net GPIO_SPI_MISO)
+    (add_net GPIO_SPI_MOSI)
+    (add_net GPIO_UART1_CTS)
+    (add_net GPIO_UART1_RTS)
+    (add_net GPIO_UART1_RXD)
+    (add_net GPIO_UART1_TXD)
+    (add_net GPIO_UART2_RXD)
+    (add_net GPIO_UART2_TXD)
+    (add_net I2SMCLK_GPIO)
+  )
+
+  (module Pin_Headers:Pin_Header_Straight_2x13 locked (layer F.Cu) (tedit 577F1E14) (tstamp 57710C62)
+    (at 109.855 142.24 90)
+    (descr "Through hole pin header")
+    (tags "pin header")
+    (path /576C994F)
+    (fp_text reference P1 (at 1.27 -3.175 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CONN_02X13 (at 5.08 3.175 180) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -1.75 -1.75) (end -1.75 32.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.3 -1.75) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.75 32.25) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.81 -1.27) (end 3.81 31.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.27 1.27) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start 3.81 31.75) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
+    (pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 1 GND))
+    (pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 1 GND))
+    (pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 2 +5V))
+    (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 3 +3V3))
+    (pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 4 GPIO_SPI_CS#))
+    (pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 5 GPIO_UART1_TXD))
+    (pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 6 GPIO_SPI_MISO))
+    (pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 7 GPIO_UART1_RXD))
+    (pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 8 GPIO_SPI_MOSI))
+    (pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 9 GPIO_UART1_CTS))
+    (pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 10 GPIO_SPI_CLK))
+    (pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 11 GPIO_UART1_RTS))
+    (pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 12 GPIO_I2C_SCL))
+    (pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 13 GPIO_I2S_CLK))
+    (pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 14 GPIO_I2C_SDA))
+    (pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 15 GPIO_I2S_FRM))
+    (pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 16 GPIO_UART2_TXD))
+    (pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 17 GPIO_I2S_DO))
+    (pad 19 thru_hole oval (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 18 GPIO_UART2_RXD))
+    (pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 19 GPIO_I2S_DI))
+    (pad 21 thru_hole oval (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 20 GPIO_S5_0))
+    (pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 21 GPIO_PWM0))
+    (pad 23 thru_hole oval (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 22 GPIO_S5_1))
+    (pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 23 GPIO_PWM1))
+    (pad 25 thru_hole oval (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 24 GPIO_S5_2))
+    (pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 25 I2SMCLK_GPIO))
+    (model Pin_Headers.3dshapes/Pin_Header_Straight_2x13.wrl
+      (at (xyz 0.05 -0.6 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
+    )
+  )
+
+  (module Mounting_Holes:MountingHole_3-5mm locked (layer F.Cu) (tedit 58633422) (tstamp 577DA462)
+    (at 191.77 140.97)
+    (descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
+    (tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
+    (path /58633372)
+    (fp_text reference MK2 (at 0 -4.50088) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Mounting_Hole (at 0 5.00126) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 3.5 0) (layer Cmts.User) (width 0.381))
+    (pad 1 thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers))
+  )
+
+  (module Mounting_Holes:MountingHole_3-5mm locked (layer F.Cu) (tedit 58633418) (tstamp 577F1CAE)
+    (at 100.33 140.97)
+    (descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
+    (tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
+    (path /58633409)
+    (fp_text reference MK1 (at 0 -4.50088) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Mounting_Hole (at 0 5.00126) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 3.5 0) (layer Cmts.User) (width 0.381))
+    (pad 1 thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers))
+  )
+
+  (module Mounting_Holes:MountingHole_3-5mm locked (layer F.Cu) (tedit 58633440) (tstamp 577F1CB9)
+    (at 100.33 74.93)
+    (descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
+    (tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
+    (path /5863348E)
+    (fp_text reference MK4 (at 0 -4.50088) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Mounting_Hole (at 0 5.00126) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 3.5 0) (layer Cmts.User) (width 0.381))
+    (pad 1 thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers))
+  )
+
+  (module Mounting_Holes:MountingHole_3-5mm locked (layer F.Cu) (tedit 58633432) (tstamp 577F1CC4)
+    (at 191.77 74.93)
+    (descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
+    (tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
+    (path /58633454)
+    (fp_text reference MK3 (at 0 -4.50088) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Mounting_Hole (at 0 5.00126) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 3.5 0) (layer Cmts.User) (width 0.381))
+    (pad 1 thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers))
+  )
+
+  (gr_line (start 96.52 110.15) (end 96.52 144.78) (layer Edge.Cuts) (width 0.2))
+  (gr_line (start 195.58 96.83) (end 195.58 71.12) (angle 90) (layer Edge.Cuts) (width 0.15) (tstamp 586C5EA2))
+  (gr_text "NOTE: NO BOTTOM SIDE OR THROUGH-HOLE\nCOMPONENTS IN THE AREAS DESIGNATED IN THE\nDWGS.USER LAYER TO AVOID COLLISION WITH\nMINNOWBOARD ETHERNET AND USB CONNECTORS." (at 66.421 101.092) (layer Cmts.User)
+    (effects (font (size 1.5 1.5) (thickness 0.3)))
+  )
+  (gr_line (start 178.86 112.02) (end 195.58 96.83) (angle 90) (layer Dwgs.User) (width 0.2))
+  (gr_line (start 178.86 96.83) (end 195.58 112.02) (angle 90) (layer Dwgs.User) (width 0.2))
+  (gr_line (start 114.96 92.05) (end 96.52 110.15) (angle 90) (layer Dwgs.User) (width 0.2))
+  (gr_line (start 96.52 92.05) (end 114.96 110.15) (angle 90) (layer Dwgs.User) (width 0.2))
+  (gr_line (start 96.52 110.15) (end 96.52 92.05) (angle 90) (layer Edge.Cuts) (width 0.2))
+  (gr_line (start 114.96 110.15) (end 96.52 110.15) (angle 90) (layer Dwgs.User) (width 0.2))
+  (gr_line (start 114.96 92.05) (end 114.96 110.15) (angle 90) (layer Dwgs.User) (width 0.2))
+  (gr_line (start 96.52 92.05) (end 114.96 92.05) (angle 90) (layer Dwgs.User) (width 0.2))
+  (gr_line (start 178.86 112.02) (end 178.86 96.83) (angle 90) (layer Dwgs.User) (width 0.15))
+  (gr_line (start 195.58 112.02) (end 178.86 112.02) (angle 90) (layer Dwgs.User) (width 0.15))
+  (gr_line (start 195.58 96.83) (end 195.58 112.02) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 178.86 96.83) (end 195.58 96.83) (angle 90) (layer Dwgs.User) (width 0.15))
+  (target plus (at 96.52 144.78) (size 5) (width 0.15) (layer Edge.Cuts))
+  (gr_line (start 96.52 71.12) (end 96.52 92.05) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 195.58 71.12) (end 96.52 71.12) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 195.58 144.78) (end 195.58 112.02) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 96.52 144.78) (end 195.58 144.78) (angle 90) (layer Edge.Cuts) (width 0.15))
+
+)

template/minnowboard-ls-lure/minnowboard-ls-lure.net

@@ -0,0 +1,150 @@
+(export (version D)
+  (design
+    (source /home/michael/projects/kicad/kicad-library/template/minnowboard-ls-lure/minnowboard-ls-lure.sch)
+    (date "Tue 27 Dec 2016 09:39:31 PM CST")
+    (tool "Eeschema (2015-08-07 BZR 6071, Git 6018bb6)-product")
+    (sheet (number 1) (name /) (tstamps /)
+      (title_block
+        (title)
+        (company)
+        (rev)
+        (date)
+        (source minnowboard-ls-lure.sch)
+        (comment (number 1) (value ""))
+        (comment (number 2) (value ""))
+        (comment (number 3) (value ""))
+        (comment (number 4) (value "")))))
+  (components
+    (comp (ref P1)
+      (value CONN_02X13)
+      (footprint Pin_Headers:Pin_Header_Straight_2x13)
+      (libsource (lib conn) (part CONN_02X13))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 576C994F))
+    (comp (ref MK2)
+      (value Mounting_Hole)
+      (footprint Mounting_Holes:MountingHole_3-5mm)
+      (libsource (lib mechanical) (part Mounting_Hole))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 58633372))
+    (comp (ref MK1)
+      (value Mounting_Hole)
+      (footprint Mounting_Holes:MountingHole_3-5mm)
+      (libsource (lib mechanical) (part Mounting_Hole))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 58633409))
+    (comp (ref MK3)
+      (value Mounting_Hole)
+      (footprint Mounting_Holes:MountingHole_3-5mm)
+      (libsource (lib mechanical) (part Mounting_Hole))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 58633454))
+    (comp (ref MK4)
+      (value Mounting_Hole)
+      (footprint Mounting_Holes:MountingHole_3-5mm)
+      (libsource (lib mechanical) (part Mounting_Hole))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5863348E)))
+  (libparts
+    (libpart (lib mechanical) (part Mounting_Hole)
+      (description "Mounting Hole without connection")
+      (footprints
+        (fp Mounting?Hole*)
+        (fp Hole*))
+      (fields
+        (field (name Reference) MK)
+        (field (name Value) Mounting_Hole)))
+    (libpart (lib conn) (part CONN_02X13)
+      (description "Connector, double row, 02x13")
+      (footprints
+        (fp Pin_Header_Straight_2X13)
+        (fp Pin_Header_Angled_2X13)
+        (fp Socket_Strip_Straight_2X13)
+        (fp Socket_Strip_Angled_2X13))
+      (fields
+        (field (name Reference) P)
+        (field (name Value) CONN_02X13))
+      (pins
+        (pin (num 1) (name P1) (type passive))
+        (pin (num 2) (name P2) (type passive))
+        (pin (num 3) (name P3) (type passive))
+        (pin (num 4) (name P4) (type passive))
+        (pin (num 5) (name P5) (type passive))
+        (pin (num 6) (name P6) (type passive))
+        (pin (num 7) (name P7) (type passive))
+        (pin (num 8) (name P8) (type passive))
+        (pin (num 9) (name P9) (type passive))
+        (pin (num 10) (name P10) (type passive))
+        (pin (num 11) (name P11) (type passive))
+        (pin (num 12) (name P12) (type passive))
+        (pin (num 13) (name P13) (type passive))
+        (pin (num 14) (name P14) (type passive))
+        (pin (num 15) (name P15) (type passive))
+        (pin (num 16) (name P16) (type passive))
+        (pin (num 17) (name P17) (type passive))
+        (pin (num 18) (name P18) (type passive))
+        (pin (num 19) (name P19) (type passive))
+        (pin (num 20) (name P20) (type passive))
+        (pin (num 21) (name P21) (type passive))
+        (pin (num 22) (name P22) (type passive))
+        (pin (num 23) (name P23) (type passive))
+        (pin (num 24) (name P24) (type passive))
+        (pin (num 25) (name P25) (type passive))
+        (pin (num 26) (name P26) (type passive)))))
+  (libraries
+    (library (logical mechanical)
+      (uri /usr/local/share/kicad/library/mechanical.lib))
+    (library (logical conn)
+      (uri /usr/local/share/kicad/library/conn.lib)))
+  (nets
+    (net (code 1) (name GPIO_PWM1)
+      (node (ref P1) (pin 24)))
+    (net (code 2) (name GPIO_S5_0)
+      (node (ref P1) (pin 21)))
+    (net (code 3) (name GPIO_UART2_RXD)
+      (node (ref P1) (pin 19)))
+    (net (code 4) (name GPIO_UART2_TXD)
+      (node (ref P1) (pin 17)))
+    (net (code 5) (name GPIO_I2C_SDA)
+      (node (ref P1) (pin 15)))
+    (net (code 6) (name GPIO_I2C_SCL)
+      (node (ref P1) (pin 13)))
+    (net (code 7) (name GPIO_SPI_CLK)
+      (node (ref P1) (pin 11)))
+    (net (code 8) (name GPIO_SPI_MOSI)
+      (node (ref P1) (pin 9)))
+    (net (code 9) (name GPIO_SPI_MISO)
+      (node (ref P1) (pin 7)))
+    (net (code 10) (name GPIO_SPI_CS#)
+      (node (ref P1) (pin 5)))
+    (net (code 11) (name I2SMCLK_GPIO)
+      (node (ref P1) (pin 26)))
+    (net (code 12) (name GPIO_S5_1)
+      (node (ref P1) (pin 23)))
+    (net (code 13) (name GPIO_PWM0)
+      (node (ref P1) (pin 22)))
+    (net (code 14) (name GPIO_I2S_DI)
+      (node (ref P1) (pin 20)))
+    (net (code 15) (name GPIO_I2S_DO)
+      (node (ref P1) (pin 18)))
+    (net (code 16) (name GPIO_I2S_FRM)
+      (node (ref P1) (pin 16)))
+    (net (code 17) (name GPIO_I2S_CLK)
+      (node (ref P1) (pin 14)))
+    (net (code 18) (name GPIO_UART1_RTS)
+      (node (ref P1) (pin 12)))
+    (net (code 19) (name GPIO_UART1_CTS)
+      (node (ref P1) (pin 10)))
+    (net (code 20) (name GPIO_UART1_RXD)
+      (node (ref P1) (pin 8)))
+    (net (code 21) (name GPIO_UART1_TXD)
+      (node (ref P1) (pin 6)))
+    (net (code 22) (name GPIO_S5_2)
+      (node (ref P1) (pin 25)))
+    (net (code 23) (name +5V)
+      (node (ref P1) (pin 3)))
+    (net (code 24) (name GND)
+      (node (ref P1) (pin 1))
+      (node (ref P1) (pin 2)))
+    (net (code 25) (name +3V3)
+      (node (ref P1) (pin 4)))))

template/minnowboard-ls-lure/minnowboard-ls-lure.pro

@@ -0,0 +1,61 @@
+update=Tue 27 Dec 2016 09:36:51 PM CST
+version=1
+last_client=kicad
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[general]
+version=1
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=microcontrollers
+LibName13=dsp
+LibName14=microchip
+LibName15=analog_switches
+LibName16=motorola
+LibName17=texas
+LibName18=intel
+LibName19=audio
+LibName20=interface
+LibName21=digital-audio
+LibName22=philips
+LibName23=display
+LibName24=cypress
+LibName25=siliconi
+LibName26=opto
+LibName27=atmel
+LibName28=contrib
+LibName29=valves
+LibName30=mechanical

template/minnowboard-ls-lure/minnowboard-ls-lure.sch

@@ -0,0 +1,250 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:mechanical
+LIBS:minnowboard-ls-lure-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L CONN_02X13 P1
+U 1 1 576C994F
+P 2600 2350
+F 0 "P1" H 2600 3050 50  0000 C CNN
+F 1 "CONN_02X13" V 2600 2350 50  0000 C CNN
+F 2 "Pin_Headers:Pin_Header_Straight_2x13" H 2600 1200 50  0001 C CNN
+F 3 "" H 2600 1200 50  0000 C CNN
+	1    2600 2350
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR3
+U 1 1 576DC243
+P 2950 3000
+F 0 "#PWR3" H 2950 2750 50  0001 C CNN
+F 1 "GND" H 2950 2850 50  0000 C CNN
+F 2 "" H 2950 3000 50  0000 C CNN
+F 3 "" H 2950 3000 50  0000 C CNN
+	1    2950 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR2
+U 1 1 576DC271
+P 2250 3000
+F 0 "#PWR2" H 2250 2750 50  0001 C CNN
+F 1 "GND" H 2250 2850 50  0000 C CNN
+F 2 "" H 2250 3000 50  0000 C CNN
+F 3 "" H 2250 3000 50  0000 C CNN
+	1    2250 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L +3.3V #PWR4
+U 1 1 576DC2D3
+P 3050 1650
+F 0 "#PWR4" H 3050 1500 50  0001 C CNN
+F 1 "+3.3V" H 3050 1790 50  0000 C CNN
+F 2 "" H 3050 1650 50  0000 C CNN
+F 3 "" H 3050 1650 50  0000 C CNN
+	1    3050 1650
+	1    0    0    -1  
+$EndComp
+$Comp
+L +5V #PWR1
+U 1 1 576DC2E9
+P 2150 1650
+F 0 "#PWR1" H 2150 1500 50  0001 C CNN
+F 1 "+5V" H 2150 1790 50  0000 C CNN
+F 2 "" H 2150 1650 50  0000 C CNN
+F 3 "" H 2150 1650 50  0000 C CNN
+	1    2150 1650
+	1    0    0    -1  
+$EndComp
+Text GLabel 2100 1950 0    45   BiDi ~ 0
+GPIO_SPI_CS#
+Text GLabel 2100 2050 0    45   BiDi ~ 0
+GPIO_SPI_MISO
+Text GLabel 2100 2150 0    45   BiDi ~ 0
+GPIO_SPI_MOSI
+Text GLabel 2100 2250 0    45   BiDi ~ 0
+GPIO_SPI_CLK
+Text GLabel 2100 2350 0    45   BiDi ~ 0
+GPIO_I2C_SCL
+Text GLabel 2100 2450 0    45   BiDi ~ 0
+GPIO_I2C_SDA
+Text GLabel 2100 2550 0    45   BiDi ~ 0
+GPIO_UART2_TXD
+Text GLabel 2100 2650 0    45   BiDi ~ 0
+GPIO_UART2_RXD
+Text GLabel 2100 2750 0    45   BiDi ~ 0
+GPIO_S5_0
+Text GLabel 2100 2850 0    45   BiDi ~ 0
+GPIO_S5_1
+Text GLabel 2100 2950 0    45   BiDi ~ 0
+GPIO_S5_2
+Text GLabel 3075 1950 2    45   BiDi ~ 0
+GPIO_UART1_TXD
+Text GLabel 3075 2050 2    45   Input ~ 0
+GPIO_UART1_RXD
+Text GLabel 3075 2150 2    45   BiDi ~ 0
+GPIO_UART1_CTS
+Text GLabel 3075 2250 2    45   BiDi ~ 0
+GPIO_UART1_RTS
+Text GLabel 3075 2350 2    45   BiDi ~ 0
+GPIO_I2S_CLK
+Text GLabel 3075 2450 2    45   BiDi ~ 0
+GPIO_I2S_FRM
+Text GLabel 3075 2550 2    45   BiDi ~ 0
+GPIO_I2S_DO
+Text GLabel 3075 2650 2    45   BiDi ~ 0
+GPIO_I2S_DI
+Text GLabel 3075 2750 2    45   BiDi ~ 0
+GPIO_PWM0
+Text GLabel 3075 2850 2    45   BiDi ~ 0
+GPIO_PWM1
+Text GLabel 3075 2950 2    45   BiDi ~ 0
+I2SMCLK_GPIO
+Wire Wire Line
+	2100 1950 2350 1950
+Wire Wire Line
+	2100 2050 2350 2050
+Wire Wire Line
+	2100 2150 2350 2150
+Wire Wire Line
+	2100 2250 2350 2250
+Wire Wire Line
+	2100 2350 2350 2350
+Wire Wire Line
+	2100 2450 2350 2450
+Wire Wire Line
+	2100 2550 2350 2550
+Wire Wire Line
+	2100 2650 2350 2650
+Wire Wire Line
+	2100 2750 2350 2750
+Wire Wire Line
+	2100 2850 2350 2850
+Wire Wire Line
+	2100 2950 2350 2950
+Wire Wire Line
+	2850 1950 3075 1950
+Wire Wire Line
+	2850 2050 3075 2050
+Wire Wire Line
+	2850 2150 3075 2150
+Wire Wire Line
+	2850 2250 3075 2250
+Wire Wire Line
+	2850 2350 3075 2350
+Wire Wire Line
+	2850 2450 3075 2450
+Wire Wire Line
+	2850 2550 3075 2550
+Wire Wire Line
+	2850 2650 3075 2650
+Wire Wire Line
+	2850 2750 3075 2750
+Wire Wire Line
+	2850 2850 3075 2850
+Wire Wire Line
+	2850 2950 3075 2950
+Wire Wire Line
+	2850 1750 2950 1750
+Wire Wire Line
+	2950 1750 2950 3000
+Wire Wire Line
+	3050 1850 3050 1650
+Wire Wire Line
+	2850 1850 3050 1850
+Wire Wire Line
+	2350 1750 2250 1750
+Wire Wire Line
+	2250 1750 2250 3000
+Wire Wire Line
+	2150 1650 2150 1850
+Wire Wire Line
+	2150 1850 2350 1850
+$Comp
+L Mounting_Hole MK2
+U 1 1 58633372
+P 5350 7500
+F 0 "MK2" H 5350 7700 50  0000 C CNN
+F 1 "Mounting_Hole" H 5350 7625 50  0000 C CNN
+F 2 "Mounting_Holes:MountingHole_3-5mm" H 5350 7500 60  0001 C CNN
+F 3 "" H 5350 7500 60  0001 C CNN
+	1    5350 7500
+	1    0    0    -1  
+$EndComp
+$Comp
+L Mounting_Hole MK1
+U 1 1 58633409
+P 4750 7500
+F 0 "MK1" H 4750 7700 50  0000 C CNN
+F 1 "Mounting_Hole" H 4750 7625 50  0000 C CNN
+F 2 "Mounting_Holes:MountingHole_3-5mm" H 4750 7500 60  0001 C CNN
+F 3 "" H 4750 7500 60  0001 C CNN
+	1    4750 7500
+	1    0    0    -1  
+$EndComp
+$Comp
+L Mounting_Hole MK3
+U 1 1 58633454
+P 5950 7500
+F 0 "MK3" H 5950 7700 50  0000 C CNN
+F 1 "Mounting_Hole" H 5950 7625 50  0000 C CNN
+F 2 "Mounting_Holes:MountingHole_3-5mm" H 5950 7500 60  0001 C CNN
+F 3 "" H 5950 7500 60  0001 C CNN
+	1    5950 7500
+	1    0    0    -1  
+$EndComp
+$Comp
+L Mounting_Hole MK4
+U 1 1 5863348E
+P 6550 7500
+F 0 "MK4" H 6550 7700 50  0000 C CNN
+F 1 "Mounting_Hole" H 6550 7625 50  0000 C CNN
+F 2 "Mounting_Holes:MountingHole_3-5mm" H 6550 7500 60  0001 C CNN
+F 3 "" H 6550 7500 60  0001 C CNN
+	1    6550 7500
+	1    0    0    -1  
+$EndComp
+$EndSCHEMATC

template/raspberrypi-gpio/raspberrypi-gpio-cache.lib

@@ -1,28 +1,34 @@
-EESchema-LIBRARY Version 2.3  Date: 15/11/2012 21:22:43
+EESchema-LIBRARY Version 2.3
 #encoding utf-8
 #
-# +3.3V
+# +3V3
 #
-DEF +3.3V #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -40 30 H I C CNN
-F1 "+3.3V" 0 110 30 H V C CNN
-ALIAS +3,3V
+DEF +3V3 #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+3V3" 0 140 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+ALIAS +3.3V
 DRAW
-X +3.3V 1 0 0 0 U 30 30 0 0 W N
-C 0 60 20 0 1 0 N
-P 3 0 1 0  0 0  0 40  0 40 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +3V3 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #
 # +5V
 #
-DEF +5V #PWR 0 40 Y Y 1 F P
-F0 "#PWR" 0 90 20 H I C CNN
-F1 "+5V" 0 90 30 H V C CNN
+DEF +5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+5V" 0 140 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
 DRAW
-X +5V 1 0 0 0 U 20 20 0 0 W N
-C 0 50 20 0 1 0 N
-P 4 0 1 0  0 0  0 30  0 30  0 30 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #
@@ -31,6 +37,8 @@ ENDDEF
 DEF CONN_13X2 P 0 10 Y N 1 F N
 F0 "P" 0 700 60 H V C CNN
 F1 "CONN_13X2" 0 0 50 V V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
 DRAW
 S -100 650 100 -650 0 1 0 N
 X P1 1 -400 600 300 R 40 30 1 1 P I
@@ -64,12 +72,14 @@ ENDDEF
 #
 # GND
 #
-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
 DRAW
-P 4 0 1 0  -50 0  0 -50  50 0  -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #

template/raspberrypi-gpio/raspberrypi-gpio.cmp

@@ -1,10 +0,0 @@
-Cmp-Mod V01 Created by CvPcb (2012-11-15 BZR 3804)-testing date = 15/11/2012 21:23:25
-
-BeginCmp
-TimeStamp = /50A55ABA;
-Reference = P1;
-ValeurCmp = CONN_13X2;
-IdModule  = pin_array_13x2;
-EndCmp
-
-EndListe

template/raspberrypi-gpio/raspberrypi-gpio.kicad_pcb

@@ -1,15 +1,15 @@
-(kicad_pcb (version 3) (host pcbnew "(2012-11-30 BZR 3829)-testing")
+(kicad_pcb (version 4) (host pcbnew 4.0.5)
 
   (general
     (links 0)
     (no_connects 0)
-    (area 127.606667 112.000001 242.964763 190.8)
+    (area 143.424999 124.924999 228.575001 181.075001)
     (thickness 1.6)
     (drawings 41)
     (tracks 0)
     (zones 0)
     (modules 1)
-    (nets 4)
+    (nets 27)
   )
 
   (page A3)
@@ -18,21 +18,21 @@
   )
 
   (layers
-    (15 F.Cu signal)
-    (0 B.Cu signal)
-    (16 B.Adhes user)
-    (17 F.Adhes user)
-    (18 B.Paste user)
-    (19 F.Paste user)
-    (20 B.SilkS user)
-    (21 F.SilkS user)
-    (22 B.Mask user)
-    (23 F.Mask user)
-    (24 Dwgs.User user)
-    (25 Cmts.User user)
-    (26 Eco1.User user)
-    (27 Eco2.User user)
-    (28 Edge.Cuts user)
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
   )
 
   (setup
@@ -63,10 +63,10 @@
     (aux_axis_origin 143.5 181)
     (visible_elements 7FFFFFFF)
     (pcbplotparams
-      (layerselection 3178497)
+      (layerselection 0x00030_80000001)
       (usegerberextensions true)
       (excludeedgelayer true)
-      (linewidth 152400)
+      (linewidth 0.150000)
       (plotframeref false)
       (viasonmask false)
       (mode 1)
@@ -79,7 +79,6 @@
       (psa4output false)
       (plotreference true)
       (plotvalue true)
-      (plotothertext true)
       (plotinvisibletext false)
       (padsonsilk false)
       (subtractmaskfromsilk false)
@@ -91,9 +90,32 @@
   )
 
   (net 0 "")
-  (net 1 +3.3V)
-  (net 2 +5V)
-  (net 3 GND)
+  (net 1 +5V)
+  (net 2 GND)
+  (net 3 +3V3)
+  (net 4 "/GPIO0(SDA)")
+  (net 5 "Net-(P1-Pad4)")
+  (net 6 "/GPIO1(SCL)")
+  (net 7 /GPIO4)
+  (net 8 /TXD)
+  (net 9 "Net-(P1-Pad9)")
+  (net 10 /RXD)
+  (net 11 /GPIO17)
+  (net 12 /GPIO18)
+  (net 13 /GPIO21)
+  (net 14 "Net-(P1-Pad14)")
+  (net 15 /GPIO22)
+  (net 16 /GPIO23)
+  (net 17 "Net-(P1-Pad17)")
+  (net 18 /GPIO24)
+  (net 19 "/GPIO10(MOSI)")
+  (net 20 "Net-(P1-Pad20)")
+  (net 21 "/GPIO9(MISO)")
+  (net 22 /GPIO25)
+  (net 23 "/GPIO11(SCLK)")
+  (net 24 "/GPIO8(CE0)")
+  (net 25 "Net-(P1-Pad25)")
+  (net 26 "/GPIO7(CE1)")
 
   (net_class Default "This is the default net class."
     (clearance 0.2)
@@ -102,10 +124,32 @@
     (via_drill 0.6)
     (uvia_dia 0.5)
     (uvia_drill 0.1)
-    (add_net "")
-    (add_net +3.3V)
+    (add_net +3V3)
     (add_net +5V)
+    (add_net "/GPIO0(SDA)")
+    (add_net "/GPIO1(SCL)")
+    (add_net "/GPIO10(MOSI)")
+    (add_net "/GPIO11(SCLK)")
+    (add_net /GPIO17)
+    (add_net /GPIO18)
+    (add_net /GPIO21)
+    (add_net /GPIO22)
+    (add_net /GPIO23)
+    (add_net /GPIO24)
+    (add_net /GPIO25)
+    (add_net /GPIO4)
+    (add_net "/GPIO7(CE1)")
+    (add_net "/GPIO8(CE0)")
+    (add_net "/GPIO9(MISO)")
+    (add_net /RXD)
+    (add_net /TXD)
     (add_net GND)
+    (add_net "Net-(P1-Pad14)")
+    (add_net "Net-(P1-Pad17)")
+    (add_net "Net-(P1-Pad20)")
+    (add_net "Net-(P1-Pad25)")
+    (add_net "Net-(P1-Pad4)")
+    (add_net "Net-(P1-Pad9)")
   )
 
   (net_class Power ""
@@ -117,106 +161,85 @@
     (uvia_drill 0.1)
   )
 
-  (module pin_array_13x2 (layer F.Cu) (tedit 50A55E7A) (tstamp 50A55DA3)
-    (at 161 129)
-    (descr "Double rangee de contacts 2 x 12 pins")
-    (tags CONN)
+  (module Pin_Headers:Pin_Header_Straight_2x13 locked (layer F.Cu) (tedit 584FB37B) (tstamp 584FB325)
+    (at 145.75536 130.27914 90)
+    (descr "Through hole pin header")
+    (tags "pin header")
     (path /50A55ABA)
-    (fp_text reference P1 (at -15.5 4) (layer F.SilkS)
-      (effects (font (size 1.016 1.016) (thickness 0.2032)))
+    (fp_text reference P1 (at 1.5875 32.6136 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value CONN_13X2 (at 12 4) (layer F.SilkS)
-      (effects (font (size 1.016 1.016) (thickness 0.2032)))
+    (fp_text value CONN_13X2 (at -2.37998 16.29664 180) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_line (start -16.51 2.54) (end 16.51 2.54) (layer F.SilkS) (width 0.2032))
-    (fp_line (start 16.51 -2.54) (end -16.51 -2.54) (layer F.SilkS) (width 0.2032))
-    (fp_line (start -16.51 -2.54) (end -16.51 2.54) (layer F.SilkS) (width 0.2032))
-    (fp_line (start 16.51 2.54) (end 16.51 -2.54) (layer F.SilkS) (width 0.2032))
-    (pad 1 thru_hole rect (at -15.24 1.27) (size 1.524 1.524) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 1 +3.3V)
-    )
-    (pad 2 thru_hole circle (at -15.24 -1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 2 +5V)
-    )
-    (pad 3 thru_hole circle (at -12.7 1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 4 thru_hole circle (at -12.7 -1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 5 thru_hole circle (at -10.16 1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 6 thru_hole circle (at -10.16 -1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 3 GND)
-    )
-    (pad 7 thru_hole circle (at -7.62 1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 8 thru_hole circle (at -7.62 -1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 9 thru_hole circle (at -5.08 1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 10 thru_hole circle (at -5.08 -1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 11 thru_hole circle (at -2.54 1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 12 thru_hole circle (at -2.54 -1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 13 thru_hole circle (at 0 1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 14 thru_hole circle (at 0 -1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 15 thru_hole circle (at 2.54 1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 16 thru_hole circle (at 2.54 -1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 17 thru_hole circle (at 5.08 1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 18 thru_hole circle (at 5.08 -1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 19 thru_hole circle (at 7.62 1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 20 thru_hole circle (at 7.62 -1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 21 thru_hole circle (at 10.16 1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 22 thru_hole circle (at 10.16 -1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 23 thru_hole circle (at 12.7 1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 24 thru_hole circle (at 12.7 -1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 25 thru_hole circle (at 15.24 1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 26 thru_hole circle (at 15.24 -1.27) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (model pin_array/pins_array_13x2.wrl
-      (at (xyz 0 0 0))
+    (fp_line (start -1.75 -1.75) (end -1.75 32.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.3 -1.75) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.75 32.25) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.81 -1.27) (end 3.81 31.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.27 1.27) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start 3.81 31.75) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
+    (pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 3 +3V3))
+    (pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 1 +5V))
+    (pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 4 "/GPIO0(SDA)"))
+    (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 5 "Net-(P1-Pad4)"))
+    (pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 6 "/GPIO1(SCL)"))
+    (pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 2 GND))
+    (pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 7 /GPIO4))
+    (pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 8 /TXD))
+    (pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 9 "Net-(P1-Pad9)"))
+    (pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 10 /RXD))
+    (pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 11 /GPIO17))
+    (pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 12 /GPIO18))
+    (pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 13 /GPIO21))
+    (pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 14 "Net-(P1-Pad14)"))
+    (pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 15 /GPIO22))
+    (pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 16 /GPIO23))
+    (pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 17 "Net-(P1-Pad17)"))
+    (pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 18 /GPIO24))
+    (pad 19 thru_hole oval (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 19 "/GPIO10(MOSI)"))
+    (pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 20 "Net-(P1-Pad20)"))
+    (pad 21 thru_hole oval (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 21 "/GPIO9(MISO)"))
+    (pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 22 /GPIO25))
+    (pad 23 thru_hole oval (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 23 "/GPIO11(SCLK)"))
+    (pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 24 "/GPIO8(CE0)"))
+    (pad 25 thru_hole oval (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 25 "Net-(P1-Pad25)"))
+    (pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 26 "/GPIO7(CE1)"))
+    (model Pin_Headers.3dshapes/Pin_Header_Straight_2x13.wrl
+      (at (xyz 0.05 -0.6 0))
       (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 0))
+      (rotate (xyz 0 0 90))
     )
   )
 
@@ -294,6 +317,4 @@
   (gr_line (start 143.5 181) (end 228.5 181) (angle 90) (layer Edge.Cuts) (width 0.15))
   (gr_line (start 143.5 125) (end 143.5 181) (angle 90) (layer Edge.Cuts) (width 0.15))
 
-
-
 )

template/raspberrypi-gpio/raspberrypi-gpio.net

@@ -1,35 +1,111 @@
-# EESchema Netlist Version 1.1 created  15/11/2012 21:22:35
-(
- ( /50A55ABA $noname  P1 CONN_13X2 {Lib=CONN_13X2}
-  (    1 +3.3V )
-  (    2 +5V )
-  (    3 ? )
-  (    4 ? )
-  (    5 ? )
-  (    6 GND )
-  (    7 ? )
-  (    8 ? )
-  (    9 ? )
-  (   10 ? )
-  (   11 ? )
-  (   12 ? )
-  (   13 ? )
-  (   14 ? )
-  (   15 ? )
-  (   16 ? )
-  (   17 ? )
-  (   18 ? )
-  (   19 ? )
-  (   20 ? )
-  (   21 ? )
-  (   22 ? )
-  (   23 ? )
-  (   24 ? )
-  (   25 ? )
-  (   26 ? )
- )
-)
-*
-{ Pin List by Nets
-}
-#End
+(export (version D)
+  (design
+    (source E:/kicad-git/kicad_git_libs/template/raspberrypi-gpio/raspberrypi-gpio.sch)
+    (date "13/12/2016 09:39:29")
+    (tool "Eeschema 4.0.5")
+    (sheet (number 1) (name /) (tstamps /)
+      (title_block
+        (title)
+        (company)
+        (rev)
+        (date "15 nov 2012")
+        (source raspberrypi-gpio.sch)
+        (comment (number 1) (value ""))
+        (comment (number 2) (value ""))
+        (comment (number 3) (value ""))
+        (comment (number 4) (value "")))))
+  (components
+    (comp (ref P1)
+      (value CONN_13X2)
+      (footprint Pin_Headers:Pin_Header_Straight_2x13)
+      (libsource (lib raspberrypi-gpio-cache) (part CONN_13X2))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 50A55ABA)))
+  (libparts
+    (libpart (lib raspberrypi-gpio-cache) (part CONN_13X2)
+      (fields
+        (field (name Reference) P)
+        (field (name Value) CONN_13X2))
+      (pins
+        (pin (num 1) (name P1) (type passive))
+        (pin (num 2) (name P2) (type passive))
+        (pin (num 3) (name P3) (type passive))
+        (pin (num 4) (name P4) (type passive))
+        (pin (num 5) (name P5) (type passive))
+        (pin (num 6) (name P6) (type passive))
+        (pin (num 7) (name P7) (type passive))
+        (pin (num 8) (name P8) (type passive))
+        (pin (num 9) (name P9) (type passive))
+        (pin (num 10) (name P10) (type passive))
+        (pin (num 11) (name P11) (type passive))
+        (pin (num 12) (name P12) (type passive))
+        (pin (num 13) (name P13) (type passive))
+        (pin (num 14) (name P14) (type passive))
+        (pin (num 15) (name P15) (type passive))
+        (pin (num 16) (name P16) (type passive))
+        (pin (num 17) (name P17) (type passive))
+        (pin (num 18) (name P18) (type passive))
+        (pin (num 19) (name P19) (type passive))
+        (pin (num 20) (name P20) (type passive))
+        (pin (num 21) (name P21) (type passive))
+        (pin (num 22) (name P22) (type passive))
+        (pin (num 23) (name P23) (type passive))
+        (pin (num 24) (name P20) (type passive))
+        (pin (num 25) (name P24) (type passive))
+        (pin (num 26) (name P22) (type passive)))))
+  (libraries
+    (library (logical raspberrypi-gpio-cache)
+      (uri E:\kicad-git\kicad_git_libs\template\raspberrypi-gpio\raspberrypi-gpio-cache.lib)))
+  (nets
+    (net (code 1) (name "/GPIO10(MOSI)")
+      (node (ref P1) (pin 19)))
+    (net (code 2) (name GND)
+      (node (ref P1) (pin 6)))
+    (net (code 3) (name "Net-(P1-Pad25)")
+      (node (ref P1) (pin 25)))
+    (net (code 4) (name "/GPIO11(SCLK)")
+      (node (ref P1) (pin 23)))
+    (net (code 5) (name "/GPIO9(MISO)")
+      (node (ref P1) (pin 21)))
+    (net (code 6) (name "Net-(P1-Pad17)")
+      (node (ref P1) (pin 17)))
+    (net (code 7) (name /GPIO22)
+      (node (ref P1) (pin 15)))
+    (net (code 8) (name /GPIO21)
+      (node (ref P1) (pin 13)))
+    (net (code 9) (name /GPIO17)
+      (node (ref P1) (pin 11)))
+    (net (code 10) (name "Net-(P1-Pad9)")
+      (node (ref P1) (pin 9)))
+    (net (code 11) (name /GPIO4)
+      (node (ref P1) (pin 7)))
+    (net (code 12) (name /GPIO24)
+      (node (ref P1) (pin 18)))
+    (net (code 13) (name "/GPIO7(CE1)")
+      (node (ref P1) (pin 26)))
+    (net (code 14) (name "/GPIO8(CE0)")
+      (node (ref P1) (pin 24)))
+    (net (code 15) (name /GPIO25)
+      (node (ref P1) (pin 22)))
+    (net (code 16) (name "Net-(P1-Pad20)")
+      (node (ref P1) (pin 20)))
+    (net (code 17) (name /GPIO23)
+      (node (ref P1) (pin 16)))
+    (net (code 18) (name "Net-(P1-Pad14)")
+      (node (ref P1) (pin 14)))
+    (net (code 19) (name /GPIO18)
+      (node (ref P1) (pin 12)))
+    (net (code 20) (name /RXD)
+      (node (ref P1) (pin 10)))
+    (net (code 21) (name /TXD)
+      (node (ref P1) (pin 8)))
+    (net (code 22) (name "Net-(P1-Pad4)")
+      (node (ref P1) (pin 4)))
+    (net (code 23) (name +5V)
+      (node (ref P1) (pin 2)))
+    (net (code 24) (name +3V3)
+      (node (ref P1) (pin 1)))
+    (net (code 25) (name "/GPIO1(SCL)")
+      (node (ref P1) (pin 5)))
+    (net (code 26) (name "/GPIO0(SDA)")
+      (node (ref P1) (pin 3)))))

template/raspberrypi-gpio/raspberrypi-gpio.pro

@@ -1,4 +1,4 @@
-update=15/11/2012 21:11:59
+update=13/12/2016 09:33:12
 version=1
 last_client=kicad
 [cvpcb]
@@ -77,39 +77,11 @@ LibName7=display
 LibName8=valves
 LibName9=led
 LibName10=dip_sockets
+[general]
+version=1
 [eeschema]
 version=1
 LibDir=
-NetFmt=1
-HPGLSpd=20
-HPGLDm=15
-HPGLNum=1
-offX_A4=0
-offY_A4=0
-offX_A3=0
-offY_A3=0
-offX_A2=0
-offY_A2=0
-offX_A1=0
-offY_A1=0
-offX_A0=0
-offY_A0=0
-offX_A=0
-offY_A=0
-offX_B=0
-offY_B=0
-offX_C=0
-offY_C=0
-offX_D=0
-offY_D=0
-offX_E=0
-offY_E=0
-RptD_X=0
-RptD_Y=100
-RptLab=1
-SimCmd=
-UseNetN=0
-LabSize=60
 [eeschema/libraries]
 LibName1=power
 LibName2=device
@@ -122,24 +94,13 @@ LibName8=cmos4000
 LibName9=adc-dac
 LibName10=memory
 LibName11=xilinx
-LibName12=special
-LibName13=microcontrollers
-LibName14=dsp
-LibName15=microchip
-LibName16=analog_switches
-LibName17=motorola
-LibName18=texas
-LibName19=intel
-LibName20=audio
-LibName21=interface
-LibName22=digital-audio
-LibName23=philips
-LibName24=display
-LibName25=cypress
-LibName26=siliconi
-LibName27=opto
-LibName28=atmel
-LibName29=contrib
-LibName30=valves
-[general]
-version=1
+LibName12=microcontrollers
+LibName13=dsp
+LibName14=microchip
+LibName15=analog_switches
+LibName16=motorola
+LibName17=texas
+LibName18=intel
+LibName19=audio
+LibName20=interface
+LibName21=opto

template/raspberrypi-gpio/raspberrypi-gpio.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date 15/11/2012 21:22:43
+EESchema Schematic File Version 2
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -10,7 +10,6 @@ LIBS:cmos4000
 LIBS:adc-dac
 LIBS:memory
 LIBS:xilinx
-LIBS:special
 LIBS:microcontrollers
 LIBS:dsp
 LIBS:microchip
@@ -20,17 +19,9 @@ LIBS:texas
 LIBS:intel
 LIBS:audio
 LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
 LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:rpi-cache
-EELAYER 27 0
+LIBS:raspberrypi-gpio-cache
+EELAYER 25 0
 EELAYER END
 $Descr A4 11693 8268
 encoding utf-8
@@ -50,6 +41,8 @@ U 1 1 50A55ABA
 P 2400 1800
 F 0 "P1" H 2400 2500 60  0000 C CNN
 F 1 "CONN_13X2" V 2400 1800 50  0000 C CNN
+F 2 "Pin_Headers:Pin_Header_Straight_2x13" H 2400 1100 30  0000 C CNN
+F 3 "" H 2400 1800 60  0001 C CNN
 	1    2400 1800
 	1    0    0    -1  
 $EndComp
@@ -57,8 +50,10 @@ $Comp
 L +3.3V #PWR01
 U 1 1 50A55B18
 P 1900 1050
-F 0 "#PWR01" H 1900 1010 30  0001 C CNN
-F 1 "+3.3V" H 1900 1160 30  0000 C CNN
+F 0 "#PWR01" H 1900 900 50  0001 C CNN
+F 1 "+3.3V" H 1900 1190 50  0000 C CNN
+F 2 "" H 1900 1050 50  0000 C CNN
+F 3 "" H 1900 1050 50  0000 C CNN
 	1    1900 1050
 	1    0    0    -1  
 $EndComp
@@ -70,8 +65,10 @@ $Comp
 L +5V #PWR02
 U 1 1 50A55B2E
 P 2900 1050
-F 0 "#PWR02" H 2900 1140 20  0001 C CNN
-F 1 "+5V" H 2900 1140 30  0000 C CNN
+F 0 "#PWR02" H 2900 900 50  0001 C CNN
+F 1 "+5V" H 2900 1190 50  0000 C CNN
+F 2 "" H 2900 1050 50  0000 C CNN
+F 3 "" H 2900 1050 50  0000 C CNN
 	1    2900 1050
 	1    0    0    -1  
 $EndComp
@@ -123,8 +120,10 @@ $Comp
 L GND #PWR03
 U 1 1 50A55C3F
 P 2900 2500
-F 0 "#PWR03" H 2900 2500 30  0001 C CNN
-F 1 "GND" H 2900 2430 30  0001 C CNN
+F 0 "#PWR03" H 2900 2250 50  0001 C CNN
+F 1 "GND" H 2900 2350 50  0000 C CNN
+F 2 "" H 2900 2500 50  0000 C CNN
+F 3 "" H 2900 2500 50  0000 C CNN
 	1    2900 2500
 	1    0    0    -1  
 $EndComp

template/stm32f100-discovery-shield/fp-lib-table

@@ -0,0 +1,3 @@
+(fp_lib_table
+  (lib (name Pin_Headers)(type KiCad)(uri "$(KISYSMOD)\\Pin_Headers.pretty")(options "")(descr ""))
+)

template/stm32f100-discovery-shield/stm32f100-discovery-shield-cache.lib

@@ -1,28 +1,34 @@
-EESchema-LIBRARY Version 2.3  Date: 2012-10-20 12:45:55
+EESchema-LIBRARY Version 2.3
 #encoding utf-8
 #
-# +3.3V
+# +3V3
 #
-DEF +3.3V #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -40 30 H I C CNN
-F1 "+3.3V" 0 110 30 H V C CNN
-ALIAS +3,3V
+DEF +3V3 #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+3V3" 0 140 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+ALIAS +3.3V
 DRAW
-X +3.3V 1 0 0 0 U 30 30 0 0 W N
-C 0 60 20 0 1 0 N
-P 3 0 1 0  0 0  0 40  0 40 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +3V3 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #
 # +5V
 #
-DEF +5V #PWR 0 40 Y Y 1 F P
-F0 "#PWR" 0 90 20 H I C CNN
-F1 "+5V" 0 90 30 H V C CNN
+DEF +5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+5V" 0 140 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
 DRAW
-X +5V 1 0 0 0 U 20 20 0 0 W N
-C 0 50 20 0 1 0 N
-P 4 0 1 0  0 0  0 30  0 30  0 30 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #
@@ -31,6 +37,8 @@ ENDDEF
 DEF CONN28 P 0 40 Y N 1 F N
 F0 "P" -50 0 60 V V C CNN
 F1 "CONN28" 50 0 60 V V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
 DRAW
 S -100 -1400 150 1400 0 1 0 f
 X P1 1 -350 1350 250 R 50 50 1 1 P I
@@ -69,6 +77,8 @@ ENDDEF
 DEF CONN6 P 0 40 Y N 1 F N
 F0 "P" -50 0 60 V V C CNN
 F1 "CONN6" 50 0 60 V V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
 DRAW
 S -100 -300 150 300 0 1 0 f
 X P1 1 -350 250 250 R 50 50 1 1 P I
@@ -82,12 +92,14 @@ ENDDEF
 #
 # GND
 #
-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
 DRAW
-P 4 0 1 0  -50 0  0 -50  50 0  -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #

template/stm32f100-discovery-shield/stm32f100-discovery-shield.cmp

@@ -1,24 +0,0 @@
-Cmp-Mod V01 Created by CvPcb (2012-10-17 BZR 3773)-testing date = 2012-10-20 12:09:50
-
-BeginCmp
-TimeStamp = /50827277;
-Reference = P1;
-ValeurCmp = CONN28;
-IdModule  = PIN_ARRAY_28X1;
-EndCmp
-
-BeginCmp
-TimeStamp = /50827286;
-Reference = P2;
-ValeurCmp = CONN28;
-IdModule  = PIN_ARRAY_28X1;
-EndCmp
-
-BeginCmp
-TimeStamp = /50827295;
-Reference = P3;
-ValeurCmp = CONN6;
-IdModule  = PIN_ARRAY_6X1;
-EndCmp
-
-EndListe

template/stm32f100-discovery-shield/stm32f100-discovery-shield.kicad_pcb

@@ -1,4 +1,4 @@
-(kicad_pcb (version 3) (host pcbnew "(2013-02-23 BZR 3971)-testing")
+(kicad_pcb (version 4) (host pcbnew 4.0.5)
 
   (general
     (links 3)
@@ -9,31 +9,31 @@
     (tracks 0)
     (zones 0)
     (modules 3)
-    (nets 4)
+    (nets 2)
   )
 
   (page A3)
-  (title_block 
+  (title_block
     (title "STM32 Value Line Discovery - Shiled board")
     (rev 1.0)
   )
 
   (layers
-    (15 F.Cu signal)
-    (0 B.Cu signal)
-    (16 B.Adhes user)
-    (17 F.Adhes user)
-    (18 B.Paste user)
-    (19 F.Paste user)
-    (20 B.SilkS user)
-    (21 F.SilkS user)
-    (22 B.Mask user)
-    (23 F.Mask user)
-    (24 Dwgs.User user)
-    (25 Cmts.User user)
-    (26 Eco1.User user)
-    (27 Eco2.User user)
-    (28 Edge.Cuts user)
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
   )
 
   (setup
@@ -64,10 +64,10 @@
     (aux_axis_origin 0 0)
     (visible_elements 7FFFFFFF)
     (pcbplotparams
-      (layerselection 3178497)
+      (layerselection 0x00030_80000001)
       (usegerberextensions true)
       (excludeedgelayer true)
-      (linewidth 60)
+      (linewidth 0.150000)
       (plotframeref false)
       (viasonmask false)
       (mode 1)
@@ -80,7 +80,6 @@
       (psa4output false)
       (plotreference true)
       (plotvalue true)
-      (plotothertext true)
       (plotinvisibletext false)
       (padsonsilk false)
       (subtractmaskfromsilk false)
@@ -92,9 +91,7 @@
   )
 
   (net 0 "")
-  (net 1 +3.3V)
-  (net 2 +5V)
-  (net 3 GND)
+  (net 1 GND)
 
   (net_class Default "To jest domyślna klasa połączeń."
     (clearance 0.254)
@@ -103,252 +100,159 @@
     (via_drill 0.635)
     (uvia_dia 0.508)
     (uvia_drill 0.127)
-    (add_net "")
-    (add_net +3.3V)
-    (add_net +5V)
     (add_net GND)
   )
 
-  (module PIN_ARRAY_6X1   locked (layer F.Cu) (tedit 50827C81) (tstamp 50827C60)
-    (at 55.88 113.03)
-    (descr "Single rangee contacts 1 x 6 pins")
-    (tags CONN)
-    (path /50827295)
-    (fp_text reference P3 (at -8.89 0) (layer F.SilkS)
-      (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
-    )
-    (fp_text value CONN6 (at -8.89 0) (layer F.SilkS) hide
-      (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
-    )
-    (fp_line (start -7.62 -1.27) (end 7.62 -1.27) (layer F.SilkS) (width 0.14986))
-    (fp_line (start 7.62 -1.27) (end 7.62 1.27) (layer F.SilkS) (width 0.14986))
-    (fp_line (start 7.62 1.27) (end -7.62 1.27) (layer F.SilkS) (width 0.14986))
-    (fp_line (start -7.62 1.27) (end -7.62 -1.27) (layer F.SilkS) (width 0.14986))
-    (pad 1 thru_hole rect (at -6.35 0) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 2 thru_hole circle (at -3.81 0) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 4 thru_hole circle (at 1.27 0) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 6 thru_hole circle (at 6.35 0) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 3 thru_hole circle (at -1.27 0) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 5 thru_hole circle (at 3.81 0) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-  )
-
-  (module PIN_ARRAY_28X1   locked (layer F.Cu) (tedit 50827C6F) (tstamp 50827C84)
-    (at 39.37 73.66 270)
-    (descr "Single rangee contacts 1 x 28 pins")
-    (tags CONN)
-    (path /50827277)
-    (fp_text reference P1 (at -36.195 0 360) (layer F.SilkS)
-      (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
-    )
-    (fp_text value CONN28 (at -36.195 0 360) (layer F.SilkS) hide
-      (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
-    )
-    (fp_line (start -35.56 -1.27) (end 35.56 -1.27) (layer F.SilkS) (width 0.14986))
-    (fp_line (start 35.56 -1.27) (end 35.56 1.27) (layer F.SilkS) (width 0.14986))
-    (fp_line (start 35.56 1.27) (end -35.56 1.27) (layer F.SilkS) (width 0.14986))
-    (fp_line (start -35.56 1.27) (end -35.56 -1.27) (layer F.SilkS) (width 0.14986))
-    (pad 1 thru_hole rect (at -34.29 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 3 GND)
-    )
-    (pad 2 thru_hole circle (at -31.75 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 11 thru_hole circle (at -8.89 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 4 thru_hole circle (at -26.67 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 13 thru_hole circle (at -3.81 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 6 thru_hole circle (at -21.59 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 15 thru_hole circle (at 1.27 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 8 thru_hole circle (at -16.51 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 17 thru_hole circle (at 6.35 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 10 thru_hole circle (at -11.43 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 19 thru_hole circle (at 11.43 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 12 thru_hole circle (at -6.35 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 21 thru_hole circle (at 16.51 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 14 thru_hole circle (at -1.27 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 23 thru_hole circle (at 21.59 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 16 thru_hole circle (at 3.81 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 25 thru_hole circle (at 26.67 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 18 thru_hole circle (at 8.89 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 27 thru_hole circle (at 31.75 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 20 thru_hole circle (at 13.97 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 22 thru_hole circle (at 19.05 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 24 thru_hole circle (at 24.13 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 26 thru_hole circle (at 29.21 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 28 thru_hole circle (at 34.29 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 3 GND)
-    )
-    (pad 3 thru_hole circle (at -29.21 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 1 +3.3V)
-    )
-    (pad 5 thru_hole circle (at -24.13 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 7 thru_hole circle (at -19.05 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 9 thru_hole circle (at -13.97 0 270) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-  )
-
-  (module PIN_ARRAY_28X1   locked (layer F.Cu) (tedit 50827C8E) (tstamp 50827CA8)
-    (at 69.85 73.66 90)
-    (descr "Single rangee contacts 1 x 28 pins")
-    (tags CONN)
+  (module Pin_Headers:Pin_Header_Straight_1x28 locked (layer F.Cu) (tedit 0) (tstamp 50827CA8)
+    (at 69.85 107.95 180)
+    (descr "Through hole pin header")
+    (tags "pin header")
     (path /50827286)
-    (fp_text reference P2 (at -36.195 0 180) (layer F.SilkS)
-      (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
+    (fp_text reference P2 (at 0 -5.1 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value CONN28 (at -36.195 0 180) (layer F.SilkS) hide
-      (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
+    (fp_text value CONN28 (at 0 -3.1 180) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_line (start -35.56 -1.27) (end 35.56 -1.27) (layer F.SilkS) (width 0.14986))
-    (fp_line (start 35.56 -1.27) (end 35.56 1.27) (layer F.SilkS) (width 0.14986))
-    (fp_line (start 35.56 1.27) (end -35.56 1.27) (layer F.SilkS) (width 0.14986))
-    (fp_line (start -35.56 1.27) (end -35.56 -1.27) (layer F.SilkS) (width 0.14986))
-    (pad 1 thru_hole rect (at -34.29 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 3 GND)
+    (fp_line (start -1.75 -1.75) (end -1.75 70.35) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.75 -1.75) (end 1.75 70.35) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.75 70.35) (end 1.75 70.35) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.27 1.27) (end -1.27 69.85) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.27 69.85) (end 1.27 69.85) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.27 69.85) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
+    (pad 1 thru_hole rect (at 0 0 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 1 GND))
+    (pad 2 thru_hole oval (at 0 2.54 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 3 thru_hole oval (at 0 5.08 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 4 thru_hole oval (at 0 7.62 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 5 thru_hole oval (at 0 10.16 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 6 thru_hole oval (at 0 12.7 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 7 thru_hole oval (at 0 15.24 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 8 thru_hole oval (at 0 17.78 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 9 thru_hole oval (at 0 20.32 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 10 thru_hole oval (at 0 22.86 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 11 thru_hole oval (at 0 25.4 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 12 thru_hole oval (at 0 27.94 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 13 thru_hole oval (at 0 30.48 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 14 thru_hole oval (at 0 33.02 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 15 thru_hole oval (at 0 35.56 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 16 thru_hole oval (at 0 38.1 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 17 thru_hole oval (at 0 40.64 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 18 thru_hole oval (at 0 43.18 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 19 thru_hole oval (at 0 45.72 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 20 thru_hole oval (at 0 48.26 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 21 thru_hole oval (at 0 50.8 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 22 thru_hole oval (at 0 53.34 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 23 thru_hole oval (at 0 55.88 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 24 thru_hole oval (at 0 58.42 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 25 thru_hole oval (at 0 60.96 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 26 thru_hole oval (at 0 63.5 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 27 thru_hole oval (at 0 66.04 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 28 thru_hole oval (at 0 68.58 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 1 GND))
+    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x28.wrl
+      (at (xyz 0 -1.35 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
     )
-    (pad 2 thru_hole circle (at -31.75 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
+  )
+
+  (module Pin_Headers:Pin_Header_Straight_1x28 locked (layer F.Cu) (tedit 0) (tstamp 50827C84)
+    (at 39.37 39.37)
+    (descr "Through hole pin header")
+    (tags "pin header")
+    (path /50827277)
+    (fp_text reference P1 (at 0 -5.1) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
     )
-    (pad 11 thru_hole circle (at -8.89 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
+    (fp_text value CONN28 (at 0 -3.1) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
     )
-    (pad 4 thru_hole circle (at -26.67 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
+    (fp_line (start -1.75 -1.75) (end -1.75 70.35) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.75 -1.75) (end 1.75 70.35) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.75 70.35) (end 1.75 70.35) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.27 1.27) (end -1.27 69.85) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.27 69.85) (end 1.27 69.85) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.27 69.85) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
+    (pad 1 thru_hole rect (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 1 GND))
+    (pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 5 thru_hole oval (at 0 10.16) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 6 thru_hole oval (at 0 12.7) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 7 thru_hole oval (at 0 15.24) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 8 thru_hole oval (at 0 17.78) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 9 thru_hole oval (at 0 20.32) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 10 thru_hole oval (at 0 22.86) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 11 thru_hole oval (at 0 25.4) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 12 thru_hole oval (at 0 27.94) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 13 thru_hole oval (at 0 30.48) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 14 thru_hole oval (at 0 33.02) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 15 thru_hole oval (at 0 35.56) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 16 thru_hole oval (at 0 38.1) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 17 thru_hole oval (at 0 40.64) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 18 thru_hole oval (at 0 43.18) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 19 thru_hole oval (at 0 45.72) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 20 thru_hole oval (at 0 48.26) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 21 thru_hole oval (at 0 50.8) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 22 thru_hole oval (at 0 53.34) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 23 thru_hole oval (at 0 55.88) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 24 thru_hole oval (at 0 58.42) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 25 thru_hole oval (at 0 60.96) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 26 thru_hole oval (at 0 63.5) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 27 thru_hole oval (at 0 66.04) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 28 thru_hole oval (at 0 68.58) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 1 GND))
+    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x28.wrl
+      (at (xyz 0 -1.35 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
     )
-    (pad 13 thru_hole circle (at -3.81 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
+  )
+
+  (module Pin_Headers:Pin_Header_Straight_1x06 (layer F.Cu) (tedit 0) (tstamp 50827C60)
+    (at 49.53 113.03 90)
+    (descr "Through hole pin header")
+    (tags "pin header")
+    (path /50827295)
+    (fp_text reference P3 (at 0 -5.1 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
     )
-    (pad 6 thru_hole circle (at -21.59 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
+    (fp_text value CONN6 (at 0 -3.1 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
     )
-    (pad 15 thru_hole circle (at 1.27 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 8 thru_hole circle (at -16.51 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 17 thru_hole circle (at 6.35 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 10 thru_hole circle (at -11.43 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 19 thru_hole circle (at 11.43 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 12 thru_hole circle (at -6.35 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 21 thru_hole circle (at 16.51 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 14 thru_hole circle (at -1.27 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 23 thru_hole circle (at 21.59 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 16 thru_hole circle (at 3.81 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 25 thru_hole circle (at 26.67 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 18 thru_hole circle (at 8.89 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 27 thru_hole circle (at 31.75 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 20 thru_hole circle (at 13.97 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 22 thru_hole circle (at 19.05 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 24 thru_hole circle (at 24.13 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 26 thru_hole circle (at 29.21 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 2 +5V)
-    )
-    (pad 28 thru_hole circle (at 34.29 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 3 GND)
-    )
-    (pad 3 thru_hole circle (at -29.21 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 5 thru_hole circle (at -24.13 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 7 thru_hole circle (at -19.05 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 9 thru_hole circle (at -13.97 0 90) (size 1.524 1.524) (drill 1.016)
-      (layers *.Cu *.Mask F.SilkS)
+    (fp_line (start -1.75 -1.75) (end -1.75 14.45) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.75 -1.75) (end 1.75 14.45) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.75 14.45) (end 1.75 14.45) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.27 1.27) (end 1.27 13.97) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.27 13.97) (end -1.27 13.97) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.27 13.97) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
+    (pad 1 thru_hole rect (at 0 0 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 2 thru_hole oval (at 0 2.54 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 3 thru_hole oval (at 0 5.08 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 4 thru_hole oval (at 0 7.62 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 5 thru_hole oval (at 0 10.16 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (pad 6 thru_hole oval (at 0 12.7 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x06.wrl
+      (at (xyz 0 -0.25 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
     )
   )
 
@@ -360,7 +264,7 @@
   (gr_line (start 76.2 118.745) (end 33.02 118.745) (angle 90) (layer Edge.Cuts) (width 0.14986))
   (gr_line (start 33.02 34.29) (end 76.2 34.29) (angle 90) (layer Edge.Cuts) (width 0.14986))
 
-  (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 50827DC8) (hatch edge 0.508)
+  (zone (net 1) (net_name GND) (layer B.Cu) (tstamp 50827DC8) (hatch edge 0.508)
     (connect_pads (clearance 0.508))
     (min_thickness 0.254)
     (fill (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.889))

template/stm32f100-discovery-shield/stm32f100-discovery-shield.mod

@@ -1,276 +0,0 @@
-PCBNEW-LibModule-V1  2012-10-20 12:13:07
-# encoding utf-8
-Units deci-mils
-$INDEX
-PIN_ARRAY_28X1
-PIN_ARRAY_6X1
-$EndINDEX
-$MODULE PIN_ARRAY_28X1
-Po 0 0 0 15 50827920 00000000 ~~
-Li PIN_ARRAY_28X1
-Cd Single rangee contacts 1 x 28 pins
-Kw CONN
-Sc 0
-AR 
-Op 0 0 0
-T0 0 -800 249 249 0 62 N V 21 N "PIN_ARRAY_28X1"
-T1 0 800 249 249 0 62 N I 21 N "VAL**"
-DS -14000 -500 14000 -500 59 21
-DS 14000 -500 14000 500 59 21
-DS 14000 500 -14000 500 59 21
-DS -14000 500 -14000 -500 59 21
-$PAD
-Sh "1" R 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -13500 0
-$EndPAD
-$PAD
-Sh "2" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -12500 0
-$EndPAD
-$PAD
-Sh "11" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -3500 0
-$EndPAD
-$PAD
-Sh "4" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -10500 0
-$EndPAD
-$PAD
-Sh "13" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -1500 0
-$EndPAD
-$PAD
-Sh "6" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -8500 0
-$EndPAD
-$PAD
-Sh "15" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 500 0
-$EndPAD
-$PAD
-Sh "8" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -6500 0
-$EndPAD
-$PAD
-Sh "17" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 2500 0
-$EndPAD
-$PAD
-Sh "10" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -4500 0
-$EndPAD
-$PAD
-Sh "19" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 4500 0
-$EndPAD
-$PAD
-Sh "12" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -2500 0
-$EndPAD
-$PAD
-Sh "21" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 6500 0
-$EndPAD
-$PAD
-Sh "14" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -500 0
-$EndPAD
-$PAD
-Sh "23" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 8500 0
-$EndPAD
-$PAD
-Sh "16" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 1500 0
-$EndPAD
-$PAD
-Sh "25" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 10500 0
-$EndPAD
-$PAD
-Sh "18" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 3500 0
-$EndPAD
-$PAD
-Sh "27" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 12500 0
-$EndPAD
-$PAD
-Sh "20" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 5500 0
-$EndPAD
-$PAD
-Sh "22" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 7500 0
-$EndPAD
-$PAD
-Sh "24" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 9500 0
-$EndPAD
-$PAD
-Sh "26" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 11500 0
-$EndPAD
-$PAD
-Sh "28" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 13500 0
-$EndPAD
-$PAD
-Sh "3" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -11500 0
-$EndPAD
-$PAD
-Sh "5" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -9500 0
-$EndPAD
-$PAD
-Sh "7" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -7500 0
-$EndPAD
-$PAD
-Sh "9" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -5500 0
-$EndPAD
-$EndMODULE PIN_ARRAY_28X1
-$MODULE PIN_ARRAY_6X1
-Po 0 0 0 15 508278F8 00000000 ~~
-Li PIN_ARRAY_6X1
-Cd Single rangee contacts 1 x 6 pins
-Kw CONN
-Sc 0
-AR 
-Op 0 0 0
-T0 0 -700 249 249 0 62 N V 21 N "PIN_ARRAY_6X1"
-T1 0 800 249 249 0 62 N I 21 N "VAL**"
-DS -3000 -500 3000 -500 59 21
-DS 3000 -500 3000 500 59 21
-DS 3000 500 -3000 500 59 21
-DS -3000 500 -3000 -500 59 21
-$PAD
-Sh "1" R 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -2500 0
-$EndPAD
-$PAD
-Sh "2" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -1500 0
-$EndPAD
-$PAD
-Sh "4" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 500 0
-$EndPAD
-$PAD
-Sh "6" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 2500 0
-$EndPAD
-$PAD
-Sh "3" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -500 0
-$EndPAD
-$PAD
-Sh "5" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 1500 0
-$EndPAD
-$EndMODULE PIN_ARRAY_6X1
-$EndLIBRARY

template/stm32f100-discovery-shield/stm32f100-discovery-shield.net

@@ -1,80 +1,207 @@
-# EESchema Netlist Version 1.1 created  2012-10-20 12:24:05
-(
- ( /50827277 $noname  P1 CONN28 {Lib=CONN28}
-  (    1 GND )
-  (    2 ? )
-  (    3 +3.3V )
-  (    4 ? )
-  (    5 ? )
-  (    6 ? )
-  (    7 ? )
-  (    8 ? )
-  (    9 ? )
-  (   10 ? )
-  (   11 ? )
-  (   12 ? )
-  (   13 ? )
-  (   14 ? )
-  (   15 ? )
-  (   16 ? )
-  (   17 ? )
-  (   18 ? )
-  (   19 ? )
-  (   20 ? )
-  (   21 ? )
-  (   22 ? )
-  (   23 ? )
-  (   24 ? )
-  (   25 ? )
-  (   26 ? )
-  (   27 ? )
-  (   28 GND )
- )
- ( /50827286 $noname  P2 CONN28 {Lib=CONN28}
-  (    1 GND )
-  (    2 ? )
-  (    3 ? )
-  (    4 ? )
-  (    5 ? )
-  (    6 ? )
-  (    7 ? )
-  (    8 ? )
-  (    9 ? )
-  (   10 ? )
-  (   11 ? )
-  (   12 ? )
-  (   13 ? )
-  (   14 ? )
-  (   15 ? )
-  (   16 ? )
-  (   17 ? )
-  (   18 ? )
-  (   19 ? )
-  (   20 ? )
-  (   21 ? )
-  (   22 ? )
-  (   23 ? )
-  (   24 ? )
-  (   25 ? )
-  (   26 +5V )
-  (   27 ? )
-  (   28 GND )
- )
- ( /50827295 $noname  P3 CONN6 {Lib=CONN6}
-  (    1 ? )
-  (    2 ? )
-  (    3 ? )
-  (    4 ? )
-  (    5 ? )
-  (    6 ? )
- )
-)
-*
-{ Pin List by Nets
-Net 59 "GND" "GND"
- P1 1
- P2 28
- P1 28
- P2 1
-}
-#End
+(export (version D)
+  (design
+    (source E:/kicad-git/kicad_git_libs/template/stm32f100-discovery-shield/stm32f100-discovery-shield.sch)
+    (date "13/12/2016 09:19:37")
+    (tool "Eeschema 4.0.5")
+    (sheet (number 1) (name /) (tstamps /)
+      (title_block
+        (title "STM32 Value Line Discovery - Shiled board")
+        (company)
+        (rev 1.0)
+        (date "20 oct 2012")
+        (source stm32f100-discovery-shield.sch)
+        (comment (number 1) (value ""))
+        (comment (number 2) (value ""))
+        (comment (number 3) (value ""))
+        (comment (number 4) (value "")))))
+  (components
+    (comp (ref P1)
+      (value CONN28)
+      (footprint Pin_Headers:Pin_Header_Straight_1x28)
+      (libsource (lib stm32f100-discovery-shield) (part CONN28))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 50827277))
+    (comp (ref P2)
+      (value CONN28)
+      (footprint Pin_Headers:Pin_Header_Straight_1x28)
+      (libsource (lib stm32f100-discovery-shield) (part CONN28))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 50827286))
+    (comp (ref P3)
+      (value CONN6)
+      (footprint stm32f100-discovery-shield:PIN_ARRAY_6X1)
+      (libsource (lib stm32f100-discovery-shield) (part CONN6))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 50827295)))
+  (libparts
+    (libpart (lib stm32f100-discovery-shield) (part CONN28)
+      (description "Symbole general de connexion")
+      (fields
+        (field (name Reference) P)
+        (field (name Value) CONN28))
+      (pins
+        (pin (num 1) (name P1) (type passive))
+        (pin (num 2) (name P2) (type passive))
+        (pin (num 3) (name P3) (type passive))
+        (pin (num 4) (name P4) (type passive))
+        (pin (num 5) (name P5) (type passive))
+        (pin (num 6) (name P6) (type passive))
+        (pin (num 7) (name P7) (type passive))
+        (pin (num 8) (name P8) (type passive))
+        (pin (num 9) (name P9) (type passive))
+        (pin (num 10) (name P10) (type passive))
+        (pin (num 11) (name P11) (type passive))
+        (pin (num 12) (name P12) (type passive))
+        (pin (num 13) (name P13) (type passive))
+        (pin (num 14) (name P14) (type passive))
+        (pin (num 15) (name P15) (type passive))
+        (pin (num 16) (name P16) (type passive))
+        (pin (num 17) (name P17) (type passive))
+        (pin (num 18) (name P18) (type passive))
+        (pin (num 19) (name P19) (type passive))
+        (pin (num 20) (name P20) (type passive))
+        (pin (num 21) (name P21) (type passive))
+        (pin (num 22) (name P22) (type passive))
+        (pin (num 23) (name P23) (type passive))
+        (pin (num 24) (name P24) (type passive))
+        (pin (num 25) (name P25) (type passive))
+        (pin (num 26) (name P26) (type passive))
+        (pin (num 27) (name P27) (type passive))
+        (pin (num 28) (name P28) (type passive))))
+    (libpart (lib stm32f100-discovery-shield) (part CONN6)
+      (description "Symbole general de connexion")
+      (fields
+        (field (name Reference) P)
+        (field (name Value) CONN6))
+      (pins
+        (pin (num 1) (name P1) (type passive))
+        (pin (num 2) (name P2) (type passive))
+        (pin (num 3) (name P3) (type passive))
+        (pin (num 4) (name P4) (type passive))
+        (pin (num 5) (name P5) (type passive))
+        (pin (num 6) (name P6) (type passive)))))
+  (libraries
+    (library (logical stm32f100-discovery-shield)
+      (uri E:\kicad-git\kicad_git_libs\template\stm32f100-discovery-shield\stm32f100-discovery-shield.lib)))
+  (nets
+    (net (code 1) (name /PB10)
+      (node (ref P3) (pin 1)))
+    (net (code 2) (name /PB11)
+      (node (ref P3) (pin 2)))
+    (net (code 3) (name /PB12)
+      (node (ref P3) (pin 3)))
+    (net (code 4) (name /PB13)
+      (node (ref P3) (pin 4)))
+    (net (code 5) (name /PB14)
+      (node (ref P3) (pin 5)))
+    (net (code 6) (name /PB15)
+      (node (ref P3) (pin 6)))
+    (net (code 7) (name "Net-(P1-Pad2)")
+      (node (ref P1) (pin 2)))
+    (net (code 8) (name "Net-(P2-Pad27)")
+      (node (ref P2) (pin 27)))
+    (net (code 9) (name +5V)
+      (node (ref P2) (pin 26)))
+    (net (code 10) (name /PA15)
+      (node (ref P2) (pin 13)))
+    (net (code 11) (name /PB6)
+      (node (ref P2) (pin 21)))
+    (net (code 12) (name /PB5)
+      (node (ref P2) (pin 20)))
+    (net (code 13) (name /PB4)
+      (node (ref P2) (pin 19)))
+    (net (code 14) (name /PB3)
+      (node (ref P2) (pin 18)))
+    (net (code 15) (name /PD2)
+      (node (ref P2) (pin 17)))
+    (net (code 16) (name /PC12)
+      (node (ref P2) (pin 16)))
+    (net (code 17) (name /PC11)
+      (node (ref P2) (pin 15)))
+    (net (code 18) (name /PC10)
+      (node (ref P2) (pin 14)))
+    (net (code 19) (name /PA14)
+      (node (ref P2) (pin 12)))
+    (net (code 20) (name /PA13)
+      (node (ref P2) (pin 11)))
+    (net (code 21) (name /PA12)
+      (node (ref P2) (pin 10)))
+    (net (code 22) (name /PA11)
+      (node (ref P2) (pin 9)))
+    (net (code 23) (name /PA10)
+      (node (ref P2) (pin 8)))
+    (net (code 24) (name /PA8)
+      (node (ref P2) (pin 6)))
+    (net (code 25) (name /PA9)
+      (node (ref P2) (pin 7)))
+    (net (code 26) (name /PC9)
+      (node (ref P2) (pin 5)))
+    (net (code 27) (name /PC8)
+      (node (ref P2) (pin 4)))
+    (net (code 28) (name /PC7)
+      (node (ref P2) (pin 3)))
+    (net (code 29) (name /PC6)
+      (node (ref P2) (pin 2)))
+    (net (code 30) (name /PA3)
+      (node (ref P1) (pin 18)))
+    (net (code 31) (name /PA4)
+      (node (ref P1) (pin 19)))
+    (net (code 32) (name /PB2)
+      (node (ref P1) (pin 27)))
+    (net (code 33) (name /PB7)
+      (node (ref P2) (pin 22)))
+    (net (code 34) (name /BOOT)
+      (node (ref P2) (pin 23)))
+    (net (code 35) (name /PB8)
+      (node (ref P2) (pin 24)))
+    (net (code 36) (name /PA6)
+      (node (ref P1) (pin 21)))
+    (net (code 37) (name +3V3)
+      (node (ref P1) (pin 3)))
+    (net (code 38) (name /VBAT)
+      (node (ref P1) (pin 4)))
+    (net (code 39) (name /PC13)
+      (node (ref P1) (pin 5)))
+    (net (code 40) (name /PC14)
+      (node (ref P1) (pin 6)))
+    (net (code 41) (name /PC15)
+      (node (ref P1) (pin 7)))
+    (net (code 42) (name /PD0)
+      (node (ref P1) (pin 8)))
+    (net (code 43) (name /PD1)
+      (node (ref P1) (pin 9)))
+    (net (code 44) (name /RST)
+      (node (ref P1) (pin 10)))
+    (net (code 45) (name /PA5)
+      (node (ref P1) (pin 20)))
+    (net (code 46) (name /PC0)
+      (node (ref P1) (pin 11)))
+    (net (code 47) (name /PB9)
+      (node (ref P2) (pin 25)))
+    (net (code 48) (name /PC1)
+      (node (ref P1) (pin 12)))
+    (net (code 49) (name /PA7)
+      (node (ref P1) (pin 22)))
+    (net (code 50) (name /PC2)
+      (node (ref P1) (pin 13)))
+    (net (code 51) (name /PC4)
+      (node (ref P1) (pin 23)))
+    (net (code 52) (name /PC3)
+      (node (ref P1) (pin 14)))
+    (net (code 53) (name /PC5)
+      (node (ref P1) (pin 24)))
+    (net (code 54) (name /PA0)
+      (node (ref P1) (pin 15)))
+    (net (code 55) (name /PB0)
+      (node (ref P1) (pin 25)))
+    (net (code 56) (name /PA1)
+      (node (ref P1) (pin 16)))
+    (net (code 57) (name /PB1)
+      (node (ref P1) (pin 26)))
+    (net (code 58) (name /PA2)
+      (node (ref P1) (pin 17)))
+    (net (code 59) (name GND)
+      (node (ref P1) (pin 1))
+      (node (ref P2) (pin 1))
+      (node (ref P1) (pin 28))
+      (node (ref P2) (pin 28)))))

template/stm32f100-discovery-shield/stm32f100-discovery-shield.pro

@@ -1,6 +1,6 @@
-update=2012-10-20 12:46:25
+update=13/12/2016 09:10:33
 version=1
-last_client=pcbnew
+last_client=kicad
 [general]
 version=1
 [cvpcb]
@@ -8,47 +8,6 @@ version=1
 NetIExt=net
 [cvpcb/libraries]
 EquName1=devcms
-[eeschema]
-version=1
-LibDir=
-NetFmtName=
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=40
-[eeschema/libraries]
-LibName1=stm32f100-discovery-shield
-LibName2=stm32
-LibName3=power
-LibName4=device
-LibName5=transistors
-LibName6=conn
-LibName7=linear
-LibName8=regul
-LibName9=74xx
-LibName10=cmos4000
-LibName11=adc-dac
-LibName12=memory
-LibName13=xilinx
-LibName14=special
-LibName15=microcontrollers
-LibName16=dsp
-LibName17=microchip
-LibName18=analog_switches
-LibName19=motorola
-LibName20=texas
-LibName21=intel
-LibName22=audio
-LibName23=interface
-LibName24=digital-audio
-LibName25=philips
-LibName26=display
-LibName27=cypress
-LibName28=siliconi
-LibName29=opto
-LibName30=atmel
-LibName31=contrib
-LibName32=valves
 [pcbnew]
 version=1
 LastNetListRead=
@@ -79,3 +38,22 @@ LibName9=led
 LibName10=dip_sockets
 LibName11=pga_sockets
 LibName12=valves
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=stm32f100-discovery-shield
+LibName2=stm32
+LibName3=power
+LibName4=device
+LibName5=transistors
+LibName6=conn
+LibName7=linear
+LibName8=regul
+LibName9=74xx
+LibName10=adc-dac
+LibName11=memory
+LibName12=microcontrollers
+LibName13=microchip
+LibName14=analog_switches
+LibName15=display

template/stm32f100-discovery-shield/stm32f100-discovery-shield.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date 2012-10-20 12:45:55
+EESchema Schematic File Version 2
 LIBS:stm32f100-discovery-shield
 LIBS:stm32
 LIBS:power
@@ -8,31 +8,14 @@ LIBS:conn
 LIBS:linear
 LIBS:regul
 LIBS:74xx
-LIBS:cmos4000
 LIBS:adc-dac
 LIBS:memory
-LIBS:xilinx
-LIBS:special
 LIBS:microcontrollers
-LIBS:dsp
 LIBS:microchip
 LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
 LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
 LIBS:stm32f100-discovery-shield-cache
-EELAYER 27 0
+EELAYER 25 0
 EELAYER END
 $Descr A4 11693 8268
 encoding utf-8
@@ -49,320 +32,330 @@ $EndDescr
 $Comp
 L CONN28 P1
 U 1 1 50827277
-P 10950 1950
-F 0 "P1" V 10900 1950 60  0000 C CNN
-F 1 "CONN28" V 11000 1950 60  0000 C CNN
-	1    10950 1950
+P 10800 1950
+F 0 "P1" V 10750 1950 60  0000 C CNN
+F 1 "CONN28" V 10850 1950 60  0000 C CNN
+F 2 "Pin_Headers:Pin_Header_Straight_1x28" V 11000 1950 30  0000 C CNN
+F 3 "" H 10800 1950 60  0001 C CNN
+	1    10800 1950
 	1    0    0    -1  
 $EndComp
 $Comp
 L CONN28 P2
 U 1 1 50827286
-P 10950 4850
-F 0 "P2" V 10900 4850 60  0000 C CNN
-F 1 "CONN28" V 11000 4850 60  0000 C CNN
-	1    10950 4850
+P 10800 4850
+F 0 "P2" V 10750 4850 60  0000 C CNN
+F 1 "CONN28" V 10850 4850 60  0000 C CNN
+F 2 "Pin_Headers:Pin_Header_Straight_1x28" V 11000 4850 30  0000 C CNN
+F 3 "" H 10800 4850 60  0001 C CNN
+	1    10800 4850
 	1    0    0    1   
 $EndComp
 $Comp
 L CONN6 P3
 U 1 1 50827295
-P 10950 6650
-F 0 "P3" V 10900 6650 60  0000 C CNN
-F 1 "CONN6" V 11000 6650 60  0000 C CNN
-	1    10950 6650
+P 9000 850
+F 0 "P3" V 8950 850 60  0000 C CNN
+F 1 "CONN6" V 9050 850 60  0000 C CNN
+F 2 "stm32f100-discovery-shield:PIN_ARRAY_6X1" V 9200 850 30  0000 C CNN
+F 3 "" H 9000 850 60  0001 C CNN
+	1    9000 850 
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
-	10600 600  10300 600 
+	10450 600  10350 600 
 Wire Wire Line
-	10600 800  10300 800 
+	10450 800  10150 800 
 Wire Wire Line
-	10600 900  10300 900 
+	10450 900  10150 900 
 Wire Wire Line
-	10600 1000 10300 1000
+	10450 1000 10150 1000
 Wire Wire Line
-	10600 1100 10300 1100
+	10450 1100 10150 1100
 Wire Wire Line
-	10600 1200 10300 1200
+	10450 1200 10150 1200
 Wire Wire Line
-	10600 1300 10300 1300
+	10450 1300 10150 1300
 Wire Wire Line
-	10600 1400 10300 1400
+	10450 1400 10150 1400
 Wire Wire Line
-	10600 1500 10300 1500
+	10450 1500 10150 1500
 Wire Wire Line
-	10600 1600 10300 1600
+	10450 1600 10150 1600
 Wire Wire Line
-	10600 1700 10300 1700
+	10450 1700 10150 1700
 Wire Wire Line
-	10600 1800 10300 1800
+	10450 1800 10150 1800
 Wire Wire Line
-	10600 1900 10300 1900
+	10450 1900 10150 1900
 Wire Wire Line
-	10600 2000 10300 2000
+	10450 2000 10150 2000
 Wire Wire Line
-	10600 2100 10300 2100
+	10450 2100 10150 2100
 Wire Wire Line
-	10600 2200 10300 2200
+	10450 2200 10150 2200
 Wire Wire Line
-	10600 2300 10300 2300
+	10450 2300 10150 2300
 Wire Wire Line
-	10600 2400 10300 2400
+	10450 2400 10150 2400
 Wire Wire Line
-	10600 2500 10300 2500
+	10450 2500 10150 2500
 Wire Wire Line
-	10600 2600 10300 2600
+	10450 2600 10150 2600
 Wire Wire Line
-	10600 2700 10300 2700
+	10450 2700 10150 2700
 Wire Wire Line
-	10600 2800 10300 2800
+	10450 2800 10150 2800
 Wire Wire Line
-	10600 2900 10300 2900
+	10450 2900 10150 2900
 Wire Wire Line
-	10600 3000 10300 3000
+	10450 3000 10150 3000
 Wire Wire Line
-	10600 3100 10300 3100
+	10450 3100 10150 3100
 Wire Wire Line
-	10600 3200 10300 3200
+	10450 3200 10150 3200
 Wire Wire Line
-	10600 3300 10300 3300
+	10450 3300 10150 3300
 Wire Wire Line
-	10600 3500 10300 3500
+	10450 3500 10150 3500
 Wire Wire Line
-	10600 3700 10300 3700
+	10450 3700 10150 3700
 Wire Wire Line
-	10600 3800 10300 3800
+	10450 3800 10150 3800
 Wire Wire Line
-	10600 3900 10300 3900
+	10450 3900 10150 3900
 Wire Wire Line
-	10600 4000 10300 4000
+	10450 4000 10150 4000
 Wire Wire Line
-	10600 4100 10300 4100
+	10450 4100 10150 4100
 Wire Wire Line
-	10600 4200 10300 4200
+	10450 4200 10150 4200
 Wire Wire Line
-	10600 4300 10300 4300
+	10450 4300 10150 4300
 Wire Wire Line
-	10600 4400 10300 4400
+	10450 4400 10150 4400
 Wire Wire Line
-	10600 4500 10300 4500
+	10450 4500 10150 4500
 Wire Wire Line
-	10600 4600 10300 4600
+	10450 4600 10150 4600
 Wire Wire Line
-	10600 4700 10300 4700
+	10450 4700 10150 4700
 Wire Wire Line
-	10600 4800 10300 4800
+	10450 4800 10150 4800
 Wire Wire Line
-	10600 4900 10300 4900
+	10450 4900 10150 4900
 Wire Wire Line
-	10600 5000 10300 5000
+	10450 5000 10150 5000
 Wire Wire Line
-	10600 5100 10300 5100
+	10450 5100 10150 5100
 Wire Wire Line
-	10600 5200 10300 5200
+	10450 5200 10150 5200
 Wire Wire Line
-	10600 5300 10300 5300
+	10450 5300 10150 5300
 Wire Wire Line
-	10600 5400 10300 5400
+	10450 5400 10150 5400
 Wire Wire Line
-	10600 5500 10300 5500
+	10450 5500 10150 5500
 Wire Wire Line
-	10600 5600 10300 5600
+	10450 5600 10150 5600
 Wire Wire Line
-	10600 5700 10300 5700
+	10450 5700 10150 5700
 Wire Wire Line
-	10600 5800 10300 5800
+	10450 5800 10150 5800
 Wire Wire Line
-	10600 5900 10300 5900
+	10450 5900 10150 5900
 Wire Wire Line
-	10600 6000 10300 6000
+	10450 6000 10150 6000
 Wire Wire Line
-	10600 6100 10300 6100
+	10450 6100 10150 6100
 Wire Wire Line
-	10600 6200 10300 6200
+	10450 6200 10150 6200
 Wire Wire Line
-	10600 6400 10300 6400
+	8650 600  8350 600 
 Wire Wire Line
-	10600 6500 10300 6500
+	8650 700  8350 700 
 Wire Wire Line
-	10600 6600 10300 6600
+	8650 800  8350 800 
 Wire Wire Line
-	10600 6700 10300 6700
+	8650 900  8350 900 
 Wire Wire Line
-	10600 6800 10300 6800
+	8650 1000 8350 1000
 Wire Wire Line
-	10600 6900 10300 6900
-Text Label 10350 6400 0    40   ~ 0
+	8650 1100 8350 1100
+Text Label 8400 600  0    40   ~ 0
 PB10
-Text Label 10350 6500 0    40   ~ 0
+Text Label 8400 700  0    40   ~ 0
 PB11
-Text Label 10350 6600 0    40   ~ 0
+Text Label 8400 800  0    40   ~ 0
 PB12
-Text Label 10350 6700 0    40   ~ 0
+Text Label 8400 900  0    40   ~ 0
 PB13
-Text Label 10350 6800 0    40   ~ 0
+Text Label 8400 1000 0    40   ~ 0
 PB14
-Text Label 10350 6900 0    40   ~ 0
+Text Label 8400 1100 0    40   ~ 0
 PB15
-NoConn ~ 10600 700 
-NoConn ~ 10600 3600
+NoConn ~ 10450 700 
+NoConn ~ 10450 3600
 $Comp
 L GND #PWR01
 U 1 1 50827354
-P 10300 650
-F 0 "#PWR01" H 10300 650 30  0001 C CNN
-F 1 "GND" H 10300 580 30  0001 C CNN
-	1    10300 650 
-	1    0    0    -1  
+P 10350 600
+F 0 "#PWR01" H 10350 350 50  0001 C CNN
+F 1 "GND" H 10350 450 50  0000 C CNN
+F 2 "" H 10350 600 50  0000 C CNN
+F 3 "" H 10350 600 50  0000 C CNN
+	1    10350 600 
+	0    1    1    0   
 $EndComp
 $Comp
 L GND #PWR02
 U 1 1 50827361
-P 10300 3350
-F 0 "#PWR02" H 10300 3350 30  0001 C CNN
-F 1 "GND" H 10300 3280 30  0001 C CNN
-	1    10300 3350
-	1    0    0    -1  
+P 10150 3300
+F 0 "#PWR02" H 10150 3050 50  0001 C CNN
+F 1 "GND" H 10150 3150 50  0000 C CNN
+F 2 "" H 10150 3300 50  0000 C CNN
+F 3 "" H 10150 3300 50  0000 C CNN
+	1    10150 3300
+	0    1    1    0   
 $EndComp
 $Comp
 L GND #PWR03
 U 1 1 50827367
-P 10300 3550
-F 0 "#PWR03" H 10300 3550 30  0001 C CNN
-F 1 "GND" H 10300 3480 30  0001 C CNN
-	1    10300 3550
-	1    0    0    -1  
+P 10150 3500
+F 0 "#PWR03" H 10150 3250 50  0001 C CNN
+F 1 "GND" H 10150 3350 50  0000 C CNN
+F 2 "" H 10150 3500 50  0000 C CNN
+F 3 "" H 10150 3500 50  0000 C CNN
+	1    10150 3500
+	0    1    1    0   
 $EndComp
 $Comp
 L GND #PWR04
 U 1 1 5082736D
-P 10300 6250
-F 0 "#PWR04" H 10300 6250 30  0001 C CNN
-F 1 "GND" H 10300 6180 30  0001 C CNN
-	1    10300 6250
-	1    0    0    -1  
+P 10150 6200
+F 0 "#PWR04" H 10150 5950 50  0001 C CNN
+F 1 "GND" H 10150 6050 50  0000 C CNN
+F 2 "" H 10150 6200 50  0000 C CNN
+F 3 "" H 10150 6200 50  0000 C CNN
+	1    10150 6200
+	0    1    1    0   
 $EndComp
 $Comp
 L +3.3V #PWR05
 U 1 1 50827375
-P 10300 800
-F 0 "#PWR05" H 10300 760 30  0001 C CNN
-F 1 "+3.3V" H 10300 910 30  0000 C CNN
-	1    10300 800 
+P 10150 800
+F 0 "#PWR05" H 10150 650 50  0001 C CNN
+F 1 "+3.3V" H 10150 940 50  0000 C CNN
+F 2 "" H 10150 800 50  0000 C CNN
+F 3 "" H 10150 800 50  0000 C CNN
+	1    10150 800 
 	0    -1   -1   0   
 $EndComp
 $Comp
 L +5V #PWR06
 U 1 1 50827384
-P 10300 3700
-F 0 "#PWR06" H 10300 3790 20  0001 C CNN
-F 1 "+5V" H 10300 3790 30  0000 C CNN
-	1    10300 3700
+P 10150 3700
+F 0 "#PWR06" H 10150 3550 50  0001 C CNN
+F 1 "+5V" H 10150 3840 50  0000 C CNN
+F 2 "" H 10150 3700 50  0000 C CNN
+F 3 "" H 10150 3700 50  0000 C CNN
+	1    10150 3700
 	0    -1   -1   0   
 $EndComp
-Wire Wire Line
-	10300 6200 10300 6250
-Wire Wire Line
-	10300 3500 10300 3550
-Wire Wire Line
-	10300 3300 10300 3350
-Wire Wire Line
-	10300 600  10300 650 
-Text Label 10350 900  0    40   ~ 0
+Text Label 10200 900  0    40   ~ 0
 VBAT
-Text Label 10350 1000 0    40   ~ 0
+Text Label 10200 1000 0    40   ~ 0
 PC13
-Text Label 10350 1100 0    40   ~ 0
+Text Label 10200 1100 0    40   ~ 0
 PC14
-Text Label 10350 1200 0    40   ~ 0
+Text Label 10200 1200 0    40   ~ 0
 PC15
-Text Label 10350 1300 0    40   ~ 0
+Text Label 10200 1300 0    40   ~ 0
 PD0
-Text Label 10350 1400 0    40   ~ 0
+Text Label 10200 1400 0    40   ~ 0
 PD1
-Text Label 10350 1500 0    40   ~ 0
+Text Label 10200 1500 0    40   ~ 0
 RST
-Text Label 10350 1600 0    40   ~ 0
+Text Label 10200 1600 0    40   ~ 0
 PC0
-Text Label 10350 1700 0    40   ~ 0
+Text Label 10200 1700 0    40   ~ 0
 PC1
-Text Label 10350 1800 0    40   ~ 0
+Text Label 10200 1800 0    40   ~ 0
 PC2
-Text Label 10350 1900 0    40   ~ 0
+Text Label 10200 1900 0    40   ~ 0
 PC3
-Text Label 10350 2000 0    40   ~ 0
+Text Label 10200 2000 0    40   ~ 0
 PA0
-Text Label 10350 2100 0    40   ~ 0
+Text Label 10200 2100 0    40   ~ 0
 PA1
-Text Label 10350 2200 0    40   ~ 0
+Text Label 10200 2200 0    40   ~ 0
 PA2
-Text Label 10350 2300 0    40   ~ 0
+Text Label 10200 2300 0    40   ~ 0
 PA3
-Text Label 10350 2400 0    40   ~ 0
+Text Label 10200 2400 0    40   ~ 0
 PA4
-Text Label 10350 2500 0    40   ~ 0
+Text Label 10200 2500 0    40   ~ 0
 PA5
-Text Label 10350 2600 0    40   ~ 0
+Text Label 10200 2600 0    40   ~ 0
 PA6
-Text Label 10350 2700 0    40   ~ 0
+Text Label 10200 2700 0    40   ~ 0
 PA7
-Text Label 10350 2800 0    40   ~ 0
+Text Label 10200 2800 0    40   ~ 0
 PC4
-Text Label 10350 2900 0    40   ~ 0
+Text Label 10200 2900 0    40   ~ 0
 PC5
-Text Label 10350 3000 0    40   ~ 0
+Text Label 10200 3000 0    40   ~ 0
 PB0
-Text Label 10350 3100 0    40   ~ 0
+Text Label 10200 3100 0    40   ~ 0
 PB1
-Text Label 10350 3200 0    40   ~ 0
+Text Label 10200 3200 0    40   ~ 0
 PB2
-Text Label 10350 3800 0    40   ~ 0
+Text Label 10200 3800 0    40   ~ 0
 PB9
-Text Label 10350 3900 0    40   ~ 0
+Text Label 10200 3900 0    40   ~ 0
 PB8
-Text Label 10350 4000 0    40   ~ 0
+Text Label 10200 4000 0    40   ~ 0
 BOOT
-Text Label 10350 4100 0    40   ~ 0
+Text Label 10200 4100 0    40   ~ 0
 PB7
-Text Label 10350 4200 0    40   ~ 0
+Text Label 10200 4200 0    40   ~ 0
 PB6
-Text Label 10350 4300 0    40   ~ 0
+Text Label 10200 4300 0    40   ~ 0
 PB5
-Text Label 10350 4400 0    40   ~ 0
+Text Label 10200 4400 0    40   ~ 0
 PB4
-Text Label 10350 4500 0    40   ~ 0
+Text Label 10200 4500 0    40   ~ 0
 PB3
-Text Label 10350 4600 0    40   ~ 0
+Text Label 10200 4600 0    40   ~ 0
 PD2
-Text Label 10350 4700 0    40   ~ 0
+Text Label 10200 4700 0    40   ~ 0
 PC12
-Text Label 10350 4800 0    40   ~ 0
+Text Label 10200 4800 0    40   ~ 0
 PC11
-Text Label 10350 4900 0    40   ~ 0
+Text Label 10200 4900 0    40   ~ 0
 PC10
-Text Label 10350 5000 0    40   ~ 0
+Text Label 10200 5000 0    40   ~ 0
 PA15
-Text Label 10350 5100 0    40   ~ 0
+Text Label 10200 5100 0    40   ~ 0
 PA14
-Text Label 10350 5200 0    40   ~ 0
+Text Label 10200 5200 0    40   ~ 0
 PA13
-Text Label 10350 5300 0    40   ~ 0
+Text Label 10200 5300 0    40   ~ 0
 PA12
-Text Label 10350 5400 0    40   ~ 0
+Text Label 10200 5400 0    40   ~ 0
 PA11
-Text Label 10350 5500 0    40   ~ 0
+Text Label 10200 5500 0    40   ~ 0
 PA10
-Text Label 10350 5700 0    40   ~ 0
+Text Label 10200 5700 0    40   ~ 0
 PA8
-Text Label 10350 5600 0    40   ~ 0
+Text Label 10200 5600 0    40   ~ 0
 PA9
-Text Label 10350 5800 0    40   ~ 0
+Text Label 10200 5800 0    40   ~ 0
 PC9
-Text Label 10350 5900 0    40   ~ 0
+Text Label 10200 5900 0    40   ~ 0
 PC8
-Text Label 10350 6000 0    40   ~ 0
+Text Label 10200 6000 0    40   ~ 0
 PC7
-Text Label 10350 6100 0    40   ~ 0
+Text Label 10200 6100 0    40   ~ 0
 PC6
 $EndSCHEMATC

template/ti-stellaris-boosterpack40/boosterpack40-cache.lib

@@ -1,15 +1,18 @@
-EESchema-LIBRARY Version 2.3  Date: Thu 18 Oct 2012 10:04:05 PM PDT
+EESchema-LIBRARY Version 2.3
 #encoding utf-8
 #
 # +5V
 #
-DEF +5V #PWR 0 40 Y Y 1 F P
-F0 "#PWR" 0 90 20 H I C CNN
-F1 "+5V" 0 90 30 H V C CNN
+DEF +5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+5V" 0 140 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
-X +5V 1 0 0 0 U 20 20 0 0 W N
-C 0 50 20 0 1 0 N
-P 4 0 1 0  0 0  0 30  0 30  0 30 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #
@@ -18,6 +21,8 @@ ENDDEF
 DEF CONN_3 K 0 40 Y N 1 F N
 F0 "K" -50 0 50 V V C CNN
 F1 "CONN_3" 50 0 40 V V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
 DRAW
 S -100 150 100 -150 0 1 0 N
 X P1 1 -350 100 250 R 60 60 1 1 P I
@@ -28,12 +33,14 @@ ENDDEF
 #
 # GND
 #
-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "GND" 0 -123 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
-P 4 0 1 0  -50 0  0 -50  50 0  -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 20 30 1 1 W N
 ENDDRAW
 ENDDEF
 #
@@ -42,6 +49,8 @@ ENDDEF
 DEF Ti_Booster_40_J1 J 0 40 Y Y 1 F N
 F0 "J" -50 650 60 H V C CNN
 F1 "Ti_Booster_40_J1" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
 DRAW
 S -300 550 400 -550 0 1 0 N
 X 1.01/Vcc 1 -600 450 300 R 50 50 1 1 W
@@ -62,6 +71,8 @@ ENDDEF
 DEF Ti_Booster_40_J2 J 0 40 Y Y 1 F N
 F0 "J" -50 650 60 H V C CNN
 F1 "Ti_Booster_40_J2" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
 DRAW
 S -300 550 400 -550 0 1 0 N
 X 2.01/GND 1 -600 450 300 R 50 50 1 1 W
@@ -82,6 +93,8 @@ ENDDEF
 DEF Ti_Booster_40_J3 J 0 40 Y Y 1 F N
 F0 "J" -50 650 60 H V C CNN
 F1 "Ti_Booster_40_J3" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
 DRAW
 S -300 550 400 -550 0 1 0 N
 X 3.01/+5V 1 -600 450 300 R 50 50 1 1 W
@@ -102,6 +115,8 @@ ENDDEF
 DEF Ti_Booster_40_J4 J 0 40 Y Y 1 F N
 F0 "J" -50 650 60 H V C CNN
 F1 "Ti_Booster_40_J4" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
 DRAW
 S -300 550 400 -550 0 1 0 N
 X 4.01/PF2 1 -600 450 300 R 50 50 1 1 W
@@ -120,12 +135,14 @@ ENDDEF
 # VCC
 #
 DEF VCC #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 100 30 H I C CNN
-F1 "VCC" 0 100 30 H V C CNN
+F0 "#PWR" 0 -50 40 H I C CNN
+F1 "VCC" 0 133 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
-X VCC 1 0 0 0 U 20 20 0 0 W N
-C 0 50 20 0 1 0 N
-P 3 0 1 0  0 0  0 30  0 30 N
+C 0 75 25 0 1 0 N
+P 2 0 1 0 0 0 0 50 N
+X VCC 1 0 0 0 U 20 30 1 1 W N
 ENDDRAW
 ENDDEF
 #

template/ti-stellaris-boosterpack40/boosterpack40.cmp

@@ -1,38 +0,0 @@
-Cmp-Mod V01 Created by CvPcb (2011-nov-30)-testing date = Thu 18 Oct 2012 09:58:43 PM PDT
-
-BeginCmp
-TimeStamp = /5080DB5C;
-Reference = J1;
-ValeurCmp = TI_BOOSTER_40_J1;
-IdModule  = SIL-10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5080DBF4;
-Reference = J2;
-ValeurCmp = TI_BOOSTER_40_J2;
-IdModule  = SIL-10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5080DC03;
-Reference = J3;
-ValeurCmp = TI_BOOSTER_40_J3;
-IdModule  = SIL-10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5080DC12;
-Reference = J4;
-ValeurCmp = TI_BOOSTER_40_J4;
-IdModule  = SIL-10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5080A33C;
-Reference = J5;
-ValeurCmp = CONN_3;
-IdModule  = SIL-3;
-EndCmp
-
-EndListe

template/ti-stellaris-boosterpack40/boosterpack40.net

@@ -1,68 +1,204 @@
-# EESchema Netlist Version 1.1 created  Thu 18 Oct 2012 09:58:06 PM PDT
-(
- ( /5080A33C $noname  J5 CONN_3 {Lib=CONN_3}
-  (    1 VCC )
-  (    2 GND )
-  (    3 GND )
- )
- ( /5080DB5C $noname  J1 TI_BOOSTER_40_J1 {Lib=TI_BOOSTER_40_J1}
-  (    1 VCC )
-  (    2 ? )
-  (    3 ? )
-  (    4 ? )
-  (    5 ? )
-  (    6 ? )
-  (    7 ? )
-  (    8 ? )
-  (    9 ? )
-  (   10 ? )
- )
- ( /5080DBF4 $noname  J2 TI_BOOSTER_40_J2 {Lib=TI_BOOSTER_40_J2}
-  (    1 GND )
-  (    2 ? )
-  (    3 ? )
-  (    4 ? )
-  (    5 ? )
-  (    6 ? )
-  (    7 ? )
-  (    8 ? )
-  (    9 ? )
-  (   10 ? )
- )
- ( /5080DC03 $noname  J3 TI_BOOSTER_40_J3 {Lib=TI_BOOSTER_40_J3}
-  (    1 +5V )
-  (    2 GND )
-  (    3 ? )
-  (    4 ? )
-  (    5 ? )
-  (    6 ? )
-  (    7 ? )
-  (    8 ? )
-  (    9 ? )
-  (   10 ? )
- )
- ( /5080DC12 $noname  J4 TI_BOOSTER_40_J4 {Lib=TI_BOOSTER_40_J4}
-  (    1 ? )
-  (    2 ? )
-  (    3 ? )
-  (    4 ? )
-  (    5 ? )
-  (    6 ? )
-  (    7 ? )
-  (    8 ? )
-  (    9 ? )
-  (   10 ? )
- )
-)
-*
-{ Pin List by Nets
-Net 8 "GND" "GND"
- J5 3
- J5 2
- J2 1
- J3 2
-Net 27 "VCC" "VCC"
- J5 1
- J1 1
-}
-#End
+(export (version D)
+  (design
+    (source E:\kicad-git\kicad_git_libs\template\ti-stellaris-boosterpack40\boosterpack40.sch)
+    (date "13/12/2016 09:02:22")
+    (tool "Eeschema (2016-12-12 revision b1e37ae)-master")
+    (sheet (number 1) (name /) (tstamps /)
+      (title_block
+        (title)
+        (company)
+        (rev)
+        (date "19 oct 2012")
+        (source boosterpack40.sch)
+        (comment (number 1) (value ""))
+        (comment (number 2) (value ""))
+        (comment (number 3) (value ""))
+        (comment (number 4) (value "")))))
+  (components
+    (comp (ref J5)
+      (value CONN_3)
+      (footprint Connect:SIL-3)
+      (libsource (lib boosterpack40-cache) (part CONN_3))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5080A33C))
+    (comp (ref J1)
+      (value TI_BOOSTER_40_J1)
+      (footprint Connect:SIL-10)
+      (libsource (lib boosterpack) (part Ti_Booster_40_J1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5080DB5C))
+    (comp (ref J2)
+      (value TI_BOOSTER_40_J2)
+      (footprint Connect:SIL-10)
+      (libsource (lib boosterpack) (part Ti_Booster_40_J2))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5080DBF4))
+    (comp (ref J3)
+      (value TI_BOOSTER_40_J3)
+      (footprint Connect:SIL-10)
+      (libsource (lib boosterpack) (part Ti_Booster_40_J3))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5080DC03))
+    (comp (ref J4)
+      (value TI_BOOSTER_40_J4)
+      (footprint Connect:SIL-10)
+      (libsource (lib boosterpack) (part Ti_Booster_40_J4))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5080DC12)))
+  (libparts
+    (libpart (lib boosterpack40-cache) (part CONN_3)
+      (fields
+        (field (name Reference) K)
+        (field (name Value) CONN_3))
+      (pins
+        (pin (num 1) (name P1) (type passive))
+        (pin (num 2) (name PM) (type passive))
+        (pin (num 3) (name P3) (type passive))))
+    (libpart (lib boosterpack) (part Ti_Booster_40_J1)
+      (fields
+        (field (name Reference) J)
+        (field (name Value) Ti_Booster_40_J1))
+      (pins
+        (pin (num 1) (name 1.01/Vcc) (type power_in))
+        (pin (num 2) (name 1.02/PB5) (type BiDi))
+        (pin (num 3) (name 1.03/PB0/Rxd) (type BiDi))
+        (pin (num 4) (name 1.04/PB1/TxD) (type BiDi))
+        (pin (num 5) (name 1.05/PE4) (type BiDi))
+        (pin (num 6) (name 1.06/PE5) (type BiDi))
+        (pin (num 7) (name 1.07/PB4) (type BiDi))
+        (pin (num 8) (name 1.08/PA5) (type BiDi))
+        (pin (num 9) (name 1.09/PA6) (type BiDi))
+        (pin (num 10) (name 1.10/PA7) (type BiDi))))
+    (libpart (lib boosterpack) (part Ti_Booster_40_J2)
+      (fields
+        (field (name Reference) J)
+        (field (name Value) Ti_Booster_40_J2))
+      (pins
+        (pin (num 1) (name 2.01/GND) (type power_in))
+        (pin (num 2) (name 2.02/PB2) (type BiDi))
+        (pin (num 3) (name 2.03/PE0) (type BiDi))
+        (pin (num 4) (name 2.04/PF0) (type BiDi))
+        (pin (num 5) (name 2.05/RESET) (type BiDi))
+        (pin (num 6) (name 2.06/PB7) (type BiDi))
+        (pin (num 7) (name 2.07/PB6) (type BiDi))
+        (pin (num 8) (name 2.08/PA4) (type BiDi))
+        (pin (num 9) (name 2.09/PA3) (type BiDi))
+        (pin (num 10) (name 2.10/PA2) (type BiDi))))
+    (libpart (lib boosterpack) (part Ti_Booster_40_J3)
+      (fields
+        (field (name Reference) J)
+        (field (name Value) Ti_Booster_40_J3))
+      (pins
+        (pin (num 1) (name 3.01/+5V) (type power_in))
+        (pin (num 2) (name 3.02/GND) (type BiDi))
+        (pin (num 3) (name 3.03/PD0) (type BiDi))
+        (pin (num 4) (name 3.04/PD1) (type BiDi))
+        (pin (num 5) (name 3.05/PD2) (type BiDi))
+        (pin (num 6) (name 3.06/PD3) (type BiDi))
+        (pin (num 7) (name 3.07/PE1) (type BiDi))
+        (pin (num 8) (name 3.08/PE2) (type BiDi))
+        (pin (num 9) (name 3.09/PE3) (type BiDi))
+        (pin (num 10) (name 3.10/PF1) (type BiDi))))
+    (libpart (lib boosterpack) (part Ti_Booster_40_J4)
+      (fields
+        (field (name Reference) J)
+        (field (name Value) Ti_Booster_40_J4))
+      (pins
+        (pin (num 1) (name 4.01/PF2) (type power_in))
+        (pin (num 2) (name 4.02/PF3) (type BiDi))
+        (pin (num 3) (name 4.03/PB3) (type BiDi))
+        (pin (num 4) (name 4.04/PC4) (type BiDi))
+        (pin (num 5) (name 4.05/PC5) (type BiDi))
+        (pin (num 6) (name 4.06/PC6) (type BiDi))
+        (pin (num 7) (name 4.07/PC7) (type BiDi))
+        (pin (num 8) (name 4.08/PD6) (type BiDi))
+        (pin (num 9) (name 4.09/PD7) (type BiDi))
+        (pin (num 10) (name 4.10/PF4) (type BiDi)))))
+  (libraries
+    (library (logical boosterpack)
+      (uri E:\kicad-git\kicad_git_libs\template\ti-stellaris-boosterpack40\boosterpack.lib))
+    (library (logical boosterpack40-cache)
+      (uri E:\kicad-git\kicad_git_libs\template\ti-stellaris-boosterpack40\boosterpack40-cache.lib)))
+  (nets
+    (net (code 1) (name "Net-(J3-Pad10)")
+      (node (ref J3) (pin 10)))
+    (net (code 2) (name "Net-(J2-Pad6)")
+      (node (ref J2) (pin 6)))
+    (net (code 3) (name "Net-(J2-Pad7)")
+      (node (ref J2) (pin 7)))
+    (net (code 4) (name "Net-(J2-Pad8)")
+      (node (ref J2) (pin 8)))
+    (net (code 5) (name "Net-(J2-Pad9)")
+      (node (ref J2) (pin 9)))
+    (net (code 6) (name "Net-(J2-Pad10)")
+      (node (ref J2) (pin 10)))
+    (net (code 7) (name +5V)
+      (node (ref J3) (pin 1)))
+    (net (code 8) (name GND)
+      (node (ref J5) (pin 2))
+      (node (ref J5) (pin 3))
+      (node (ref J2) (pin 1))
+      (node (ref J3) (pin 2)))
+    (net (code 9) (name "Net-(J3-Pad3)")
+      (node (ref J3) (pin 3)))
+    (net (code 10) (name "Net-(J3-Pad4)")
+      (node (ref J3) (pin 4)))
+    (net (code 11) (name "Net-(J3-Pad5)")
+      (node (ref J3) (pin 5)))
+    (net (code 12) (name "Net-(J3-Pad6)")
+      (node (ref J3) (pin 6)))
+    (net (code 13) (name "Net-(J3-Pad7)")
+      (node (ref J3) (pin 7)))
+    (net (code 14) (name "Net-(J3-Pad8)")
+      (node (ref J3) (pin 8)))
+    (net (code 15) (name "Net-(J3-Pad9)")
+      (node (ref J3) (pin 9)))
+    (net (code 16) (name "Net-(J2-Pad5)")
+      (node (ref J2) (pin 5)))
+    (net (code 17) (name "Net-(J4-Pad1)")
+      (node (ref J4) (pin 1)))
+    (net (code 18) (name "Net-(J4-Pad2)")
+      (node (ref J4) (pin 2)))
+    (net (code 19) (name "Net-(J4-Pad3)")
+      (node (ref J4) (pin 3)))
+    (net (code 20) (name "Net-(J4-Pad4)")
+      (node (ref J4) (pin 4)))
+    (net (code 21) (name "Net-(J4-Pad5)")
+      (node (ref J4) (pin 5)))
+    (net (code 22) (name "Net-(J4-Pad6)")
+      (node (ref J4) (pin 6)))
+    (net (code 23) (name "Net-(J4-Pad7)")
+      (node (ref J4) (pin 7)))
+    (net (code 24) (name "Net-(J4-Pad8)")
+      (node (ref J4) (pin 8)))
+    (net (code 25) (name "Net-(J4-Pad9)")
+      (node (ref J4) (pin 9)))
+    (net (code 26) (name "Net-(J4-Pad10)")
+      (node (ref J4) (pin 10)))
+    (net (code 27) (name VCC)
+      (node (ref J5) (pin 1))
+      (node (ref J1) (pin 1)))
+    (net (code 28) (name "Net-(J1-Pad2)")
+      (node (ref J1) (pin 2)))
+    (net (code 29) (name "Net-(J1-Pad3)")
+      (node (ref J1) (pin 3)))
+    (net (code 30) (name "Net-(J1-Pad4)")
+      (node (ref J1) (pin 4)))
+    (net (code 31) (name "Net-(J1-Pad5)")
+      (node (ref J1) (pin 5)))
+    (net (code 32) (name "Net-(J1-Pad6)")
+      (node (ref J1) (pin 6)))
+    (net (code 33) (name "Net-(J1-Pad7)")
+      (node (ref J1) (pin 7)))
+    (net (code 34) (name "Net-(J1-Pad8)")
+      (node (ref J1) (pin 8)))
+    (net (code 35) (name "Net-(J1-Pad9)")
+      (node (ref J1) (pin 9)))
+    (net (code 36) (name "Net-(J1-Pad10)")
+      (node (ref J1) (pin 10)))
+    (net (code 37) (name "Net-(J2-Pad2)")
+      (node (ref J2) (pin 2)))
+    (net (code 38) (name "Net-(J2-Pad3)")
+      (node (ref J2) (pin 3)))
+    (net (code 39) (name "Net-(J2-Pad4)")
+      (node (ref J2) (pin 4)))))

template/ti-stellaris-boosterpack40/boosterpack40.pro

@@ -1,6 +1,6 @@
-update=Wed 10 Apr 2013 04:16:40 PM CDT
+update=13/12/2016 08:53:50
 version=1
-last_client=eeschema
+last_client=kicad
 [cvpcb]
 version=1
 NetIExt=net
@@ -41,11 +41,6 @@ version=1
 [eeschema]
 version=1
 LibDir=
-NetFmtName=
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
 [eeschema/libraries]
 LibName1=boosterpack
 LibName2=power
@@ -59,22 +54,21 @@ LibName9=cmos4000
 LibName10=adc-dac
 LibName11=memory
 LibName12=xilinx
-LibName13=special
-LibName14=microcontrollers
-LibName15=dsp
-LibName16=microchip
-LibName17=analog_switches
-LibName18=motorola
-LibName19=texas
-LibName20=intel
-LibName21=audio
-LibName22=interface
-LibName23=digital-audio
-LibName24=philips
-LibName25=display
-LibName26=cypress
-LibName27=siliconi
-LibName28=opto
-LibName29=atmel
-LibName30=contrib
-LibName31=valves
+LibName13=microcontrollers
+LibName14=dsp
+LibName15=microchip
+LibName16=analog_switches
+LibName17=motorola
+LibName18=texas
+LibName19=intel
+LibName20=audio
+LibName21=interface
+LibName22=digital-audio
+LibName23=philips
+LibName24=display
+LibName25=cypress
+LibName26=siliconi
+LibName27=opto
+LibName28=atmel
+LibName29=contrib
+LibName30=valves

template/ti-stellaris-boosterpack40/boosterpack40.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu 18 Oct 2012 10:04:05 PM PDT
+EESchema Schematic File Version 2
 LIBS:boosterpack
 LIBS:power
 LIBS:device
@@ -11,7 +11,6 @@ LIBS:cmos4000
 LIBS:adc-dac
 LIBS:memory
 LIBS:xilinx
-LIBS:special
 LIBS:microcontrollers
 LIBS:dsp
 LIBS:microchip
@@ -31,7 +30,7 @@ LIBS:atmel
 LIBS:contrib
 LIBS:valves
 LIBS:boosterpack40-cache
-EELAYER 27 0
+EELAYER 26 0
 EELAYER END
 $Descr A4 11693 8268
 encoding utf-8
@@ -51,6 +50,8 @@ U 1 1 5080A33C
 P 7600 6800
 F 0 "J5" V 7550 6800 50  0000 C CNN
 F 1 "CONN_3" V 7650 6800 40  0000 C CNN
+F 2 "Connect:SIL-3" H 7600 6800 60  0000 C CNN
+F 3 "" H 7600 6800 60  0001 C CNN
 	1    7600 6800
 	1    0    0    1   
 $EndComp
@@ -64,6 +65,8 @@ U 1 1 5080A56F
 P 7000 6900
 F 0 "#PWR01" H 7000 7000 30  0001 C CNN
 F 1 "VCC" H 7000 7000 30  0000 C CNN
+F 2 "" H 7000 6900 60  0001 C CNN
+F 3 "" H 7000 6900 60  0001 C CNN
 	1    7000 6900
 	0    -1   -1   0   
 $EndComp
@@ -73,6 +76,8 @@ U 1 1 5080A57E
 P 7000 6700
 F 0 "#PWR02" H 7000 6700 30  0001 C CNN
 F 1 "GND" H 7000 6630 30  0001 C CNN
+F 2 "" H 7000 6700 60  0001 C CNN
+F 3 "" H 7000 6700 60  0001 C CNN
 	1    7000 6700
 	0    1    1    0   
 $EndComp
@@ -85,8 +90,10 @@ $Comp
 L GND #PWR03
 U 1 1 5080AA99
 P 9150 2450
-F 0 "#PWR03" H 9150 2450 30  0001 C CNN
-F 1 "GND" H 9150 2380 30  0001 C CNN
+F 0 "#PWR03" H 9150 2200 50  0001 C CNN
+F 1 "GND" H 9150 2300 50  0000 C CNN
+F 2 "" H 9150 2450 50  0000 C CNN
+F 3 "" H 9150 2450 50  0000 C CNN
 	1    9150 2450
 	0    1    1    0   
 $EndComp
@@ -94,44 +101,54 @@ $Comp
 L VCC #PWR04
 U 1 1 5080AA9F
 P 9150 900
-F 0 "#PWR04" H 9150 1000 30  0001 C CNN
-F 1 "VCC" H 9150 1000 30  0000 C CNN
+F 0 "#PWR04" H 9150 750 50  0001 C CNN
+F 1 "VCC" H 9150 1050 50  0000 C CNN
+F 2 "" H 9150 900 50  0000 C CNN
+F 3 "" H 9150 900 50  0000 C CNN
 	1    9150 900 
-	0    -1   -1   0   
+	1    0    0    -1  
 $EndComp
 $Comp
-L TI_BOOSTER_40_J1 J1
+L Ti_Booster_40_J1 J1
 U 1 1 5080DB5C
 P 9750 1350
 F 0 "J1" H 9700 2000 60  0000 C CNN
 F 1 "TI_BOOSTER_40_J1" H 9750 700 60  0000 C CNN
+F 2 "Connect:SIL-10" V 10200 1350 60  0000 C CNN
+F 3 "" H 9750 1350 60  0001 C CNN
 	1    9750 1350
 	1    0    0    -1  
 $EndComp
 $Comp
-L TI_BOOSTER_40_J2 J2
+L Ti_Booster_40_J2 J2
 U 1 1 5080DBF4
 P 9750 2900
 F 0 "J2" H 9700 3550 60  0000 C CNN
 F 1 "TI_BOOSTER_40_J2" H 9750 2250 60  0000 C CNN
+F 2 "Connect:SIL-10" V 10200 2900 60  0000 C CNN
+F 3 "" H 9750 2900 60  0001 C CNN
 	1    9750 2900
 	1    0    0    -1  
 $EndComp
 $Comp
-L TI_BOOSTER_40_J3 J3
+L Ti_Booster_40_J3 J3
 U 1 1 5080DC03
 P 9750 4450
 F 0 "J3" H 9700 5100 60  0000 C CNN
 F 1 "TI_BOOSTER_40_J3" H 9750 3800 60  0000 C CNN
+F 2 "Connect:SIL-10" V 10200 4450 60  0000 C CNN
+F 3 "" H 9750 4450 60  0001 C CNN
 	1    9750 4450
 	1    0    0    -1  
 $EndComp
 $Comp
-L TI_BOOSTER_40_J4 J4
+L Ti_Booster_40_J4 J4
 U 1 1 5080DC12
 P 9750 6000
 F 0 "J4" H 9700 6650 60  0000 C CNN
 F 1 "TI_BOOSTER_40_J4" H 9750 5350 60  0000 C CNN
+F 2 "Connect:SIL-10" V 10200 6000 60  0000 C CNN
+F 3 "" H 9750 6000 60  0001 C CNN
 	1    9750 6000
 	1    0    0    -1  
 $EndComp
@@ -139,8 +156,10 @@ $Comp
 L GND #PWR05
 U 1 1 5080DC79
 P 9150 4100
-F 0 "#PWR05" H 9150 4100 30  0001 C CNN
-F 1 "GND" H 9150 4030 30  0001 C CNN
+F 0 "#PWR05" H 9150 3850 50  0001 C CNN
+F 1 "GND" H 9150 3950 50  0000 C CNN
+F 2 "" H 9150 4100 50  0000 C CNN
+F 3 "" H 9150 4100 50  0000 C CNN
 	1    9150 4100
 	0    1    1    0   
 $EndComp
@@ -148,9 +167,11 @@ $Comp
 L +5V #PWR06
 U 1 1 5080DC8B
 P 9150 4000
-F 0 "#PWR06" H 9150 4090 20  0001 C CNN
-F 1 "+5V" H 9150 4090 30  0000 C CNN
+F 0 "#PWR06" H 9150 3850 50  0001 C CNN
+F 1 "+5V" H 9150 4140 50  0000 C CNN
+F 2 "" H 9150 4000 50  0000 C CNN
+F 3 "" H 9150 4000 50  0000 C CNN
 	1    9150 4000
-	0    -1   -1   0   
+	1    0    0    -1  
 $EndComp
 $EndSCHEMATC

template/ti-stellaris-boosterpack40/boosterpack40_min.kicad_pcb

@@ -1,344 +0,0 @@
-(kicad_pcb (version 3) (host pcbnew "(2013-02-23 BZR 3971)-testing")
-
-  (general
-    (links 1)
-    (no_connects 1)
-    (area 172.984525 104.605002 242.305477 149.137511)
-    (thickness 1.6)
-    (drawings 7)
-    (tracks 0)
-    (zones 0)
-    (modules 4)
-    (nets 4)
-  )
-
-  (page A3)
-  (layers
-    (15 F.Cu signal)
-    (0 B.Cu signal)
-    (16 B.Adhes user)
-    (17 F.Adhes user)
-    (18 B.Paste user)
-    (19 F.Paste user)
-    (20 B.SilkS user)
-    (21 F.SilkS user)
-    (22 B.Mask user)
-    (23 F.Mask user)
-    (24 Dwgs.User user)
-    (25 Cmts.User user)
-    (26 Eco1.User user)
-    (27 Eco2.User user)
-    (28 Edge.Cuts user)
-  )
-
-  (setup
-    (last_trace_width 0.254)
-    (trace_clearance 0.254)
-    (zone_clearance 0.508)
-    (zone_45_only no)
-    (trace_min 0.254)
-    (segment_width 0.20066)
-    (edge_width 0.14986)
-    (via_size 0.889)
-    (via_drill 0.635)
-    (via_min_size 0.889)
-    (via_min_drill 0.508)
-    (uvia_size 0.508)
-    (uvia_drill 0.127)
-    (uvias_allowed no)
-    (uvia_min_size 0.508)
-    (uvia_min_drill 0.127)
-    (pcb_text_width 0.3)
-    (pcb_text_size 1 1)
-    (mod_edge_width 0.14986)
-    (mod_text_size 1 1)
-    (mod_text_width 0.15)
-    (pad_size 1 1)
-    (pad_drill 0.6)
-    (pad_to_mask_clearance 0)
-    (aux_axis_origin 0 0)
-    (visible_elements 7FFFFFFF)
-    (pcbplotparams
-      (layerselection 3178497)
-      (usegerberextensions true)
-      (excludeedgelayer true)
-      (linewidth 152400)
-      (plotframeref false)
-      (viasonmask false)
-      (mode 1)
-      (useauxorigin false)
-      (hpglpennumber 1)
-      (hpglpenspeed 20)
-      (hpglpendiameter 15)
-      (hpglpenoverlay 2)
-      (psnegative false)
-      (psa4output false)
-      (plotreference true)
-      (plotvalue true)
-      (plotothertext true)
-      (plotinvisibletext false)
-      (padsonsilk false)
-      (subtractmaskfromsilk false)
-      (outputformat 1)
-      (mirror false)
-      (drillshape 1)
-      (scaleselection 1)
-      (outputdirectory ""))
-  )
-
-  (net 0 "")
-  (net 1 +5V)
-  (net 2 GND)
-  (net 3 VCC)
-
-  (net_class Default "This is the default net class."
-    (clearance 0.254)
-    (trace_width 0.254)
-    (via_dia 0.889)
-    (via_drill 0.635)
-    (uvia_dia 0.508)
-    (uvia_drill 0.127)
-    (add_net "")
-    (add_net +5V)
-    (add_net GND)
-    (add_net VCC)
-  )
-
-  (module SIL-10 (layer F.Cu) (tedit 5080DEE6) (tstamp 5080DE37)
-    (at 231.14 133.35 270)
-    (descr "Connecteur 10 pins")
-    (tags "CONN DEV")
-    (path /5080DBF4)
-    (fp_text reference J2 (at -13.97 0 360) (layer F.SilkS)
-      (effects (font (size 1.72974 1.08712) (thickness 0.3048)))
-    )
-    (fp_text value TI_BOOSTER_40_J2 (at 6.35 -2.54 270) (layer F.SilkS)
-      (effects (font (size 1.524 1.016) (thickness 0.3048)))
-    )
-    (fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start -12.7 -1.27) (end 12.7 -1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer F.SilkS) (width 0.3048))
-    (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 2 GND)
-    )
-    (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-  )
-
-  (module SIL-10 (layer F.Cu) (tedit 5080DEED) (tstamp 5080DE4A)
-    (at 228.6 133.35 270)
-    (descr "Connecteur 10 pins")
-    (tags "CONN DEV")
-    (path /5080DC12)
-    (fp_text reference J4 (at -13.97 0 360) (layer F.SilkS)
-      (effects (font (size 1.72974 1.08712) (thickness 0.3048)))
-    )
-    (fp_text value TI_BOOSTER_40_J4 (at 6.35 -2.54 270) (layer F.SilkS)
-      (effects (font (size 1.524 1.016) (thickness 0.3048)))
-    )
-    (fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start -12.7 -1.27) (end 12.7 -1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer F.SilkS) (width 0.3048))
-    (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-  )
-
-  (module SIL-10 (layer F.Cu) (tedit 5080DEE0) (tstamp 5080AB71)
-    (at 187.96 133.35 270)
-    (descr "Connecteur 10 pins")
-    (tags "CONN DEV")
-    (path /5080DC03)
-    (fp_text reference J3 (at -13.97 0 360) (layer F.SilkS)
-      (effects (font (size 1.72974 1.08712) (thickness 0.3048)))
-    )
-    (fp_text value TI_BOOSTER_40_J3 (at 6.35 -2.54 270) (layer F.SilkS)
-      (effects (font (size 1.524 1.016) (thickness 0.3048)))
-    )
-    (fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start -12.7 -1.27) (end 12.7 -1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer F.SilkS) (width 0.3048))
-    (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 1 +5V)
-    )
-    (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 2 GND)
-    )
-    (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-  )
-
-  (module SIL-10 (layer F.Cu) (tedit 5080DEDC) (tstamp 5080AB8D)
-    (at 185.42 133.35 270)
-    (descr "Connecteur 10 pins")
-    (tags "CONN DEV")
-    (path /5080DB5C)
-    (fp_text reference J1 (at -13.97 0 360) (layer F.SilkS)
-      (effects (font (size 1.72974 1.08712) (thickness 0.3048)))
-    )
-    (fp_text value TI_BOOSTER_40_J1 (at 6.35 -2.54 270) (layer F.SilkS)
-      (effects (font (size 1.524 1.016) (thickness 0.3048)))
-    )
-    (fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start -12.7 -1.27) (end 12.7 -1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
-    (fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer F.SilkS) (width 0.3048))
-    (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 3 VCC)
-    )
-    (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-    (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-    )
-  )
-
-  (dimension 34.29 (width 0.25) (layer Dwgs.User)
-    (gr_text "1.3500 in" (at 176.800001 130.175 270) (layer Dwgs.User)
-      (effects (font (size 1 1) (thickness 0.25)))
-    )
-    (feature1 (pts (xy 182.88 147.32) (xy 175.800001 147.32)))
-    (feature2 (pts (xy 182.88 113.03) (xy 175.800001 113.03)))
-    (crossbar (pts (xy 177.800001 113.03) (xy 177.800001 147.32)))
-    (arrow1a (pts (xy 177.800001 147.32) (xy 177.213581 146.193497)))
-    (arrow1b (pts (xy 177.800001 147.32) (xy 178.386421 146.193497)))
-    (arrow2a (pts (xy 177.800001 113.03) (xy 177.213581 114.156503)))
-    (arrow2b (pts (xy 177.800001 113.03) (xy 178.386421 114.156503)))
-  )
-  (dimension 8.89 (width 0.25) (layer Dwgs.User)
-    (gr_text "0.3500 in" (at 238.49 117.475 90) (layer Dwgs.User)
-      (effects (font (size 1 1) (thickness 0.25)))
-    )
-    (feature1 (pts (xy 231.14 113.03) (xy 239.49 113.03)))
-    (feature2 (pts (xy 231.14 121.92) (xy 239.49 121.92)))
-    (crossbar (pts (xy 237.49 121.92) (xy 237.49 113.03)))
-    (arrow1a (pts (xy 237.49 113.03) (xy 238.07642 114.156503)))
-    (arrow1b (pts (xy 237.49 113.03) (xy 236.90358 114.156503)))
-    (arrow2a (pts (xy 237.49 121.92) (xy 238.07642 120.793497)))
-    (arrow2b (pts (xy 237.49 121.92) (xy 236.90358 120.793497)))
-  )
-  (gr_line (start 233.68 147.32) (end 182.88 147.32) (angle 90) (layer Edge.Cuts) (width 0.15))
-  (dimension 50.8 (width 0.25) (layer Dwgs.User)
-    (gr_text "2.0000 in" (at 208.28 105.680002) (layer Dwgs.User)
-      (effects (font (size 1 1) (thickness 0.25)))
-    )
-    (feature1 (pts (xy 233.68 113.03) (xy 233.68 104.680002)))
-    (feature2 (pts (xy 182.88 113.03) (xy 182.88 104.680002)))
-    (crossbar (pts (xy 182.88 106.680002) (xy 233.68 106.680002)))
-    (arrow1a (pts (xy 233.68 106.680002) (xy 232.553497 107.266422)))
-    (arrow1b (pts (xy 233.68 106.680002) (xy 232.553497 106.093582)))
-    (arrow2a (pts (xy 182.88 106.680002) (xy 184.006503 107.266422)))
-    (arrow2b (pts (xy 182.88 106.680002) (xy 184.006503 106.093582)))
-  )
-  (gr_line (start 182.88 147.32) (end 182.88 113.03) (angle 90) (layer Edge.Cuts) (width 0.14986))
-  (gr_line (start 233.68 113.03) (end 233.68 147.32) (angle 90) (layer Edge.Cuts) (width 0.14986))
-  (gr_line (start 182.88 113.03) (end 233.68 113.03) (angle 90) (layer Edge.Cuts) (width 0.15))
-
-)

template/ti-stellaris-boosterpack40_min/boosterpack40_min-cache.lib

@@ -1,26 +1,31 @@
-EESchema-LIBRARY Version 2.3  Date: Thu 18 Oct 2012 10:11:13 PM PDT
+EESchema-LIBRARY Version 2.3
 #encoding utf-8
 #
 # +5V
 #
-DEF +5V #PWR 0 40 Y Y 1 F P
-F0 "#PWR" 0 90 20 H I C CNN
-F1 "+5V" 0 90 30 H V C CNN
+DEF +5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+5V" 0 140 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
-X +5V 1 0 0 0 U 20 20 0 0 W N
-C 0 50 20 0 1 0 N
-P 4 0 1 0  0 0  0 30  0 30  0 30 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #
 # GND
 #
-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "GND" 0 -123 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
-P 4 0 1 0  -50 0  0 -50  50 0  -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 20 30 1 1 W N
 ENDDRAW
 ENDDEF
 #
@@ -29,6 +34,8 @@ ENDDEF
 DEF Ti_Booster_40_J1 J 0 40 Y Y 1 F N
 F0 "J" -50 650 60 H V C CNN
 F1 "Ti_Booster_40_J1" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
 DRAW
 S -300 550 400 -550 0 1 0 N
 X 1.01/Vcc 1 -600 450 300 R 50 50 1 1 W
@@ -49,6 +56,8 @@ ENDDEF
 DEF Ti_Booster_40_J2 J 0 40 Y Y 1 F N
 F0 "J" -50 650 60 H V C CNN
 F1 "Ti_Booster_40_J2" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
 DRAW
 S -300 550 400 -550 0 1 0 N
 X 2.01/GND 1 -600 450 300 R 50 50 1 1 W
@@ -69,6 +78,8 @@ ENDDEF
 DEF Ti_Booster_40_J3 J 0 40 Y Y 1 F N
 F0 "J" -50 650 60 H V C CNN
 F1 "Ti_Booster_40_J3" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
 DRAW
 S -300 550 400 -550 0 1 0 N
 X 3.01/+5V 1 -600 450 300 R 50 50 1 1 W
@@ -89,6 +100,8 @@ ENDDEF
 DEF Ti_Booster_40_J4 J 0 40 Y Y 1 F N
 F0 "J" -50 650 60 H V C CNN
 F1 "Ti_Booster_40_J4" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
 DRAW
 S -300 550 400 -550 0 1 0 N
 X 4.01/PF2 1 -600 450 300 R 50 50 1 1 W
@@ -107,12 +120,14 @@ ENDDEF
 # VCC
 #
 DEF VCC #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 100 30 H I C CNN
-F1 "VCC" 0 100 30 H V C CNN
+F0 "#PWR" 0 -50 40 H I C CNN
+F1 "VCC" 0 133 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
-X VCC 1 0 0 0 U 20 20 0 0 W N
-C 0 50 20 0 1 0 N
-P 3 0 1 0  0 0  0 30  0 30 N
+C 0 75 25 0 1 0 N
+P 2 0 1 0 0 0 0 50 N
+X VCC 1 0 0 0 U 20 30 1 1 W N
 ENDDRAW
 ENDDEF
 #