Merge pull request #898 from jkriege2/modify_resistor_3Dmodels
Modify resistor 3 dmodels
This commit is contained in:
commit
b6b3947ee3
242 changed files with 180305 additions and 17064 deletions
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@ -176,7 +176,7 @@ F1 "C" 25 -100 50 H V L CNN
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F2 "" 38 -150 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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C_*
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C_*
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$ENDFPLIST
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DRAW
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P 2 0 1 20 -80 -30 80 -30 N
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@ -5867,7 +5867,7 @@ F2 "" -70 0 50 V V C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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R_*
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Resistor_*
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R_*
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$ENDFPLIST
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DRAW
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S -40 -100 40 100 0 1 10 N
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@ -5958,7 +5958,7 @@ F2 "" -70 0 50 V V C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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R_*
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Resistor_*
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R_*
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$ENDFPLIST
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DRAW
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S -40 -100 40 100 0 1 10 N
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@ -5973,10 +5973,10 @@ ENDDEF
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DEF R_Network03 RN 0 0 N N 1 F N
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F0 "RN" -200 0 50 V V C CNN
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F1 "R_Network03" 200 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP4" 275 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP4" 275 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -100 90 10 0 1 0 F
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@ -6000,10 +6000,10 @@ ENDDEF
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DEF R_Network04 RN 0 0 N N 1 F N
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F0 "RN" -300 0 50 V V C CNN
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F1 "R_Network04" 200 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP5" 275 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP5" 275 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -200 90 10 0 1 0 F
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@ -6031,10 +6031,10 @@ ENDDEF
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DEF R_Network05 RN 0 0 N N 1 F N
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F0 "RN" -300 0 50 V V C CNN
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F1 "R_Network05" 300 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP6" 375 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP6" 375 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -200 90 10 0 1 0 F
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@ -6066,10 +6066,10 @@ ENDDEF
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DEF R_Network06 RN 0 0 N N 1 F N
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F0 "RN" -400 0 50 V V C CNN
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F1 "R_Network06" 300 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP7" 375 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP7" 375 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -300 90 10 0 1 0 F
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@ -6105,10 +6105,10 @@ ENDDEF
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DEF R_Network07 RN 0 0 N N 1 F N
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F0 "RN" -400 0 50 V V C CNN
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F1 "R_Network07" 400 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP8" 475 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP8" 475 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -300 90 10 0 1 0 F
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@ -6148,10 +6148,10 @@ ENDDEF
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DEF R_Network08 RN 0 0 N N 1 F N
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F0 "RN" -500 0 50 V V C CNN
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F1 "R_Network08" 400 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP9" 475 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP9" 475 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -400 90 10 0 1 0 F
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@ -6195,10 +6195,10 @@ ENDDEF
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DEF R_Network09 RN 0 0 N N 1 F N
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F0 "RN" -500 0 50 V V C CNN
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F1 "R_Network09" 500 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP10" 575 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP10" 575 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -400 90 10 0 1 0 F
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@ -6246,10 +6246,10 @@ ENDDEF
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DEF R_Network10 RN 0 0 N N 1 F N
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F0 "RN" -600 0 50 V V C CNN
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F1 "R_Network10" 500 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP11" 575 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP11" 575 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -500 90 10 0 1 0 F
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@ -6301,10 +6301,10 @@ ENDDEF
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DEF R_Network11 RN 0 0 N N 1 F N
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F0 "RN" -600 0 50 V V C CNN
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F1 "R_Network11" 600 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP12" 675 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP12" 675 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -500 90 10 0 1 0 F
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@ -6360,10 +6360,10 @@ ENDDEF
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DEF R_Network12 RN 0 0 N N 1 F N
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F0 "RN" -700 0 50 V V C CNN
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F1 "R_Network12" 600 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP13" 675 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP13" 675 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -600 90 10 0 1 0 F
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@ -6423,10 +6423,10 @@ ENDDEF
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DEF R_Network13 RN 0 0 N N 1 F N
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F0 "RN" -700 0 50 V V C CNN
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F1 "R_Network13" 700 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP14" 775 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP14" 775 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -600 90 10 0 1 0 F
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@ -6490,10 +6490,10 @@ ENDDEF
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DEF R_Network_Dividers_x02_SIP RN 0 0 Y N 1 F N
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F0 "RN" -300 0 50 V V C CNN
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F1 "R_Network_Dividers_x02_SIP" 200 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP4" 275 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP4" 275 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -200 0 10 0 1 0 F
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@ -6526,10 +6526,10 @@ ENDDEF
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DEF R_Network_Dividers_x03_SIP RN 0 0 Y N 1 F N
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F0 "RN" -300 0 50 V V C CNN
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F1 "R_Network_Dividers_x03_SIP" 400 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP5" 475 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP5" 475 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -200 0 10 0 1 0 F
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@ -6572,10 +6572,10 @@ ENDDEF
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DEF R_Network_Dividers_x04_SIP RN 0 0 Y N 1 F N
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F0 "RN" -500 0 50 V V C CNN
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F1 "R_Network_Dividers_x04_SIP" 400 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP6" 475 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP6" 475 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -400 0 10 0 1 0 F
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@ -6628,10 +6628,10 @@ ENDDEF
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DEF R_Network_Dividers_x05_SIP RN 0 0 Y N 1 F N
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F0 "RN" -500 0 50 V V C CNN
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F1 "R_Network_Dividers_x05_SIP" 600 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP7" 675 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP7" 675 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -400 0 10 0 1 0 F
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@ -6694,10 +6694,10 @@ ENDDEF
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DEF R_Network_Dividers_x06_SIP RN 0 0 Y N 1 F N
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F0 "RN" -700 0 50 V V C CNN
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F1 "R_Network_Dividers_x06_SIP" 600 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP8" 675 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP8" 675 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -600 0 10 0 1 0 F
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@ -6770,10 +6770,10 @@ ENDDEF
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DEF R_Network_Dividers_x07_SIP RN 0 0 Y N 1 F N
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F0 "RN" -700 0 50 V V C CNN
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F1 "R_Network_Dividers_x07_SIP" 800 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP9" 875 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP9" 875 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -600 0 10 0 1 0 F
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@ -6856,10 +6856,10 @@ ENDDEF
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DEF R_Network_Dividers_x08_SIP RN 0 0 Y N 1 F N
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F0 "RN" -900 0 50 V V C CNN
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F1 "R_Network_Dividers_x08_SIP" 800 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP10" 875 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP10" 875 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -800 0 10 0 1 0 F
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@ -6952,10 +6952,10 @@ ENDDEF
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DEF R_Network_Dividers_x09_SIP RN 0 0 Y N 1 F N
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F0 "RN" -900 0 50 V V C CNN
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F1 "R_Network_Dividers_x09_SIP" 1000 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP11" 1075 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP11" 1075 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -800 0 10 0 1 0 F
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@ -7058,10 +7058,10 @@ ENDDEF
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DEF R_Network_Dividers_x10_SIP RN 0 0 Y N 1 F N
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F0 "RN" -1100 0 50 V V C CNN
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F1 "R_Network_Dividers_x10_SIP" 1000 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP12" 1075 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP12" 1075 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -1000 0 10 0 1 0 F
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@ -7174,10 +7174,10 @@ ENDDEF
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DEF R_Network_Dividers_x11_SIP RN 0 0 Y N 1 F N
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F0 "RN" -1100 0 50 V V C CNN
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F1 "R_Network_Dividers_x11_SIP" 1200 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP13" 1275 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP13" 1275 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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C -1000 0 10 0 1 0 F
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@ -7351,10 +7351,10 @@ ENDDEF
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DEF R_Pack02_SIP RN 0 0 Y N 1 F N
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F0 "RN" -300 0 50 V V C CNN
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F1 "R_Pack02_SIP" 300 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP4" 375 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP4" 375 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
|
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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S -250 -75 250 175 0 1 10 f
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@ -7405,10 +7405,10 @@ ENDDEF
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DEF R_Pack03_SIP RN 0 0 Y N 1 F N
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F0 "RN" -400 0 50 V V C CNN
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F1 "R_Pack03_SIP" 500 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP6" 575 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP6" 575 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
|
||||
Resistor?Array?SIP*
|
||||
R?Array?SIP*
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||||
$ENDFPLIST
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||||
DRAW
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S -350 -75 450 175 0 1 10 f
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||||
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@ -7468,10 +7468,10 @@ ENDDEF
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|||
DEF R_Pack04_SIP RN 0 0 Y N 1 F N
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F0 "RN" -600 0 50 V V C CNN
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F1 "R_Pack04_SIP" 600 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP8" 675 0 50 V I C CNN
|
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F2 "Resistors_ThroughHole:R_Array_SIP8" 675 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H V C CNN
|
||||
$FPLIST
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||||
Resistor?Array?SIP*
|
||||
R?Array?SIP*
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||||
$ENDFPLIST
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DRAW
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S -550 -75 550 175 0 1 10 f
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@ -7540,10 +7540,10 @@ ENDDEF
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DEF R_Pack05_SIP RN 0 0 Y N 1 F N
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F0 "RN" -700 0 50 V V C CNN
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F1 "R_Pack05_SIP" 800 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP10" 875 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP10" 875 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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||||
$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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S -650 -75 750 175 0 1 10 f
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@ -7621,10 +7621,10 @@ ENDDEF
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DEF R_Pack06_SIP RN 0 0 Y N 1 F N
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F0 "RN" -900 0 50 V V C CNN
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F1 "R_Pack06_SIP" 900 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP12" 975 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP12" 975 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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S -850 -75 850 175 0 1 10 f
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@ -7711,10 +7711,10 @@ ENDDEF
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DEF R_Pack07_SIP RN 0 0 Y N 1 F N
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F0 "RN" -1000 0 50 V V C CNN
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F1 "R_Pack07_SIP" 1100 0 50 V V C CNN
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F2 "Resistors_ThroughHole:Resistor_Array_SIP14" 1175 0 50 V I C CNN
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F2 "Resistors_ThroughHole:R_Array_SIP14" 1175 0 50 V I C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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Resistor?Array?SIP*
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R?Array?SIP*
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$ENDFPLIST
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DRAW
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S -950 -75 1050 175 0 1 10 f
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@ -8010,6 +8010,9 @@ F0 "R" -175 0 50 V V C CNN
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|||
F1 "R_Shunt" -100 0 50 V V C CNN
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F2 "" -70 0 50 V V C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
|
||||
R_*Shunt*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
P 2 0 1 0 0 -100 50 -100 N
|
||||
|
@ -8029,7 +8032,6 @@ F1 "R_Small" 30 -40 50 H V L CNN
|
|||
F2 "" 0 0 50 H V C CNN
|
||||
F3 "" 0 0 50 H V C CNN
|
||||
$FPLIST
|
||||
Resistor_*
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
|
@ -8048,7 +8050,6 @@ F2 "" -70 0 50 V V C CNN
|
|||
F3 "" 0 0 50 H V C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
Resistor_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
|
@ -8307,7 +8308,7 @@ F1 "Thermistor" -100 0 50 V V C BNN
|
|||
F2 "" 0 0 50 H V C CNN
|
||||
F3 "" 0 0 50 H V C CNN
|
||||
$FPLIST
|
||||
R?
|
||||
R_*
|
||||
SM0603
|
||||
SM0805
|
||||
$ENDFPLIST
|
||||
|
@ -8902,7 +8903,7 @@ F1 "Voltage_Divider" -100 0 50 V V C CNN
|
|||
F2 "" 475 0 50 V I C CNN
|
||||
F3 "" 200 0 50 H V C CNN
|
||||
$FPLIST
|
||||
Resistor?Array?SIP*
|
||||
R?Array?SIP*
|
||||
SOT?23
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
|
@ -8928,7 +8929,7 @@ F1 "Voltage_Divider_CenterPin1" -100 0 50 V V C CNN
|
|||
F2 "" 475 0 50 V I C CNN
|
||||
F3 "" 200 0 50 H V C CNN
|
||||
$FPLIST
|
||||
Resistor?Array?SIP*
|
||||
R?Array?SIP*
|
||||
SOT?23
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
|
@ -8954,7 +8955,7 @@ F1 "Voltage_Divider_CenterPin3" -100 0 50 V V C CNN
|
|||
F2 "" 475 0 50 V I C CNN
|
||||
F3 "" 200 0 50 H V C CNN
|
||||
$FPLIST
|
||||
Resistor?Array?SIP*
|
||||
R?Array?SIP*
|
||||
SOT?23
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
|
|
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Add table
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Reference in a new issue