From a2380766fcbb15471d5012b0807a44f612ff3aaf Mon Sep 17 00:00:00 2001
From: Oliver Walters <oliver@currawongeng.com>
Date: Wed, 31 Aug 2016 14:45:36 +1000
Subject: [PATCH] fixed footprint information

---
 library/allegro.lib | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/library/allegro.lib b/library/allegro.lib
index f0a9f90b..69c5727a 100644
--- a/library/allegro.lib
+++ b/library/allegro.lib
@@ -6,10 +6,10 @@ EESchema-LIBRARY Version 2.3
 DEF ACS706ELC-05C U 0 40 Y Y 1 F N
 F0 "U" -300 450 50 H V L CNN
 F1 "ACS706ELC-05C" -300 350 50 H V L CNN
-F2 "SO-8" -300 -350 50 H V L CIN
+F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" -300 -350 50 H I L CIN
 F3 "" 0 0 50 H V C CNN
 $FPLIST
- SO*
+ SOIC*
 $ENDFPLIST
 DRAW
 S -300 300 300 -300 0 1 10 f
@@ -52,9 +52,12 @@ ENDDEF
 DEF ACS712ELCTR-05B-T U 0 30 Y Y 1 F N
 F0 "U" 100 450 50 H V L CNN
 F1 "ACS712ELCTR-05B-T" 100 350 50 H V L CNN
-F2 "SO-8" 0 0 50 H I C CIN
+F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 100 -350 50 H I L CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS ACS712ELCTR-20A-T ACS712ELCTR-30A-T ACS713ELCTR-20A-T ACS713ELCTR-30A-T
+$FPLIST
+ SOIC*Pitch1.27mm
+$ENDFPLIST
 DRAW
 S -300 300 300 -300 0 1 10 f
 X IP+ 1 -400 200 100 R 50 50 1 1 P
@@ -73,12 +76,11 @@ ENDDEF
 DEF ACS722LLCTR-05AB-T U 0 30 Y Y 1 F N
 F0 "U" 100 450 50 H V L CNN
 F1 "ACS722LLCTR-05AB-T" 100 350 50 H V L CNN
-F2 "SO-8" 0 0 50 H V C CIN
+F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 100 -350 50 H I L CIN
 F3 "" 0 0 50 H V C CNN
 ALIAS ACS722LLCTR-10AU-T ACS722LLCTR-10AB-T ACS722LLCTR-20AU-T ACS722LLCTR-20AB-T ACS722LLCTR-40AU-T ACS722LLCTR-40AB-T
 $FPLIST
  SOIC-*
- SO-*
 $ENDFPLIST
 DRAW
 S -300 300 300 -300 0 1 10 f