From d72e9b0a14cf3fb2105b6a645024a255fdbaa23b Mon Sep 17 00:00:00 2001 From: hackscribble Date: Sun, 30 Apr 2017 20:13:26 +0100 Subject: [PATCH 1/8] Deleted symbols to be replaced by aliases. --- library/nxp_armmcu.dcm | 30 --- library/nxp_armmcu.lib | 555 ----------------------------------------- 2 files changed, 585 deletions(-) diff --git a/library/nxp_armmcu.dcm b/library/nxp_armmcu.dcm index 8427a371..92ebd158 100644 --- a/library/nxp_armmcu.dcm +++ b/library/nxp_armmcu.dcm @@ -408,36 +408,6 @@ K ARM, 32bit, CortexM3, M3, NXP, Microcontroller F http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf $ENDCMP # -$CMP LPC1764FBD100 -D LPC1769, 32-bit ARM Cortex-M3 microcontroller, 128 kB Flash, 32 kB SRAM, Ethernet, USB 2.0 Device, CAN -K ARM, 32bit, CortexM3, M3, NXP, Microcontroller -F http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf -$ENDCMP -# -$CMP LPC1765FBD100 -D LPC1769, 32-bit ARM Cortex-M3 microcontroller, 256 kB Flash, 64 kB SRAM, USB 2.0 Host/Device/OTG, CAN, I2S, DAC -K ARM, 32bit, CortexM3, M3, NXP, Microcontroller -F http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf -$ENDCMP -# -$CMP LPC1766FBD100 -D LPC1769, 32-bit ARM Cortex-M3 microcontroller, 256 kB Flash, 64 kB SRAM, Ethernet, USB 2.0 Host/Device/OTG, CAN, I2S, DAC -K ARM, 32bit, CortexM3, M3, NXP, Microcontroller -F http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf -$ENDCMP -# -$CMP LPC1767FBD100 -D LPC1769, 32-bit ARM Cortex-M3 microcontroller, 512 kB Flash, 64 kB SRAM, Ethernet, I2S, DAC -K ARM, 32bit, CortexM3, M3, NXP, Microcontroller -F http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf -$ENDCMP -# -$CMP LPC1769FBD100 -D LPC1769, 32-bit ARM Cortex-M3 microcontroller, 512 kB Flash, 64 kB SRAM, Ethernet, USB 2.0 Host/Device/OTG, CAN, I2S, DAC -K ARM, 32bit, CortexM3, M3, NXP, Microcontroller -F http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf -$ENDCMP -# $CMP LPC812M101JD20 D LPC81xM, 30MHz Cortex-M0+ MCU, 16kB Flash, 4kB SRAM, USART, I2C, SPI, ACMP, SOIC-20 K nxp lpc arm microcontroller cortex diff --git a/library/nxp_armmcu.lib b/library/nxp_armmcu.lib index 04bfea37..427e7f18 100644 --- a/library/nxp_armmcu.lib +++ b/library/nxp_armmcu.lib @@ -429,561 +429,6 @@ X RTCK 100 -1200 2350 150 R 35 35 1 1 O ENDDRAW ENDDEF # -# LPC1764FBD100 -# -DEF LPC1764FBD100 U 0 40 Y Y 1 F N -F0 "U" -1000 2500 50 H V C CNN -F1 "LPC1764FBD100" 850 -2600 50 H V C CNN -F2 "LQFP100" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -DRAW -S -1050 2450 1050 -2550 0 1 0 f -X TDO/SWO 1 -1200 2250 150 R 35 35 1 1 O -X TDI 2 -1200 2150 150 R 35 35 1 1 I -X TMS/SWDIO 3 -1200 2050 150 R 35 35 1 1 B -X ~TRST~ 4 -1200 1950 150 R 35 35 1 1 I -X TCK/SWDCLK 5 -1200 1850 150 R 35 35 1 1 I -X P0[26]/AD0[3]/RXD3 6 -1200 -1000 150 R 35 35 1 1 B -X P0[25]/AD0[2]/TXD3 7 -1200 -900 150 R 35 35 1 1 B -X P0[24]/AD0[1]/CAP3[1] 8 -1200 -800 150 R 35 35 1 1 B -X P0[23]/AD0[0]/CAP3[0] 9 -1200 -700 150 R 35 35 1 1 B -X VDDA 10 400 2600 150 D 35 35 1 1 I -X P1[31]/SCK1/AD0[5] 20 1200 -50 150 L 35 35 1 1 B -X P0[30]/USB_D- 30 -1200 -1400 150 R 35 35 1 1 B -X P1[26]/MCOB1/PWM1[6]/CAP0[0] 40 1200 450 150 L 35 35 1 1 B -X P2[13]/~EINT3~ 50 1200 1750 150 L 35 35 1 1 B -X P0[18]/DCD1/MOSI0/MOSI 60 -1200 -200 150 R 35 35 1 1 B -X P2[3]/PWM1[4]/DCD1/TRACEDATA[2] 70 1200 -550 150 L 35 35 1 1 B -X P0[5]/I2SRX_WS/TD2/CAP2[1] 80 -1200 800 150 R 35 35 1 1 B -X P1[10]/ENET_RXD1 90 1200 1850 150 L 35 35 1 1 B -X VSSA 11 400 -2700 150 U 35 35 1 1 W -X P1[30]/VBUS/AD0[4] 21 1200 50 150 L 35 35 1 1 B -X VSS 31 -200 -2700 150 U 35 35 1 1 W -X VSS 41 100 -2700 150 U 35 35 1 1 W -X P2[12]/~EINT2~ 51 1200 -1450 150 L 35 35 1 1 B -X P0[17]/CTS1/MISO0/MISO 61 -1200 -100 150 R 35 35 1 1 B -X VDD(3V3) 71 -200 2600 150 D 35 35 1 1 W -X P0[4]/I2SRX_CLK/RD2/CAP2[0] 81 -1200 900 150 R 35 35 1 1 B -X P1[9]/ENET_RXD0 91 1200 1950 150 L 35 35 1 1 B -X VREFP 12 1200 -2250 150 L 35 35 1 1 W -X XTAL1 22 -1200 -1600 150 R 35 35 1 1 I -X P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] 32 1200 1250 150 L 35 35 1 1 B -X VDD(REG)(3V3) 42 200 2600 150 D 35 35 1 1 W -X P2[11]/~EINT1~ 52 1200 -1350 150 L 35 35 1 1 B -X P0[15]/TXD1/SCK0/SCK 62 -1200 100 150 R 35 35 1 1 B -X VSS 72 0 -2700 150 U 35 35 1 1 W -X P4[28]/MAT2[0]/TXD3 82 1200 -1950 150 L 35 35 1 1 B -X P1[8]/ENET_CRS 92 1200 2050 150 L 35 35 1 1 B -X XTAL2 23 -1200 -1750 150 R 35 35 1 1 I -X P1[19]/MCOA0/CAP1[1] 33 1200 1150 150 L 35 35 1 1 B -X P1[27]/CLKOUT/CAP0[1] 43 1200 350 150 L 35 35 1 1 B -X P2[10]/~EINT0~/NMI 53 1200 -1250 150 L 35 35 1 1 B -X P0[16]/RXD1/SSEL0/SSEL 63 -1200 0 150 R 35 35 1 1 B -X P2[2]/PWM1[3]/CTS1/TRACEDATA[3] 73 1200 -450 150 L 35 35 1 1 B -X VSS 83 -400 -2700 150 U 35 35 1 1 W -X P1[4]/ENET_TX_EN 93 1200 2150 150 L 35 35 1 1 B -X ~RSTOUT~ 14 -1200 1500 150 R 35 35 1 1 O -X P0[28]/SCL0/USB_SCL 24 -1200 -1200 150 R 35 35 1 1 B -X P1[20]/MCI0/PWM1[2]/SCK0 34 1200 1050 150 L 35 35 1 1 B -X P1[28]/MCOA2/PCAP1[0]/MAT0[0] 44 1200 250 150 L 35 35 1 1 B -X VDD(3V3) 54 -300 2600 150 D 35 35 1 1 W -X P2[9]/USB_CONNECT/RXD2 64 1200 -1150 150 L 35 35 1 1 B -X P2[1]/PWM1[2]/RXD1 74 1200 -350 150 L 35 35 1 1 B -X VDD(REG)(3V3) 84 100 2600 150 D 35 35 1 1 W -X P1[1]/ENET_TDX1 94 1200 2250 150 L 35 35 1 1 B -X VREFN 15 1200 -2450 150 L 35 35 1 1 W -X P0[27]/SDA0/USB_SDA 25 -1200 -1100 150 R 35 35 1 1 B -X P1[21]/~MCABORT~/PWM1[3]/SSEL0 35 1200 950 150 L 35 35 1 1 B -X P1[29]/MCOB2/PCAP1[1]/MAT0[1] 45 1200 150 150 L 35 35 1 1 B -X VSS 55 -300 -2700 150 U 35 35 1 1 W -X P2[8]/TD2/TXD2 65 1200 -1050 150 L 35 35 1 1 B -X P2[0]/PWM1[1]/TXD1 75 1200 -250 150 L 35 35 1 1 B -X P4[29]/MAT2[1]/RXD3 85 1200 -2050 150 L 35 35 1 1 B -X P1[0]/ENET_TXD0 95 1200 2350 150 L 35 35 1 1 B -X RTCX1 16 -1200 -1950 150 R 35 35 1 1 I -X P3[26]/STCLK/MAT0[1]/PWM1[3] 26 1200 -1750 150 L 35 35 1 1 B -X P1[22]/MCOB0/MAT1[0] 36 1200 850 150 L 35 35 1 1 B -X P0[0]/RD1/TXD3/SDA1 46 -1200 1300 150 R 35 35 1 1 B -X P0[22]/RTS1/TD1 56 -1200 -600 150 R 35 35 1 1 B -X P2[7]/RD2/RTS1 66 1200 -950 150 L 35 35 1 1 B -X P0[9]/MOSI1/MAT2[3] 76 -1200 400 150 R 35 35 1 1 B -X P1[17]/ENET_MDIO 86 1200 1350 150 L 35 35 1 1 B -X VDD(3V3) 96 -100 2600 150 D 35 35 1 1 W -X ~RESET~ 17 -1200 1650 150 R 35 35 1 1 I -X P3[25]/MAT0[0]/PWM1[2] 27 1200 -1650 150 L 35 35 1 1 B -X P1[23]/MCI1/PWM1[4]/MISO0 37 1200 750 150 L 35 35 1 1 B -X P0[1]/TD1/RXD3/SCL1 47 -1200 1200 150 R 35 35 1 1 B -X P0[21]/RI1/RD1 57 -1200 -500 150 R 35 35 1 1 B -X P2[6]/PCAP1[0]/RI1/TRACECLK 67 1200 -850 150 L 35 35 1 1 B -X P0[8]/MISO1/MAT2[2] 77 -1200 500 150 R 35 35 1 1 B -X P1[16]/ENET_MDC 87 1200 1450 150 L 35 35 1 1 B -X VSS 97 -100 -2700 150 U 35 35 1 1 W -X RTCX2 18 -1200 -2100 150 R 35 35 1 1 O -X VDD(3V3) 28 -400 2600 150 D 35 35 1 1 W -X P1[24]/MCI2/PWM1[5]/MOSI0 38 1200 650 150 L 35 35 1 1 B -X P0[10]/TXD2/SDA2/MAT3[0] 48 -1200 300 150 R 35 35 1 1 B -X P0[20]/DTR1/SCL1 58 -1200 -400 150 R 35 35 1 1 B -X P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 68 1200 -750 150 L 35 35 1 1 B -X P0[7]/SCK1/MAT2[1] 78 -1200 600 150 R 35 35 1 1 B -X P1[15]/ENET_REF_CLK 88 1200 1550 150 L 35 35 1 1 B -X P0[2]/TXD0/AD0[7] 98 -1200 1100 150 R 35 35 1 1 B -X VBAT 19 -1200 -2350 150 R 35 35 1 1 I -X P0[29]/USB_D+ 29 -1200 -1300 150 R 35 35 1 1 B -X P1[25]/MCOA1/MAT1[1] 39 1200 550 150 L 35 35 1 1 B -X P0[11]/RXD2/SCL2/MAT3[1] 49 -1200 200 150 R 35 35 1 1 B -X P0[19]/DSR1/SDA1 59 -1200 -300 150 R 35 35 1 1 B -X P2[4]/PWM1[5]/DSR1/TRACEDATA[1] 69 1200 -650 150 L 35 35 1 1 B -X P0[6]/SSEL1/MAT2[0] 79 -1200 700 150 R 35 35 1 1 B -X P1[14]/ENET_RX_ER 89 1200 1650 150 L 35 35 1 1 B -X P0[3]/RXD0/AD0[6] 99 -1200 1000 150 R 35 35 1 1 B -X RTCK 100 -1200 2350 150 R 35 35 1 1 O -ENDDRAW -ENDDEF -# -# LPC1765FBD100 -# -DEF LPC1765FBD100 U 0 40 Y Y 1 F N -F0 "U" -1000 2500 50 H V C CNN -F1 "LPC1765FBD100" 850 -2600 50 H V C CNN -F2 "LQFP100" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -DRAW -S -1050 2450 1050 -2550 0 1 0 f -X TDO/SWO 1 -1200 2250 150 R 35 35 1 1 O -X TDI 2 -1200 2150 150 R 35 35 1 1 I -X TMS/SWDIO 3 -1200 2050 150 R 35 35 1 1 B -X ~TRST~ 4 -1200 1950 150 R 35 35 1 1 I -X TCK/SWDCLK 5 -1200 1850 150 R 35 35 1 1 I -X P0[26]/AD0[3]/AOUT/RXD3 6 -1200 -1000 150 R 35 35 1 1 B -X P0[25]/AD0[2]/I2SRX_SDA/TXD3 7 -1200 -900 150 R 35 35 1 1 B -X P0[24]/AD0[1]/I2SRX_WS/CAP3[1] 8 -1200 -800 150 R 35 35 1 1 B -X P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] 9 -1200 -700 150 R 35 35 1 1 B -X VDDA 10 400 2600 150 D 35 35 1 1 I -X P1[31]/SCK1/AD0[5] 20 1200 -50 150 L 35 35 1 1 B -X P0[30]/USB_D- 30 -1200 -1400 150 R 35 35 1 1 B -X P1[26]/MCOB1/PWM1[6]/CAP0[0] 40 1200 450 150 L 35 35 1 1 B -X P2[13]/~EINT3~/I2STX_SDA 50 1200 1750 150 L 35 35 1 1 B -X P0[18]/DCD1/MOSI0/MOSI 60 -1200 -200 150 R 35 35 1 1 B -X P2[3]/PWM1[4]/DCD1/TRACEDATA[2] 70 1200 -550 150 L 35 35 1 1 B -X P0[5]/I2SRX_WS/TD2/CAP2[1] 80 -1200 800 150 R 35 35 1 1 B -X P1[10] 90 1200 1850 150 L 35 35 1 1 B -X VSSA 11 400 -2700 150 U 35 35 1 1 W -X P1[30]/VBUS/AD0[4] 21 1200 50 150 L 35 35 1 1 B -X VSS 31 -200 -2700 150 U 35 35 1 1 W -X VSS 41 100 -2700 150 U 35 35 1 1 W -X P2[12]/~EINT2~/I2STX_WS 51 1200 -1450 150 L 35 35 1 1 B -X P0[17]/CTS1/MISO0/MISO 61 -1200 -100 150 R 35 35 1 1 B -X VDD(3V3) 71 -200 2600 150 D 35 35 1 1 W -X P0[4]/I2SRX_CLK/RD2/CAP2[0] 81 -1200 900 150 R 35 35 1 1 B -X P1[9] 91 1200 1950 150 L 35 35 1 1 B -X VREFP 12 1200 -2250 150 L 35 35 1 1 W -X XTAL1 22 -1200 -1600 150 R 35 35 1 1 I -X P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] 32 1200 1250 150 L 35 35 1 1 B -X VDD(REG)(3V3) 42 200 2600 150 D 35 35 1 1 W -X P2[11]/~EINT1~/I2STX_CLK 52 1200 -1350 150 L 35 35 1 1 B -X P0[15]/TXD1/SCK0/SCK 62 -1200 100 150 R 35 35 1 1 B -X VSS 72 0 -2700 150 U 35 35 1 1 W -X P4[28]/RX_MCLK/MAT2[0]/TXD3 82 1200 -1950 150 L 35 35 1 1 B -X P1[8] 92 1200 2050 150 L 35 35 1 1 B -X XTAL2 23 -1200 -1750 150 R 35 35 1 1 I -X P1[19]/MCOA0/~USB_PPWR~/CAP1[1] 33 1200 1150 150 L 35 35 1 1 B -X P1[27]/CLKOUT/~USB_OVRCR~/CAP0[1] 43 1200 350 150 L 35 35 1 1 B -X P2[10]/~EINT0~/NMI 53 1200 -1250 150 L 35 35 1 1 B -X P0[16]/RXD1/SSEL0/SSEL 63 -1200 0 150 R 35 35 1 1 B -X P2[2]/PWM1[3]/CTS1/TRACEDATA[3] 73 1200 -450 150 L 35 35 1 1 B -X VSS 83 -400 -2700 150 U 35 35 1 1 W -X P1[4] 93 1200 2150 150 L 35 35 1 1 B -X ~RSTOUT~ 14 -1200 1500 150 R 35 35 1 1 O -X P0[28]/SCL0/USB_SCL 24 -1200 -1200 150 R 35 35 1 1 B -X P1[20]/MCI0/PWM1[2]/SCK0 34 1200 1050 150 L 35 35 1 1 B -X P1[28]/MCOA2/PCAP1[0]/MAT0[0] 44 1200 250 150 L 35 35 1 1 B -X VDD(3V3) 54 -300 2600 150 D 35 35 1 1 W -X P2[9]/USB_CONNECT/RXD2 64 1200 -1150 150 L 35 35 1 1 B -X P2[1]/PWM1[2]/RXD1 74 1200 -350 150 L 35 35 1 1 B -X VDD(REG)(3V3) 84 100 2600 150 D 35 35 1 1 W -X P1[1] 94 1200 2250 150 L 35 35 1 1 B -X VREFN 15 1200 -2450 150 L 35 35 1 1 W -X P0[27]/SDA0/USB_SDA 25 -1200 -1100 150 R 35 35 1 1 B -X P1[21]/~MCABORT~/PWM1[3]/SSEL0 35 1200 950 150 L 35 35 1 1 B -X P1[29]/MCOB2/PCAP1[1]/MAT0[1] 45 1200 150 150 L 35 35 1 1 B -X VSS 55 -300 -2700 150 U 35 35 1 1 W -X P2[8]/TD2/TXD2 65 1200 -1050 150 L 35 35 1 1 B -X P2[0]/PWM1[1]/TXD1 75 1200 -250 150 L 35 35 1 1 B -X P4[29]/TX_MCLK/MAT2[1]/RXD3 85 1200 -2050 150 L 35 35 1 1 B -X P1[0] 95 1200 2350 150 L 35 35 1 1 B -X RTCX1 16 -1200 -1950 150 R 35 35 1 1 I -X P3[26]/STCLK/MAT0[1]/PWM1[3] 26 1200 -1750 150 L 35 35 1 1 B -X P1[22]/MCOB0/USB_PWRD/MAT1[0] 36 1200 850 150 L 35 35 1 1 B -X P0[0]/RD1/TXD3/SDA1 46 -1200 1300 150 R 35 35 1 1 B -X P0[22]/RTS1/TD1 56 -1200 -600 150 R 35 35 1 1 B -X P2[7]/RD2/RTS1 66 1200 -950 150 L 35 35 1 1 B -X P0[9]/I2STX_SDA/MOSI1/MAT2[3] 76 -1200 400 150 R 35 35 1 1 B -X P1[17] 86 1200 1350 150 L 35 35 1 1 B -X VDD(3V3) 96 -100 2600 150 D 35 35 1 1 W -X ~RESET~ 17 -1200 1650 150 R 35 35 1 1 I -X P3[25]/MAT0[0]/PWM1[2] 27 1200 -1650 150 L 35 35 1 1 B -X P1[23]/MCI1/PWM1[4]/MISO0 37 1200 750 150 L 35 35 1 1 B -X P0[1]/TD1/RXD3/SCL1 47 -1200 1200 150 R 35 35 1 1 B -X P0[21]/RI1/RD1 57 -1200 -500 150 R 35 35 1 1 B -X P2[6]/PCAP1[0]/RI1/TRACECLK 67 1200 -850 150 L 35 35 1 1 B -X P0[8]/I2STX_WS/MISO1/MAT2[2] 77 -1200 500 150 R 35 35 1 1 B -X P1[16] 87 1200 1450 150 L 35 35 1 1 B -X VSS 97 -100 -2700 150 U 35 35 1 1 W -X RTCX2 18 -1200 -2100 150 R 35 35 1 1 O -X VDD(3V3) 28 -400 2600 150 D 35 35 1 1 W -X P1[24]/MCI2/PWM1[5]/MOSI0 38 1200 650 150 L 35 35 1 1 B -X P0[10]/TXD2/SDA2/MAT3[0] 48 -1200 300 150 R 35 35 1 1 B -X P0[20]/DTR1/SCL1 58 -1200 -400 150 R 35 35 1 1 B -X P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 68 1200 -750 150 L 35 35 1 1 B -X P0[7]/I2STX_CLK/SCK1/MAT2[1] 78 -1200 600 150 R 35 35 1 1 B -X P1[15] 88 1200 1550 150 L 35 35 1 1 B -X P0[2]/TXD0/AD0[7] 98 -1200 1100 150 R 35 35 1 1 B -X VBAT 19 -1200 -2350 150 R 35 35 1 1 I -X P0[29]/USB_D+ 29 -1200 -1300 150 R 35 35 1 1 B -X P1[25]/MCOA1/MAT1[1] 39 1200 550 150 L 35 35 1 1 B -X P0[11]/RXD2/SCL2/MAT3[1] 49 -1200 200 150 R 35 35 1 1 B -X P0[19]/DSR1/SDA1 59 -1200 -300 150 R 35 35 1 1 B -X P2[4]/PWM1[5]/DSR1/TRACEDATA[1] 69 1200 -650 150 L 35 35 1 1 B -X P0[6]/I2SRX_SDA/SSEL1/MAT2[0] 79 -1200 700 150 R 35 35 1 1 B -X P1[14] 89 1200 1650 150 L 35 35 1 1 B -X P0[3]/RXD0/AD0[6] 99 -1200 1000 150 R 35 35 1 1 B -X RTCK 100 -1200 2350 150 R 35 35 1 1 O -ENDDRAW -ENDDEF -# -# LPC1766FBD100 -# -DEF LPC1766FBD100 U 0 40 Y Y 1 F N -F0 "U" -1000 2500 50 H V C CNN -F1 "LPC1766FBD100" 850 -2600 50 H V C CNN -F2 "LQFP100" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -DRAW -S -1050 2450 1050 -2550 0 1 0 f -X TDO/SWO 1 -1200 2250 150 R 35 35 1 1 O -X TDI 2 -1200 2150 150 R 35 35 1 1 I -X TMS/SWDIO 3 -1200 2050 150 R 35 35 1 1 B -X ~TRST~ 4 -1200 1950 150 R 35 35 1 1 I -X TCK/SWDCLK 5 -1200 1850 150 R 35 35 1 1 I -X P0[26]/AD0[3]/AOUT/RXD3 6 -1200 -1000 150 R 35 35 1 1 B -X P0[25]/AD0[2]/I2SRX_SDA/TXD3 7 -1200 -900 150 R 35 35 1 1 B -X P0[24]/AD0[1]/I2SRX_WS/CAP3[1] 8 -1200 -800 150 R 35 35 1 1 B -X P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] 9 -1200 -700 150 R 35 35 1 1 B -X VDDA 10 400 2600 150 D 35 35 1 1 I -X P1[31]/SCK1/AD0[5] 20 1200 -50 150 L 35 35 1 1 B -X P0[30]/USB_D- 30 -1200 -1400 150 R 35 35 1 1 B -X P1[26]/MCOB1/PWM1[6]/CAP0[0] 40 1200 450 150 L 35 35 1 1 B -X P2[13]/~EINT3~/I2STX_SDA 50 1200 1750 150 L 35 35 1 1 B -X P0[18]/DCD1/MOSI0/MOSI 60 -1200 -200 150 R 35 35 1 1 B -X P2[3]/PWM1[4]/DCD1/TRACEDATA[2] 70 1200 -550 150 L 35 35 1 1 B -X P0[5]/I2SRX_WS/TD2/CAP2[1] 80 -1200 800 150 R 35 35 1 1 B -X P1[10]/ENET_RXD1 90 1200 1850 150 L 35 35 1 1 B -X VSSA 11 400 -2700 150 U 35 35 1 1 W -X P1[30]/VBUS/AD0[4] 21 1200 50 150 L 35 35 1 1 B -X VSS 31 -200 -2700 150 U 35 35 1 1 W -X VSS 41 100 -2700 150 U 35 35 1 1 W -X P2[12]/~EINT2~/I2STX_WS 51 1200 -1450 150 L 35 35 1 1 B -X P0[17]/CTS1/MISO0/MISO 61 -1200 -100 150 R 35 35 1 1 B -X VDD(3V3) 71 -200 2600 150 D 35 35 1 1 W -X P0[4]/I2SRX_CLK/RD2/CAP2[0] 81 -1200 900 150 R 35 35 1 1 B -X P1[9]/ENET_RXD0 91 1200 1950 150 L 35 35 1 1 B -X VREFP 12 1200 -2250 150 L 35 35 1 1 W -X XTAL1 22 -1200 -1600 150 R 35 35 1 1 I -X P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] 32 1200 1250 150 L 35 35 1 1 B -X VDD(REG)(3V3) 42 200 2600 150 D 35 35 1 1 W -X P2[11]/~EINT1~/I2STX_CLK 52 1200 -1350 150 L 35 35 1 1 B -X P0[15]/TXD1/SCK0/SCK 62 -1200 100 150 R 35 35 1 1 B -X VSS 72 0 -2700 150 U 35 35 1 1 W -X P4[28]/RX_MCLK/MAT2[0]/TXD3 82 1200 -1950 150 L 35 35 1 1 B -X P1[8]/ENET_CRS 92 1200 2050 150 L 35 35 1 1 B -X XTAL2 23 -1200 -1750 150 R 35 35 1 1 I -X P1[19]/MCOA0/~USB_PPWR~/CAP1[1] 33 1200 1150 150 L 35 35 1 1 B -X P1[27]/CLKOUT/~USB_OVRCR~/CAP0[1] 43 1200 350 150 L 35 35 1 1 B -X P2[10]/~EINT0~/NMI 53 1200 -1250 150 L 35 35 1 1 B -X P0[16]/RXD1/SSEL0/SSEL 63 -1200 0 150 R 35 35 1 1 B -X P2[2]/PWM1[3]/CTS1/TRACEDATA[3] 73 1200 -450 150 L 35 35 1 1 B -X VSS 83 -400 -2700 150 U 35 35 1 1 W -X P1[4]/ENET_TX_EN 93 1200 2150 150 L 35 35 1 1 B -X ~RSTOUT~ 14 -1200 1500 150 R 35 35 1 1 O -X P0[28]/SCL0/USB_SCL 24 -1200 -1200 150 R 35 35 1 1 B -X P1[20]/MCI0/PWM1[2]/SCK0 34 1200 1050 150 L 35 35 1 1 B -X P1[28]/MCOA2/PCAP1[0]/MAT0[0] 44 1200 250 150 L 35 35 1 1 B -X VDD(3V3) 54 -300 2600 150 D 35 35 1 1 W -X P2[9]/USB_CONNECT/RXD2 64 1200 -1150 150 L 35 35 1 1 B -X P2[1]/PWM1[2]/RXD1 74 1200 -350 150 L 35 35 1 1 B -X VDD(REG)(3V3) 84 100 2600 150 D 35 35 1 1 W -X P1[1]/ENET_TDX1 94 1200 2250 150 L 35 35 1 1 B -X VREFN 15 1200 -2450 150 L 35 35 1 1 W -X P0[27]/SDA0/USB_SDA 25 -1200 -1100 150 R 35 35 1 1 B -X P1[21]/~MCABORT~/PWM1[3]/SSEL0 35 1200 950 150 L 35 35 1 1 B -X P1[29]/MCOB2/PCAP1[1]/MAT0[1] 45 1200 150 150 L 35 35 1 1 B -X VSS 55 -300 -2700 150 U 35 35 1 1 W -X P2[8]/TD2/TXD2 65 1200 -1050 150 L 35 35 1 1 B -X P2[0]/PWM1[1]/TXD1 75 1200 -250 150 L 35 35 1 1 B -X P4[29]/TX_MCLK/MAT2[1]/RXD3 85 1200 -2050 150 L 35 35 1 1 B -X P1[0]/ENET_TXD0 95 1200 2350 150 L 35 35 1 1 B -X RTCX1 16 -1200 -1950 150 R 35 35 1 1 I -X P3[26]/STCLK/MAT0[1]/PWM1[3] 26 1200 -1750 150 L 35 35 1 1 B -X P1[22]/MCOB0/USB_PWRD/MAT1[0] 36 1200 850 150 L 35 35 1 1 B -X P0[0]/RD1/TXD3/SDA1 46 -1200 1300 150 R 35 35 1 1 B -X P0[22]/RTS1/TD1 56 -1200 -600 150 R 35 35 1 1 B -X P2[7]/RD2/RTS1 66 1200 -950 150 L 35 35 1 1 B -X P0[9]/I2STX_SDA/MOSI1/MAT2[3] 76 -1200 400 150 R 35 35 1 1 B -X P1[17]/ENET_MDIO 86 1200 1350 150 L 35 35 1 1 B -X VDD(3V3) 96 -100 2600 150 D 35 35 1 1 W -X ~RESET~ 17 -1200 1650 150 R 35 35 1 1 I -X P3[25]/MAT0[0]/PWM1[2] 27 1200 -1650 150 L 35 35 1 1 B -X P1[23]/MCI1/PWM1[4]/MISO0 37 1200 750 150 L 35 35 1 1 B -X P0[1]/TD1/RXD3/SCL1 47 -1200 1200 150 R 35 35 1 1 B -X P0[21]/RI1/RD1 57 -1200 -500 150 R 35 35 1 1 B -X P2[6]/PCAP1[0]/RI1/TRACECLK 67 1200 -850 150 L 35 35 1 1 B -X P0[8]/I2STX_WS/MISO1/MAT2[2] 77 -1200 500 150 R 35 35 1 1 B -X P1[16]/ENET_MDC 87 1200 1450 150 L 35 35 1 1 B -X VSS 97 -100 -2700 150 U 35 35 1 1 W -X RTCX2 18 -1200 -2100 150 R 35 35 1 1 O -X VDD(3V3) 28 -400 2600 150 D 35 35 1 1 W -X P1[24]/MCI2/PWM1[5]/MOSI0 38 1200 650 150 L 35 35 1 1 B -X P0[10]/TXD2/SDA2/MAT3[0] 48 -1200 300 150 R 35 35 1 1 B -X P0[20]/DTR1/SCL1 58 -1200 -400 150 R 35 35 1 1 B -X P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 68 1200 -750 150 L 35 35 1 1 B -X P0[7]/I2STX_CLK/SCK1/MAT2[1] 78 -1200 600 150 R 35 35 1 1 B -X P1[15]/ENET_REF_CLK 88 1200 1550 150 L 35 35 1 1 B -X P0[2]/TXD0/AD0[7] 98 -1200 1100 150 R 35 35 1 1 B -X VBAT 19 -1200 -2350 150 R 35 35 1 1 I -X P0[29]/USB_D+ 29 -1200 -1300 150 R 35 35 1 1 B -X P1[25]/MCOA1/MAT1[1] 39 1200 550 150 L 35 35 1 1 B -X P0[11]/RXD2/SCL2/MAT3[1] 49 -1200 200 150 R 35 35 1 1 B -X P0[19]/DSR1/SDA1 59 -1200 -300 150 R 35 35 1 1 B -X P2[4]/PWM1[5]/DSR1/TRACEDATA[1] 69 1200 -650 150 L 35 35 1 1 B -X P0[6]/I2SRX_SDA/SSEL1/MAT2[0] 79 -1200 700 150 R 35 35 1 1 B -X P1[14]/ENET_RX_ER 89 1200 1650 150 L 35 35 1 1 B -X P0[3]/RXD0/AD0[6] 99 -1200 1000 150 R 35 35 1 1 B -X RTCK 100 -1200 2350 150 R 35 35 1 1 O -ENDDRAW -ENDDEF -# -# LPC1767FBD100 -# -DEF LPC1767FBD100 U 0 40 Y Y 1 F N -F0 "U" -1000 2500 50 H V C CNN -F1 "LPC1767FBD100" 850 -2600 50 H V C CNN -F2 "LQFP100" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -DRAW -S -1050 2450 1050 -2550 0 1 0 f -X TDO/SWO 1 -1200 2250 150 R 35 35 1 1 O -X TDI 2 -1200 2150 150 R 35 35 1 1 I -X TMS/SWDIO 3 -1200 2050 150 R 35 35 1 1 B -X ~TRST~ 4 -1200 1950 150 R 35 35 1 1 I -X TCK/SWDCLK 5 -1200 1850 150 R 35 35 1 1 I -X P0[26]/AD0[3]/AOUT/RXD3 6 -1200 -1000 150 R 35 35 1 1 B -X P0[25]/AD0[2]/I2SRX_SDA/TXD3 7 -1200 -900 150 R 35 35 1 1 B -X P0[24]/AD0[1]/I2SRX_WS/CAP3[1] 8 -1200 -800 150 R 35 35 1 1 B -X P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] 9 -1200 -700 150 R 35 35 1 1 B -X VDDA 10 400 2600 150 D 35 35 1 1 I -X P1[31]/SCK1/AD0[5] 20 1200 -50 150 L 35 35 1 1 B -X P0[30] 30 -1200 -1400 150 R 35 35 1 1 B -X P1[26]/MCOB1/PWM1[6]/CAP0[0] 40 1200 450 150 L 35 35 1 1 B -X P2[13]/~EINT3~/I2STX_SDA 50 1200 1750 150 L 35 35 1 1 B -X P0[18]/DCD1/MOSI0/MOSI 60 -1200 -200 150 R 35 35 1 1 B -X P2[3]/PWM1[4]/DCD1/TRACEDATA[2] 70 1200 -550 150 L 35 35 1 1 B -X P0[5]/I2SRX_WS/CAP2[1] 80 -1200 800 150 R 35 35 1 1 B -X P1[10]/ENET_RXD1 90 1200 1850 150 L 35 35 1 1 B -X VSSA 11 400 -2700 150 U 35 35 1 1 W -X P1[30]/AD0[4] 21 1200 50 150 L 35 35 1 1 B -X VSS 31 -200 -2700 150 U 35 35 1 1 W -X VSS 41 100 -2700 150 U 35 35 1 1 W -X P2[12]/~EINT2~/I2STX_WS 51 1200 -1450 150 L 35 35 1 1 B -X P0[17]/CTS1/MISO0/MISO 61 -1200 -100 150 R 35 35 1 1 B -X VDD(3V3) 71 -200 2600 150 D 35 35 1 1 W -X P0[4]/I2SRX_CLK/CAP2[0] 81 -1200 900 150 R 35 35 1 1 B -X P1[9]/ENET_RXD0 91 1200 1950 150 L 35 35 1 1 B -X VREFP 12 1200 -2250 150 L 35 35 1 1 W -X XTAL1 22 -1200 -1600 150 R 35 35 1 1 I -X P1[18]/PWM1[1]/CAP1[0] 32 1200 1250 150 L 35 35 1 1 B -X VDD(REG)(3V3) 42 200 2600 150 D 35 35 1 1 W -X P2[11]/~EINT1~/I2STX_CLK 52 1200 -1350 150 L 35 35 1 1 B -X P0[15]/TXD1/SCK0/SCK 62 -1200 100 150 R 35 35 1 1 B -X VSS 72 0 -2700 150 U 35 35 1 1 W -X P4[28]/RX_MCLK/MAT2[0]/TXD3 82 1200 -1950 150 L 35 35 1 1 B -X P1[8]/ENET_CRS 92 1200 2050 150 L 35 35 1 1 B -X XTAL2 23 -1200 -1750 150 R 35 35 1 1 I -X P1[19]/MCOA0/CAP1[1] 33 1200 1150 150 L 35 35 1 1 B -X P1[27]/CLKOUT/CAP0[1] 43 1200 350 150 L 35 35 1 1 B -X P2[10]/~EINT0~/NMI 53 1200 -1250 150 L 35 35 1 1 B -X P0[16]/RXD1/SSEL0/SSEL 63 -1200 0 150 R 35 35 1 1 B -X P2[2]/PWM1[3]/CTS1/TRACEDATA[3] 73 1200 -450 150 L 35 35 1 1 B -X VSS 83 -400 -2700 150 U 35 35 1 1 W -X P1[4]/ENET_TX_EN 93 1200 2150 150 L 35 35 1 1 B -X ~RSTOUT~ 14 -1200 1500 150 R 35 35 1 1 O -X P0[28]/SCL0 24 -1200 -1200 150 R 35 35 1 1 B -X P1[20]/MCI0/PWM1[2]/SCK0 34 1200 1050 150 L 35 35 1 1 B -X P1[28]/MCOA2/PCAP1[0]/MAT0[0] 44 1200 250 150 L 35 35 1 1 B -X VDD(3V3) 54 -300 2600 150 D 35 35 1 1 W -X P2[9]/USB_CONNECT/RXD2 64 1200 -1150 150 L 35 35 1 1 B -X P2[1]/PWM1[2]/RXD1 74 1200 -350 150 L 35 35 1 1 B -X VDD(REG)(3V3) 84 100 2600 150 D 35 35 1 1 W -X P1[1]/ENET_TDX1 94 1200 2250 150 L 35 35 1 1 B -X VREFN 15 1200 -2450 150 L 35 35 1 1 W -X P0[27]/SDA0 25 -1200 -1100 150 R 35 35 1 1 B -X P1[21]/~MCABORT~/PWM1[3]/SSEL0 35 1200 950 150 L 35 35 1 1 B -X P1[29]/MCOB2/PCAP1[1]/MAT0[1] 45 1200 150 150 L 35 35 1 1 B -X VSS 55 -300 -2700 150 U 35 35 1 1 W -X P2[8]/TXD2 65 1200 -1050 150 L 35 35 1 1 B -X P2[0]/PWM1[1]/TXD1 75 1200 -250 150 L 35 35 1 1 B -X P4[29]/TX_MCLK/MAT2[1]/RXD3 85 1200 -2050 150 L 35 35 1 1 B -X P1[0]/ENET_TXD0 95 1200 2350 150 L 35 35 1 1 B -X RTCX1 16 -1200 -1950 150 R 35 35 1 1 I -X P3[26]/STCLK/MAT0[1]/PWM1[3] 26 1200 -1750 150 L 35 35 1 1 B -X P1[22]/MCOB0/MAT1[0] 36 1200 850 150 L 35 35 1 1 B -X P0[0]/TXD3/SDA1 46 -1200 1300 150 R 35 35 1 1 B -X P0[22]/RTS1 56 -1200 -600 150 R 35 35 1 1 B -X P2[7]/RTS1 66 1200 -950 150 L 35 35 1 1 B -X P0[9]/I2STX_SDA/MOSI1/MAT2[3] 76 -1200 400 150 R 35 35 1 1 B -X P1[17]/ENET_MDIO 86 1200 1350 150 L 35 35 1 1 B -X VDD(3V3) 96 -100 2600 150 D 35 35 1 1 W -X ~RESET~ 17 -1200 1650 150 R 35 35 1 1 I -X P3[25]/MAT0[0]/PWM1[2] 27 1200 -1650 150 L 35 35 1 1 B -X P1[23]/MCI1/PWM1[4]/MISO0 37 1200 750 150 L 35 35 1 1 B -X P0[1]/RXD3/SCL1 47 -1200 1200 150 R 35 35 1 1 B -X P0[21]/RI1 57 -1200 -500 150 R 35 35 1 1 B -X P2[6]/PCAP1[0]/RI1/TRACECLK 67 1200 -850 150 L 35 35 1 1 B -X P0[8]/I2STX_WS/MISO1/MAT2[2] 77 -1200 500 150 R 35 35 1 1 B -X P1[16]/ENET_MDC 87 1200 1450 150 L 35 35 1 1 B -X VSS 97 -100 -2700 150 U 35 35 1 1 W -X RTCX2 18 -1200 -2100 150 R 35 35 1 1 O -X VDD(3V3) 28 -400 2600 150 D 35 35 1 1 W -X P1[24]/MCI2/PWM1[5]/MOSI0 38 1200 650 150 L 35 35 1 1 B -X P0[10]/TXD2/SDA2/MAT3[0] 48 -1200 300 150 R 35 35 1 1 B -X P0[20]/DTR1/SCL1 58 -1200 -400 150 R 35 35 1 1 B -X P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 68 1200 -750 150 L 35 35 1 1 B -X P0[7]/I2STX_CLK/SCK1/MAT2[1] 78 -1200 600 150 R 35 35 1 1 B -X P1[15]/ENET_REF_CLK 88 1200 1550 150 L 35 35 1 1 B -X P0[2]/TXD0/AD0[7] 98 -1200 1100 150 R 35 35 1 1 B -X VBAT 19 -1200 -2350 150 R 35 35 1 1 I -X P0[29] 29 -1200 -1300 150 R 35 35 1 1 B -X P1[25]/MCOA1/MAT1[1] 39 1200 550 150 L 35 35 1 1 B -X P0[11]/RXD2/SCL2/MAT3[1] 49 -1200 200 150 R 35 35 1 1 B -X P0[19]/DSR1/SDA1 59 -1200 -300 150 R 35 35 1 1 B -X P2[4]/PWM1[5]/DSR1/TRACEDATA[1] 69 1200 -650 150 L 35 35 1 1 B -X P0[6]/I2SRX_SDA/SSEL1/MAT2[0] 79 -1200 700 150 R 35 35 1 1 B -X P1[14]/ENET_RX_ER 89 1200 1650 150 L 35 35 1 1 B -X P0[3]/RXD0/AD0[6] 99 -1200 1000 150 R 35 35 1 1 B -X RTCK 100 -1200 2350 150 R 35 35 1 1 O -ENDDRAW -ENDDEF -# -# LPC1769FBD100 -# -DEF LPC1769FBD100 U 0 40 Y Y 1 F N -F0 "U" -1000 2500 50 H V C CNN -F1 "LPC1769FBD100" 850 -2600 50 H V C CNN -F2 "LQFP100" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -DRAW -S -1050 2450 1050 -2550 0 1 0 f -X TDO/SWO 1 -1200 2250 150 R 35 35 1 1 O -X TDI 2 -1200 2150 150 R 35 35 1 1 I -X TMS/SWDIO 3 -1200 2050 150 R 35 35 1 1 B -X ~TRST~ 4 -1200 1950 150 R 35 35 1 1 I -X TCK/SWDCLK 5 -1200 1850 150 R 35 35 1 1 I -X P0[26]/AD0[3]/AOUT/RXD3 6 -1200 -1000 150 R 35 35 1 1 B -X P0[25]/AD0[2]/I2SRX_SDA/TXD3 7 -1200 -900 150 R 35 35 1 1 B -X P0[24]/AD0[1]/I2SRX_WS/CAP3[1] 8 -1200 -800 150 R 35 35 1 1 B -X P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] 9 -1200 -700 150 R 35 35 1 1 B -X VDDA 10 400 2600 150 D 35 35 1 1 I -X P1[31]/SCK1/AD0[5] 20 1200 -50 150 L 35 35 1 1 B -X P0[30]/USB_D- 30 -1200 -1400 150 R 35 35 1 1 B -X P1[26]/MCOB1/PWM1[6]/CAP0[0] 40 1200 450 150 L 35 35 1 1 B -X P2[13]/~EINT3~/I2STX_SDA 50 1200 1750 150 L 35 35 1 1 B -X P0[18]/DCD1/MOSI0/MOSI 60 -1200 -200 150 R 35 35 1 1 B -X P2[3]/PWM1[4]/DCD1/TRACEDATA[2] 70 1200 -550 150 L 35 35 1 1 B -X P0[5]/I2SRX_WS/TD2/CAP2[1] 80 -1200 800 150 R 35 35 1 1 B -X P1[10]/ENET_RXD1 90 1200 1850 150 L 35 35 1 1 B -X VSSA 11 400 -2700 150 U 35 35 1 1 W -X P1[30]/VBUS/AD0[4] 21 1200 50 150 L 35 35 1 1 B -X VSS 31 -200 -2700 150 U 35 35 1 1 W -X VSS 41 100 -2700 150 U 35 35 1 1 W -X P2[12]/~EINT2~/I2STX_WS 51 1200 -1450 150 L 35 35 1 1 B -X P0[17]/CTS1/MISO0/MISO 61 -1200 -100 150 R 35 35 1 1 B -X VDD(3V3) 71 -200 2600 150 D 35 35 1 1 W -X P0[4]/I2SRX_CLK/RD2/CAP2[0] 81 -1200 900 150 R 35 35 1 1 B -X P1[9]/ENET_RXD0 91 1200 1950 150 L 35 35 1 1 B -X VREFP 12 1200 -2250 150 L 35 35 1 1 W -X XTAL1 22 -1200 -1600 150 R 35 35 1 1 I -X P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] 32 1200 1250 150 L 35 35 1 1 B -X VDD(REG)(3V3) 42 200 2600 150 D 35 35 1 1 W -X P2[11]/~EINT1~/I2STX_CLK 52 1200 -1350 150 L 35 35 1 1 B -X P0[15]/TXD1/SCK0/SCK 62 -1200 100 150 R 35 35 1 1 B -X VSS 72 0 -2700 150 U 35 35 1 1 W -X P4[28]/RX_MCLK/MAT2[0]/TXD3 82 1200 -1950 150 L 35 35 1 1 B -X P1[8]/ENET_CRS 92 1200 2050 150 L 35 35 1 1 B -X XTAL2 23 -1200 -1750 150 R 35 35 1 1 I -X P1[19]/MCOA0/~USB_PPWR~/CAP1[1] 33 1200 1150 150 L 35 35 1 1 B -X P1[27]/CLKOUT/~USB_OVRCR~/CAP0[1] 43 1200 350 150 L 35 35 1 1 B -X P2[10]/~EINT0~/NMI 53 1200 -1250 150 L 35 35 1 1 B -X P0[16]/RXD1/SSEL0/SSEL 63 -1200 0 150 R 35 35 1 1 B -X P2[2]/PWM1[3]/CTS1/TRACEDATA[3] 73 1200 -450 150 L 35 35 1 1 B -X VSS 83 -400 -2700 150 U 35 35 1 1 W -X P1[4]/ENET_TX_EN 93 1200 2150 150 L 35 35 1 1 B -X ~RSTOUT~ 14 -1200 1500 150 R 35 35 1 1 O -X P0[28]/SCL0/USB_SCL 24 -1200 -1200 150 R 35 35 1 1 B -X P1[20]/MCI0/PWM1[2]/SCK0 34 1200 1050 150 L 35 35 1 1 B -X P1[28]/MCOA2/PCAP1[0]/MAT0[0] 44 1200 250 150 L 35 35 1 1 B -X VDD(3V3) 54 -300 2600 150 D 35 35 1 1 W -X P2[9]/USB_CONNECT/RXD2 64 1200 -1150 150 L 35 35 1 1 B -X P2[1]/PWM1[2]/RXD1 74 1200 -350 150 L 35 35 1 1 B -X VDD(REG)(3V3) 84 100 2600 150 D 35 35 1 1 W -X P1[1]/ENET_TDX1 94 1200 2250 150 L 35 35 1 1 B -X VREFN 15 1200 -2450 150 L 35 35 1 1 W -X P0[27]/SDA0/USB_SDA 25 -1200 -1100 150 R 35 35 1 1 B -X P1[21]/~MCABORT~/PWM1[3]/SSEL0 35 1200 950 150 L 35 35 1 1 B -X P1[29]/MCOB2/PCAP1[1]/MAT0[1] 45 1200 150 150 L 35 35 1 1 B -X VSS 55 -300 -2700 150 U 35 35 1 1 W -X P2[8]/TD2/TXD2 65 1200 -1050 150 L 35 35 1 1 B -X P2[0]/PWM1[1]/TXD1 75 1200 -250 150 L 35 35 1 1 B -X P4[29]/TX_MCLK/MAT2[1]/RXD3 85 1200 -2050 150 L 35 35 1 1 B -X P1[0]/ENET_TXD0 95 1200 2350 150 L 35 35 1 1 B -X RTCX1 16 -1200 -1950 150 R 35 35 1 1 I -X P3[26]/STCLK/MAT0[1]/PWM1[3] 26 1200 -1750 150 L 35 35 1 1 B -X P1[22]/MCOB0/USB_PWRD/MAT1[0] 36 1200 850 150 L 35 35 1 1 B -X P0[0]/RD1/TXD3/SDA1 46 -1200 1300 150 R 35 35 1 1 B -X P0[22]/RTS1/TD1 56 -1200 -600 150 R 35 35 1 1 B -X P2[7]/RD2/RTS1 66 1200 -950 150 L 35 35 1 1 B -X P0[9]/I2STX_SDA/MOSI1/MAT2[3] 76 -1200 400 150 R 35 35 1 1 B -X P1[17]/ENET_MDIO 86 1200 1350 150 L 35 35 1 1 B -X VDD(3V3) 96 -100 2600 150 D 35 35 1 1 W -X ~RESET~ 17 -1200 1650 150 R 35 35 1 1 I -X P3[25]/MAT0[0]/PWM1[2] 27 1200 -1650 150 L 35 35 1 1 B -X P1[23]/MCI1/PWM1[4]/MISO0 37 1200 750 150 L 35 35 1 1 B -X P0[1]/TD1/RXD3/SCL1 47 -1200 1200 150 R 35 35 1 1 B -X P0[21]/RI1/RD1 57 -1200 -500 150 R 35 35 1 1 B -X P2[6]/PCAP1[0]/RI1/TRACECLK 67 1200 -850 150 L 35 35 1 1 B -X P0[8]/I2STX_WS/MISO1/MAT2[2] 77 -1200 500 150 R 35 35 1 1 B -X P1[16]/ENET_MDC 87 1200 1450 150 L 35 35 1 1 B -X VSS 97 -100 -2700 150 U 35 35 1 1 W -X RTCX2 18 -1200 -2100 150 R 35 35 1 1 O -X VDD(3V3) 28 -400 2600 150 D 35 35 1 1 W -X P1[24]/MCI2/PWM1[5]/MOSI0 38 1200 650 150 L 35 35 1 1 B -X P0[10]/TXD2/SDA2/MAT3[0] 48 -1200 300 150 R 35 35 1 1 B -X P0[20]/DTR1/SCL1 58 -1200 -400 150 R 35 35 1 1 B -X P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 68 1200 -750 150 L 35 35 1 1 B -X P0[7]/I2STX_CLK/SCK1/MAT2[1] 78 -1200 600 150 R 35 35 1 1 B -X P1[15]/ENET_REF_CLK 88 1200 1550 150 L 35 35 1 1 B -X P0[2]/TXD0/AD0[7] 98 -1200 1100 150 R 35 35 1 1 B -X VBAT 19 -1200 -2350 150 R 35 35 1 1 I -X P0[29]/USB_D+ 29 -1200 -1300 150 R 35 35 1 1 B -X P1[25]/MCOA1/MAT1[1] 39 1200 550 150 L 35 35 1 1 B -X P0[11]/RXD2/SCL2/MAT3[1] 49 -1200 200 150 R 35 35 1 1 B -X P0[19]/DSR1/SDA1 59 -1200 -300 150 R 35 35 1 1 B -X P2[4]/PWM1[5]/DSR1/TRACEDATA[1] 69 1200 -650 150 L 35 35 1 1 B -X P0[6]/I2SRX_SDA/SSEL1/MAT2[0] 79 -1200 700 150 R 35 35 1 1 B -X P1[14]/ENET_RX_ER 89 1200 1650 150 L 35 35 1 1 B -X P0[3]/RXD0/AD0[6] 99 -1200 1000 150 R 35 35 1 1 B -X RTCK 100 -1200 2350 150 R 35 35 1 1 O -ENDDRAW -ENDDEF -# # LPC2148 # DEF LPC2148 U 0 40 Y Y 1 F N From 54b9550b516e2a5641b6b1d4f476b1ddc23c53ba Mon Sep 17 00:00:00 2001 From: hackscribble Date: Sun, 30 Apr 2017 20:44:37 +0100 Subject: [PATCH 2/8] Fixed most KLC errors. Simplified GPIO names. Reduced symbol size. --- library/nxp_armmcu.lib | 208 ++++++++++++++++++++--------------------- 1 file changed, 104 insertions(+), 104 deletions(-) diff --git a/library/nxp_armmcu.lib b/library/nxp_armmcu.lib index 427e7f18..ef92319d 100644 --- a/library/nxp_armmcu.lib +++ b/library/nxp_armmcu.lib @@ -321,111 +321,111 @@ ENDDEF # LPC1763FBD100 # DEF LPC1763FBD100 U 0 40 Y Y 1 F N -F0 "U" -1000 2500 50 H V C CNN -F1 "LPC1763FBD100" 850 -2600 50 H V C CNN -F2 "LQFP100" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN +F0 "U" -900 2550 50 H V C CNN +F1 "LPC1763FBD100" 850 2550 50 H V C CNN +F2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" -1450 -2550 50 H I C CNN +F3 "" 0 -100 50 H I C CNN DRAW -S -1050 2450 1050 -2550 0 1 0 f -X TDO/SWO 1 -1200 2250 150 R 35 35 1 1 O -X TDI 2 -1200 2150 150 R 35 35 1 1 I -X TMS/SWDIO 3 -1200 2050 150 R 35 35 1 1 B -X ~TRST~ 4 -1200 1950 150 R 35 35 1 1 I -X TCK/SWDCLK 5 -1200 1850 150 R 35 35 1 1 I -X P0[26]/AD0[3]/AOUT/RXD3 6 -1200 -1000 150 R 35 35 1 1 B -X P0[25]/AD0[2]/I2SRX_SDA/TXD3 7 -1200 -900 150 R 35 35 1 1 B -X P0[24]/AD0[1]/I2SRX_WS/CAP3[1] 8 -1200 -800 150 R 35 35 1 1 B -X P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] 9 -1200 -700 150 R 35 35 1 1 B -X VDDA 10 400 2600 150 D 35 35 1 1 I -X P1[31]/SCK1/AD0[5] 20 1200 -50 150 L 35 35 1 1 B -X P0[30] 30 -1200 -1400 150 R 35 35 1 1 B -X P1[26]/MCOB1/PWM1[6]/CAP0[0] 40 1200 450 150 L 35 35 1 1 B -X P2[13]/~EINT3~/I2STX_SDA 50 1200 1750 150 L 35 35 1 1 B -X P0[18]/DCD1/MOSI0/MOSI 60 -1200 -200 150 R 35 35 1 1 B -X P2[3]/PWM1[4]/DCD1/TRACEDATA[2] 70 1200 -550 150 L 35 35 1 1 B -X P0[5]/I2SRX_WS/CAP2[1] 80 -1200 800 150 R 35 35 1 1 B -X P1[10] 90 1200 1850 150 L 35 35 1 1 B -X VSSA 11 400 -2700 150 U 35 35 1 1 W -X P1[30]/VBUS/AD0[4] 21 1200 50 150 L 35 35 1 1 B -X VSS 31 -200 -2700 150 U 35 35 1 1 W -X VSS 41 100 -2700 150 U 35 35 1 1 W -X P2[12]/~EINT2~/I2STX_WS 51 1200 -1450 150 L 35 35 1 1 B -X P0[17]/CTS1/MISO0/MISO 61 -1200 -100 150 R 35 35 1 1 B -X VDD(3V3) 71 -200 2600 150 D 35 35 1 1 W -X P0[4]/I2SRX_CLK/CAP2[0] 81 -1200 900 150 R 35 35 1 1 B -X P1[9] 91 1200 1950 150 L 35 35 1 1 B -X VREFP 12 1200 -2250 150 L 35 35 1 1 W -X XTAL1 22 -1200 -1600 150 R 35 35 1 1 I -X P1[18]/PWM1[1]/CAP1[0] 32 1200 1250 150 L 35 35 1 1 B -X VDD(REG)(3V3) 42 200 2600 150 D 35 35 1 1 W -X P2[11]/~EINT1~/I2STX_CLK 52 1200 -1350 150 L 35 35 1 1 B -X P0[15]/TXD1/SCK0/SCK 62 -1200 100 150 R 35 35 1 1 B -X VSS 72 0 -2700 150 U 35 35 1 1 W -X P4[28]/MAT2[0]/TXD3 82 1200 -1950 150 L 35 35 1 1 B -X P1[8] 92 1200 2050 150 L 35 35 1 1 B -X XTAL2 23 -1200 -1750 150 R 35 35 1 1 I -X P1[19]/MCOA0/CAP1[1] 33 1200 1150 150 L 35 35 1 1 B -X P1[27]/CLKOUT/CAP0[1] 43 1200 350 150 L 35 35 1 1 B -X P2[10]/~EINT0~/NMI 53 1200 -1250 150 L 35 35 1 1 B -X P0[16]/RXD1/SSEL0/SSEL 63 -1200 0 150 R 35 35 1 1 B -X P2[2]/PWM1[3]/CTS1/TRACEDATA[3] 73 1200 -450 150 L 35 35 1 1 B -X VSS 83 -400 -2700 150 U 35 35 1 1 W -X P1[4] 93 1200 2150 150 L 35 35 1 1 B -X ~RSTOUT~ 14 -1200 1500 150 R 35 35 1 1 O -X P0[28]/SCL0/USB_SCL 24 -1200 -1200 150 R 35 35 1 1 B -X P1[20]/MCI0/PWM1[2]/SCK0 34 1200 1050 150 L 35 35 1 1 B -X P1[28]/MCOA2/PCAP1[0]/MAT0[0] 44 1200 250 150 L 35 35 1 1 B -X VDD(3V3) 54 -300 2600 150 D 35 35 1 1 W -X P2[9]/RXD2 64 1200 -1150 150 L 35 35 1 1 B -X P2[1]/PWM1[2]/RXD1 74 1200 -350 150 L 35 35 1 1 B -X VDD(REG)(3V3) 84 100 2600 150 D 35 35 1 1 W -X P1[1] 94 1200 2250 150 L 35 35 1 1 B -X VREFN 15 1200 -2450 150 L 35 35 1 1 W -X P0[27]/SDA0/USB_SDA 25 -1200 -1100 150 R 35 35 1 1 B -X P1[21]/~MCABORT~/PWM1[3]/SSEL0 35 1200 950 150 L 35 35 1 1 B -X P1[29]/MCOB2/PCAP1[1]/MAT0[1] 45 1200 150 150 L 35 35 1 1 B -X VSS 55 -300 -2700 150 U 35 35 1 1 W -X P2[8]/TXD2 65 1200 -1050 150 L 35 35 1 1 B -X P2[0]/PWM1[1]/TXD1 75 1200 -250 150 L 35 35 1 1 B -X P4[29]/MAT2[1]/RXD3 85 1200 -2050 150 L 35 35 1 1 B -X P1[0] 95 1200 2350 150 L 35 35 1 1 B -X RTCX1 16 -1200 -1950 150 R 35 35 1 1 I -X P3[26]/STCLK/MAT0[1]/PWM1[3] 26 1200 -1750 150 L 35 35 1 1 B -X P1[22]/MCOB0/MAT1[0] 36 1200 850 150 L 35 35 1 1 B -X P0[0]/TXD3/SDA1 46 -1200 1300 150 R 35 35 1 1 B -X P0[22]/RTS1 56 -1200 -600 150 R 35 35 1 1 B -X P2[7]/RTS1 66 1200 -950 150 L 35 35 1 1 B -X P0[9]/I2STX_SDA/MOSI1/MAT2[3] 76 -1200 400 150 R 35 35 1 1 B -X P1[17] 86 1200 1350 150 L 35 35 1 1 B -X VDD(3V3) 96 -100 2600 150 D 35 35 1 1 W -X ~RESET~ 17 -1200 1650 150 R 35 35 1 1 I -X P3[25]/MAT0[0]/PWM1[2] 27 1200 -1650 150 L 35 35 1 1 B -X P1[23]/MCI1/PWM1[4]/MISO0 37 1200 750 150 L 35 35 1 1 B -X P0[1]/RXD3/SCL1 47 -1200 1200 150 R 35 35 1 1 B -X P0[21]/RI1 57 -1200 -500 150 R 35 35 1 1 B -X P2[6]/PCAP1[0]/RI1/TRACECLK 67 1200 -850 150 L 35 35 1 1 B -X P0[8]/I2STX_WS/MISO1/MAT2[2] 77 -1200 500 150 R 35 35 1 1 B -X P1[16] 87 1200 1450 150 L 35 35 1 1 B -X VSS 97 -100 -2700 150 U 35 35 1 1 W -X RTCX2 18 -1200 -2100 150 R 35 35 1 1 O -X VDD(3V3) 28 -400 2600 150 D 35 35 1 1 W -X P1[24]/MCI2/PWM1[5]/MOSI0 38 1200 650 150 L 35 35 1 1 B -X P0[10]/TXD2/SDA2/MAT3[0] 48 -1200 300 150 R 35 35 1 1 B -X P0[20]/DTR1/SCL1 58 -1200 -400 150 R 35 35 1 1 B -X P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 68 1200 -750 150 L 35 35 1 1 B -X P0[7]/I2STX_CLK/SCK1/MAT2[1] 78 -1200 600 150 R 35 35 1 1 B -X P1[15] 88 1200 1550 150 L 35 35 1 1 B -X P0[2]/TXD0/AD0[7] 98 -1200 1100 150 R 35 35 1 1 B -X VBAT 19 -1200 -2350 150 R 35 35 1 1 I -X P0[29] 29 -1200 -1300 150 R 35 35 1 1 B -X P1[25]/MCOA1/MAT1[1] 39 1200 550 150 L 35 35 1 1 B -X P0[11]/RXD2/SCL2/MAT3[1] 49 -1200 200 150 R 35 35 1 1 B -X P0[19]/DSR1/SDA1 59 -1200 -300 150 R 35 35 1 1 B -X P2[4]/PWM1[5]/DSR1/TRACEDATA[1] 69 1200 -650 150 L 35 35 1 1 B -X P0[6]/I2SRX_SDA/SSEL1/MAT2[0] 79 -1200 700 150 R 35 35 1 1 B -X P1[14] 89 1200 1650 150 L 35 35 1 1 B -X P0[3]/RXD0/AD0[6] 99 -1200 1000 150 R 35 35 1 1 B -X RTCK 100 -1200 2350 150 R 35 35 1 1 O +S -950 2450 950 -2450 0 1 10 f +X TDO/SWO 1 -1100 -700 150 R 50 50 1 1 O +X TDI 2 -1100 -800 150 R 50 50 1 1 I +X TMS/SWDIO 3 -1100 -900 150 R 50 50 1 1 B +X ~TRST~ 4 -1100 -1000 150 R 50 50 1 1 I +X TCK/SWDCLK 5 -1100 -1100 150 R 50 50 1 1 I +X P0[26] 6 -1100 0 150 R 50 50 1 1 B +X P0[25] 7 -1100 100 150 R 50 50 1 1 B +X P0[24] 8 -1100 200 150 R 50 50 1 1 B +X P0[23] 9 -1100 300 150 R 50 50 1 1 B +X VDDA 10 400 2600 150 D 50 50 1 1 I +X P1[31] 20 1100 -100 150 L 50 50 1 1 B +X P0[30] 30 -1100 -400 150 R 50 50 1 1 B +X P1[26] 40 1100 400 150 L 50 50 1 1 B +X P2[13] 50 1100 1700 150 L 50 50 1 1 B +X P0[18] 60 -1100 800 150 R 50 50 1 1 B +X P2[3] 70 1100 -600 150 L 50 50 1 1 B +X P0[5] 80 -1100 1800 150 R 50 50 1 1 B +X P1[10] 90 1100 1800 150 L 50 50 1 1 B +X VSSA 11 400 -2600 150 U 50 50 1 1 W +X P1[30] 21 1100 0 150 L 50 50 1 1 B +X VSS 31 -200 -2600 150 U 50 50 1 1 W +X VSS 41 100 -2600 150 U 50 50 1 1 W +X P2[12] 51 1100 -1500 150 L 50 50 1 1 B +X P0[17] 61 -1100 900 150 R 50 50 1 1 B +X VDD(3V3) 71 -200 2600 150 D 50 50 1 1 W +X P0[4] 81 -1100 1900 150 R 50 50 1 1 B +X P1[9] 91 1100 1900 150 L 50 50 1 1 B +X VREFP 12 -1100 -2200 150 R 50 50 1 1 W +X XTAL1 22 -1100 -1600 150 R 50 50 1 1 I +X P1[18] 32 1100 1200 150 L 50 50 1 1 B +X VDD(REG)(3V3) 42 200 2600 150 D 50 50 1 1 W +X P2[11] 52 1100 -1400 150 L 50 50 1 1 B +X P0[15] 62 -1100 1100 150 R 50 50 1 1 B +X VSS 72 0 -2600 150 U 50 50 1 1 W +X P4[28] 82 1100 -2000 150 L 50 50 1 1 B +X P1[8] 92 1100 2000 150 L 50 50 1 1 B +X XTAL2 23 -1100 -1700 150 R 50 50 1 1 I +X P1[19] 33 1100 1100 150 L 50 50 1 1 B +X P1[27] 43 1100 300 150 L 50 50 1 1 B +X P2[10] 53 1100 -1300 150 L 50 50 1 1 B +X P0[16] 63 -1100 1000 150 R 50 50 1 1 B +X P2[2] 73 1100 -500 150 L 50 50 1 1 B +X VSS 83 -400 -2600 150 U 50 50 1 1 W +X P1[4] 93 1100 2100 150 L 50 50 1 1 B +X ~RSTOUT~ 14 -1100 -1400 150 R 50 50 1 1 O +X P0[28] 24 -1100 -200 150 R 50 50 1 1 B +X P1[20] 34 1100 1000 150 L 50 50 1 1 B +X P1[28] 44 1100 200 150 L 50 50 1 1 B +X VDD(3V3) 54 -300 2600 150 D 50 50 1 1 W +X P2[9] 64 1100 -1200 150 L 50 50 1 1 B +X P2[1] 74 1100 -400 150 L 50 50 1 1 B +X VDD(REG)(3V3) 84 100 2600 150 D 50 50 1 1 W +X P1[1] 94 1100 2200 150 L 50 50 1 1 B +X VREFN 15 -1100 -2300 150 R 50 50 1 1 W +X P0[27] 25 -1100 -100 150 R 50 50 1 1 B +X P1[21] 35 1100 900 150 L 50 50 1 1 B +X P1[29] 45 1100 100 150 L 50 50 1 1 B +X VSS 55 -300 -2600 150 U 50 50 1 1 W +X P2[8] 65 1100 -1100 150 L 50 50 1 1 B +X P2[0] 75 1100 -300 150 L 50 50 1 1 B +X P4[29] 85 1100 -2100 150 L 50 50 1 1 B +X P1[0] 95 1100 2300 150 L 50 50 1 1 B +X RTCX1 16 -1100 -1800 150 R 50 50 1 1 I +X P3[26] 26 1100 -1800 150 L 50 50 1 1 B +X P1[22] 36 1100 800 150 L 50 50 1 1 B +X P0[0] 46 -1100 2300 150 R 50 50 1 1 B +X P0[22] 56 -1100 400 150 R 50 50 1 1 B +X P2[7] 66 1100 -1000 150 L 50 50 1 1 B +X P0[9] 76 -1100 1400 150 R 50 50 1 1 B +X P1[17] 86 1100 1300 150 L 50 50 1 1 B +X VDD(3V3) 96 -100 2600 150 D 50 50 1 1 W +X ~RESET~ 17 -1100 -1300 150 R 50 50 1 1 I +X P3[25] 27 1100 -1700 150 L 50 50 1 1 B +X P1[23] 37 1100 700 150 L 50 50 1 1 B +X P0[1] 47 -1100 2200 150 R 50 50 1 1 B +X P0[21] 57 -1100 500 150 R 50 50 1 1 B +X P2[6] 67 1100 -900 150 L 50 50 1 1 B +X P0[8] 77 -1100 1500 150 R 50 50 1 1 B +X P1[16] 87 1100 1400 150 L 50 50 1 1 B +X VSS 97 -100 -2600 150 U 50 50 1 1 W +X RTCX2 18 -1100 -1900 150 R 50 50 1 1 O +X VDD(3V3) 28 -400 2600 150 D 50 50 1 1 W +X P1[24] 38 1100 600 150 L 50 50 1 1 B +X P0[10] 48 -1100 1300 150 R 50 50 1 1 B +X P0[20] 58 -1100 600 150 R 50 50 1 1 B +X P2[5] 68 1100 -800 150 L 50 50 1 1 B +X P0[7] 78 -1100 1600 150 R 50 50 1 1 B +X P1[15] 88 1100 1500 150 L 50 50 1 1 B +X P0[2] 98 -1100 2100 150 R 50 50 1 1 B +X VBAT 19 -1100 -2100 150 R 50 50 1 1 I +X P0[29] 29 -1100 -300 150 R 50 50 1 1 B +X P1[25] 39 1100 500 150 L 50 50 1 1 B +X P0[11] 49 -1100 1200 150 R 50 50 1 1 B +X P0[19] 59 -1100 700 150 R 50 50 1 1 B +X P2[4] 69 1100 -700 150 L 50 50 1 1 B +X P0[6] 79 -1100 1700 150 R 50 50 1 1 B +X P1[14] 89 1100 1600 150 L 50 50 1 1 B +X P0[3] 99 -1100 2000 150 R 50 50 1 1 B +X RTCK 100 -1100 -600 150 R 50 50 1 1 O ENDDRAW ENDDEF # From 52af8f513b3c19ebeddd69da228e19ea803bb0c0 Mon Sep 17 00:00:00 2001 From: hackscribble Date: Mon, 1 May 2017 09:29:22 +0100 Subject: [PATCH 3/8] Further changes to symbol. Added aliases. --- library/nxp_armmcu.dcm | 40 +++++++- library/nxp_armmcu.lib | 211 +++++++++++++++++++++-------------------- 2 files changed, 146 insertions(+), 105 deletions(-) diff --git a/library/nxp_armmcu.dcm b/library/nxp_armmcu.dcm index 92ebd158..04c52939 100644 --- a/library/nxp_armmcu.dcm +++ b/library/nxp_armmcu.dcm @@ -403,8 +403,44 @@ F http://www.nxp.com/documents/data_sheet/LPC11U3X.pdf $ENDCMP # $CMP LPC1763FBD100 -D LPC1769, 32-bit ARM Cortex-M3 microcontroller, 256 kB Flash, 64 kB SRAM, I2S, DAC -K ARM, 32bit, CortexM3, M3, NXP, Microcontroller +D 32-bit ARM Cortex-M3 microcontroller, 256KB flash, 64KB RAM +K ARM, 32-bit, Cortex-M3, M3, NXP, microcontroller +F http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf +$ENDCMP +# +$CMP LPC1764FBD100 +D 32-bit ARM Cortex-M3 microcontroller, 128KB flash, 32KB RAM, Ethernet, USB +K ARM, 32-bit, Cortex-M3, M3, NXP, microcontroller +F http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf +$ENDCMP +# +$CMP LPC1765FBD100 +D 32-bit ARM Cortex-M3 microcontroller, 256KB flash, 64KB RAM, USB +K ARM, 32-bit, Cortex-M3, M3, NXP, microcontroller +F http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf +$ENDCMP +# +$CMP LPC1766FBD100 +D 32-bit ARM Cortex-M3 microcontroller, 256KB flash, 64KB RAM, Ethernet, USB +K ARM, 32-bit, Cortex-M3, M3, NXP, microcontroller +F http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf +$ENDCMP +# +$CMP LPC1767FBD100 +D 32-bit ARM Cortex-M3 microcontroller, 512KB flash, 64KB RAM, Ethernet +K ARM, 32-bit, Cortex-M3, M3, NXP, microcontroller +F http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf +$ENDCMP +# +$CMP LPC1768FBD100 +D 32-bit ARM Cortex-M3 microcontroller, 512KB flash, 64KB RAM, Ethernet, USB +K ARM, 32-bit, Cortex-M3, M3, NXP, microcontroller +F http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf +$ENDCMP +# +$CMP LPC1769FBD100 +D 32-bit ARM Cortex-M3 microcontroller, 512KB flash, 64KB RAM, Ethernet, USB +K ARM, 32-bit, Cortex-M3, M3, NXP, microcontroller F http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf $ENDCMP # diff --git a/library/nxp_armmcu.lib b/library/nxp_armmcu.lib index ef92319d..ba4d56a7 100644 --- a/library/nxp_armmcu.lib +++ b/library/nxp_armmcu.lib @@ -321,111 +321,116 @@ ENDDEF # LPC1763FBD100 # DEF LPC1763FBD100 U 0 40 Y Y 1 F N -F0 "U" -900 2550 50 H V C CNN -F1 "LPC1763FBD100" 850 2550 50 H V C CNN -F2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" -1450 -2550 50 H I C CNN +F0 "U" -700 2450 50 H V C CNN +F1 "LPC1763FBD100" 800 2450 50 H V C CNN +F2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" -1450 -2450 50 H I C CNN F3 "" 0 -100 50 H I C CNN +ALIAS LPC1764FBD100 LPC1765FBD100 LPC1766FBD100 LPC1767FBD100 LPC1768FBD100 LPC1769FBD100 +$FPLIST + *L*QFP*100* +$ENDFPLIST DRAW -S -950 2450 950 -2450 0 1 10 f -X TDO/SWO 1 -1100 -700 150 R 50 50 1 1 O -X TDI 2 -1100 -800 150 R 50 50 1 1 I -X TMS/SWDIO 3 -1100 -900 150 R 50 50 1 1 B -X ~TRST~ 4 -1100 -1000 150 R 50 50 1 1 I -X TCK/SWDCLK 5 -1100 -1100 150 R 50 50 1 1 I -X P0[26] 6 -1100 0 150 R 50 50 1 1 B -X P0[25] 7 -1100 100 150 R 50 50 1 1 B -X P0[24] 8 -1100 200 150 R 50 50 1 1 B -X P0[23] 9 -1100 300 150 R 50 50 1 1 B -X VDDA 10 400 2600 150 D 50 50 1 1 I -X P1[31] 20 1100 -100 150 L 50 50 1 1 B -X P0[30] 30 -1100 -400 150 R 50 50 1 1 B -X P1[26] 40 1100 400 150 L 50 50 1 1 B -X P2[13] 50 1100 1700 150 L 50 50 1 1 B -X P0[18] 60 -1100 800 150 R 50 50 1 1 B -X P2[3] 70 1100 -600 150 L 50 50 1 1 B -X P0[5] 80 -1100 1800 150 R 50 50 1 1 B -X P1[10] 90 1100 1800 150 L 50 50 1 1 B -X VSSA 11 400 -2600 150 U 50 50 1 1 W -X P1[30] 21 1100 0 150 L 50 50 1 1 B -X VSS 31 -200 -2600 150 U 50 50 1 1 W -X VSS 41 100 -2600 150 U 50 50 1 1 W -X P2[12] 51 1100 -1500 150 L 50 50 1 1 B -X P0[17] 61 -1100 900 150 R 50 50 1 1 B -X VDD(3V3) 71 -200 2600 150 D 50 50 1 1 W -X P0[4] 81 -1100 1900 150 R 50 50 1 1 B -X P1[9] 91 1100 1900 150 L 50 50 1 1 B -X VREFP 12 -1100 -2200 150 R 50 50 1 1 W -X XTAL1 22 -1100 -1600 150 R 50 50 1 1 I -X P1[18] 32 1100 1200 150 L 50 50 1 1 B -X VDD(REG)(3V3) 42 200 2600 150 D 50 50 1 1 W -X P2[11] 52 1100 -1400 150 L 50 50 1 1 B -X P0[15] 62 -1100 1100 150 R 50 50 1 1 B -X VSS 72 0 -2600 150 U 50 50 1 1 W -X P4[28] 82 1100 -2000 150 L 50 50 1 1 B -X P1[8] 92 1100 2000 150 L 50 50 1 1 B -X XTAL2 23 -1100 -1700 150 R 50 50 1 1 I -X P1[19] 33 1100 1100 150 L 50 50 1 1 B -X P1[27] 43 1100 300 150 L 50 50 1 1 B -X P2[10] 53 1100 -1300 150 L 50 50 1 1 B -X P0[16] 63 -1100 1000 150 R 50 50 1 1 B -X P2[2] 73 1100 -500 150 L 50 50 1 1 B -X VSS 83 -400 -2600 150 U 50 50 1 1 W -X P1[4] 93 1100 2100 150 L 50 50 1 1 B -X ~RSTOUT~ 14 -1100 -1400 150 R 50 50 1 1 O -X P0[28] 24 -1100 -200 150 R 50 50 1 1 B -X P1[20] 34 1100 1000 150 L 50 50 1 1 B -X P1[28] 44 1100 200 150 L 50 50 1 1 B -X VDD(3V3) 54 -300 2600 150 D 50 50 1 1 W -X P2[9] 64 1100 -1200 150 L 50 50 1 1 B -X P2[1] 74 1100 -400 150 L 50 50 1 1 B -X VDD(REG)(3V3) 84 100 2600 150 D 50 50 1 1 W -X P1[1] 94 1100 2200 150 L 50 50 1 1 B -X VREFN 15 -1100 -2300 150 R 50 50 1 1 W -X P0[27] 25 -1100 -100 150 R 50 50 1 1 B -X P1[21] 35 1100 900 150 L 50 50 1 1 B -X P1[29] 45 1100 100 150 L 50 50 1 1 B -X VSS 55 -300 -2600 150 U 50 50 1 1 W -X P2[8] 65 1100 -1100 150 L 50 50 1 1 B -X P2[0] 75 1100 -300 150 L 50 50 1 1 B -X P4[29] 85 1100 -2100 150 L 50 50 1 1 B -X P1[0] 95 1100 2300 150 L 50 50 1 1 B -X RTCX1 16 -1100 -1800 150 R 50 50 1 1 I -X P3[26] 26 1100 -1800 150 L 50 50 1 1 B -X P1[22] 36 1100 800 150 L 50 50 1 1 B -X P0[0] 46 -1100 2300 150 R 50 50 1 1 B -X P0[22] 56 -1100 400 150 R 50 50 1 1 B -X P2[7] 66 1100 -1000 150 L 50 50 1 1 B -X P0[9] 76 -1100 1400 150 R 50 50 1 1 B -X P1[17] 86 1100 1300 150 L 50 50 1 1 B -X VDD(3V3) 96 -100 2600 150 D 50 50 1 1 W -X ~RESET~ 17 -1100 -1300 150 R 50 50 1 1 I -X P3[25] 27 1100 -1700 150 L 50 50 1 1 B -X P1[23] 37 1100 700 150 L 50 50 1 1 B -X P0[1] 47 -1100 2200 150 R 50 50 1 1 B -X P0[21] 57 -1100 500 150 R 50 50 1 1 B -X P2[6] 67 1100 -900 150 L 50 50 1 1 B -X P0[8] 77 -1100 1500 150 R 50 50 1 1 B -X P1[16] 87 1100 1400 150 L 50 50 1 1 B -X VSS 97 -100 -2600 150 U 50 50 1 1 W -X RTCX2 18 -1100 -1900 150 R 50 50 1 1 O -X VDD(3V3) 28 -400 2600 150 D 50 50 1 1 W -X P1[24] 38 1100 600 150 L 50 50 1 1 B -X P0[10] 48 -1100 1300 150 R 50 50 1 1 B -X P0[20] 58 -1100 600 150 R 50 50 1 1 B -X P2[5] 68 1100 -800 150 L 50 50 1 1 B -X P0[7] 78 -1100 1600 150 R 50 50 1 1 B -X P1[15] 88 1100 1500 150 L 50 50 1 1 B -X P0[2] 98 -1100 2100 150 R 50 50 1 1 B -X VBAT 19 -1100 -2100 150 R 50 50 1 1 I -X P0[29] 29 -1100 -300 150 R 50 50 1 1 B -X P1[25] 39 1100 500 150 L 50 50 1 1 B -X P0[11] 49 -1100 1200 150 R 50 50 1 1 B -X P0[19] 59 -1100 700 150 R 50 50 1 1 B -X P2[4] 69 1100 -700 150 L 50 50 1 1 B -X P0[6] 79 -1100 1700 150 R 50 50 1 1 B -X P1[14] 89 1100 1600 150 L 50 50 1 1 B -X P0[3] 99 -1100 2000 150 R 50 50 1 1 B -X RTCK 100 -1100 -600 150 R 50 50 1 1 O +S -750 2350 750 -2350 0 1 10 f +X TDO/SWO 1 -900 -800 150 R 50 50 1 1 O +X TDI 2 -900 -900 150 R 50 50 1 1 I +X TMS/SWDIO 3 -900 -1000 150 R 50 50 1 1 B +X ~TRST~ 4 -900 -1100 150 R 50 50 1 1 I +X TCK/SWDCLK 5 -900 -1200 150 R 50 50 1 1 I +X P0[26] 6 -900 -100 150 R 50 50 1 1 B +X P0[25] 7 -900 0 150 R 50 50 1 1 B +X P0[24] 8 -900 100 150 R 50 50 1 1 B +X P0[23] 9 -900 200 150 R 50 50 1 1 B +X VDDA 10 400 2500 150 D 50 50 1 1 W +X P1[31] 20 900 -100 150 L 50 50 1 1 B +X P0[30] 30 -900 -500 150 R 50 50 1 1 B +X P1[26] 40 900 400 150 L 50 50 1 1 B +X P2[13] 50 900 -1600 150 L 50 50 1 1 B +X P0[18] 60 -900 700 150 R 50 50 1 1 B +X P2[3] 70 900 -600 150 L 50 50 1 1 B +X P0[5] 80 -900 1700 150 R 50 50 1 1 B +X P1[10] 90 900 1700 150 L 50 50 1 1 B +X VSSA 11 300 -2500 150 U 50 50 1 1 W +X P1[30] 21 900 0 150 L 50 50 1 1 B +X VSS 31 -400 -2500 150 U 50 50 1 1 W +X VSS 41 -300 -2500 150 U 50 50 1 1 W +X P2[12] 51 900 -1500 150 L 50 50 1 1 B +X P0[17] 61 -900 800 150 R 50 50 1 1 B +X VDD(3V3) 71 -200 2500 150 D 50 50 1 1 W +X P0[4] 81 -900 1800 150 R 50 50 1 1 B +X P1[9] 91 900 1800 150 L 50 50 1 1 B +X VREFP 12 300 2500 150 D 50 50 1 1 W +X XTAL1 22 -900 -1700 150 R 50 50 1 1 I +X P1[18] 32 900 1200 150 L 50 50 1 1 B +X VDD(REG)(3V3) 42 0 2500 150 D 50 50 1 1 W +X P2[11] 52 900 -1400 150 L 50 50 1 1 B +X P0[15] 62 -900 1000 150 R 50 50 1 1 B +X VSS 72 -100 -2500 150 U 50 50 1 1 W +X P4[28] 82 900 -2100 150 L 50 50 1 1 B +X P1[8] 92 900 1900 150 L 50 50 1 1 B +X NC 13 -900 -2200 150 R 50 50 1 1 N N +X XTAL2 23 -900 -1800 150 R 50 50 1 1 O +X P1[19] 33 900 1100 150 L 50 50 1 1 B +X P1[27] 43 900 300 150 L 50 50 1 1 B +X P2[10] 53 900 -1300 150 L 50 50 1 1 B +X P0[16] 63 -900 900 150 R 50 50 1 1 B +X P2[2] 73 900 -500 150 L 50 50 1 1 B +X VSS 83 0 -2500 150 U 50 50 1 1 W +X P1[4] 93 900 2000 150 L 50 50 1 1 B +X ~RSTOUT~ 14 -900 -1500 150 R 50 50 1 1 O +X P0[28] 24 -900 -300 150 R 50 50 1 1 B +X P1[20] 34 900 1000 150 L 50 50 1 1 B +X P1[28] 44 900 200 150 L 50 50 1 1 B +X VDD(3V3) 54 -300 2500 150 D 50 50 1 1 W +X P2[9] 64 900 -1200 150 L 50 50 1 1 B +X P2[1] 74 900 -400 150 L 50 50 1 1 B +X VDD(REG)(3V3) 84 100 2500 150 D 50 50 1 1 W +X P1[1] 94 900 2100 150 L 50 50 1 1 B +X VREFN 15 200 -2500 150 U 50 50 1 1 W +X P0[27] 25 -900 -200 150 R 50 50 1 1 B +X P1[21] 35 900 900 150 L 50 50 1 1 B +X P1[29] 45 900 100 150 L 50 50 1 1 B +X VSS 55 -200 -2500 150 U 50 50 1 1 W +X P2[8] 65 900 -1100 150 L 50 50 1 1 B +X P2[0] 75 900 -300 150 L 50 50 1 1 B +X P4[29] 85 900 -2200 150 L 50 50 1 1 B +X P1[0] 95 900 2200 150 L 50 50 1 1 B +X RTCX1 16 -900 -1900 150 R 50 50 1 1 I +X P3[26] 26 900 -1900 150 L 50 50 1 1 B +X P1[22] 36 900 800 150 L 50 50 1 1 B +X P0[0] 46 -900 2200 150 R 50 50 1 1 B +X P0[22] 56 -900 300 150 R 50 50 1 1 B +X P2[7] 66 900 -1000 150 L 50 50 1 1 B +X P0[9] 76 -900 1300 150 R 50 50 1 1 B +X P1[17] 86 900 1300 150 L 50 50 1 1 B +X VDD(3V3) 96 -100 2500 150 D 50 50 1 1 W +X ~RESET~ 17 -900 -1400 150 R 50 50 1 1 I +X P3[25] 27 900 -1800 150 L 50 50 1 1 B +X P1[23] 37 900 700 150 L 50 50 1 1 B +X P0[1] 47 -900 2100 150 R 50 50 1 1 B +X P0[21] 57 -900 400 150 R 50 50 1 1 B +X P2[6] 67 900 -900 150 L 50 50 1 1 B +X P0[8] 77 -900 1400 150 R 50 50 1 1 B +X P1[16] 87 900 1400 150 L 50 50 1 1 B +X VSS 97 100 -2500 150 U 50 50 1 1 W +X RTCX2 18 -900 -2000 150 R 50 50 1 1 O +X VDD(3V3) 28 -400 2500 150 D 50 50 1 1 W +X P1[24] 38 900 600 150 L 50 50 1 1 B +X P0[10] 48 -900 1200 150 R 50 50 1 1 B +X P0[20] 58 -900 500 150 R 50 50 1 1 B +X P2[5] 68 900 -800 150 L 50 50 1 1 B +X P0[7] 78 -900 1500 150 R 50 50 1 1 B +X P1[15] 88 900 1500 150 L 50 50 1 1 B +X P0[2] 98 -900 2000 150 R 50 50 1 1 B +X VBAT 19 200 2500 150 D 50 50 1 1 W +X P0[29] 29 -900 -400 150 R 50 50 1 1 B +X P1[25] 39 900 500 150 L 50 50 1 1 B +X P0[11] 49 -900 1100 150 R 50 50 1 1 B +X P0[19] 59 -900 600 150 R 50 50 1 1 B +X P2[4] 69 900 -700 150 L 50 50 1 1 B +X P0[6] 79 -900 1600 150 R 50 50 1 1 B +X P1[14] 89 900 1600 150 L 50 50 1 1 B +X P0[3] 99 -900 1900 150 R 50 50 1 1 B +X RTCK 100 -900 -700 150 R 50 50 1 1 O ENDDRAW ENDDEF # From 69a9b67068ad5ac60fdab3ff1585f470153e5a17 Mon Sep 17 00:00:00 2001 From: hackscribble Date: Mon, 1 May 2017 14:09:21 +0100 Subject: [PATCH 4/8] Fixed KLC errors in 1102. Added symbol for 1104. --- library/nxp_armmcu.dcm | 12 +++++-- library/nxp_armmcu.lib | 74 ++++++++++++++++++++++++++++++------------ 2 files changed, 63 insertions(+), 23 deletions(-) diff --git a/library/nxp_armmcu.dcm b/library/nxp_armmcu.dcm index 04c52939..5748b71c 100644 --- a/library/nxp_armmcu.dcm +++ b/library/nxp_armmcu.dcm @@ -1,9 +1,15 @@ EESchema-DOCLIB Version 2.0 # $CMP LPC1102UK -D 32-bit ARM Cortex-M0 microcontroller, 32kB Flash, 8kB SRAM, UART, SPI, ADC 5ch -K ARM, 32bit, CortexM0, M0, NXP, Microcontroller -F http://www.nxp.com/documents/data_sheet/LPC1102.pdf +D 32-bit ARM Cortex-M0 microcontroller, 32kB flash, 8kB SRAM +K ARM, 32-bit, Cortex-M0, M0, NXP, microcontroller +F http://www.nxp.com/documents/data_sheet/LPC1102_1104.pdf +$ENDCMP +# +$CMP LPC1104UK +D 32-bit ARM Cortex-M0 microcontroller, 32kB flash, 8kB SRAM +K ARM, 32-bit, Cortex-M0, M0, NXP, microcontroller +F http://www.nxp.com/documents/data_sheet/LPC1102_1104.pdf $ENDCMP # $CMP LPC1111FHN33-101 diff --git a/library/nxp_armmcu.lib b/library/nxp_armmcu.lib index ba4d56a7..f9e53ee4 100644 --- a/library/nxp_armmcu.lib +++ b/library/nxp_armmcu.lib @@ -4,28 +4,62 @@ EESchema-LIBRARY Version 2.3 # LPC1102UK # DEF LPC1102UK U 0 40 Y Y 1 F N -F0 "U" -950 450 50 H V C CNN -F1 "LPC1102UK" 750 -400 50 H V C CNN -F2 "WLCSP16" -800 -400 50 H I C CNN +F0 "U" -500 600 50 H V C CNN +F1 "LPC1102UK" 400 600 50 H V C CNN +F2 "Housings_BGA:WLCSP16" -700 -600 50 H I C CNN F3 "" 0 0 50 H I C CNN +$FPLIST + *WLCSP*16* +$ENDFPLIST DRAW -S -1000 400 1000 -350 0 1 0 f -X PIO0_8/MISO/CT16B0_MAT0 A1 -1150 200 150 R 35 35 1 1 B -X VDD A1 100 550 150 D 35 35 1 1 W -X VSS B1 100 -500 150 U 35 35 1 1 W -X PIO0_0/~RESET~ C1 -1150 300 150 R 35 35 1 1 B -X PIO1_7/TXD/CT32B0_MAT1 D1 1150 -200 150 L 35 35 1 1 B -X XTALIN B2 -1150 -250 150 R 35 35 1 1 I -X PIO1_6/RXD/CT32B0_MAT0 C2 1150 -100 150 L 35 35 1 1 B -X VDD D2 -100 550 150 D 35 35 1 1 W -X PIO0_9/MOSI/CT16B0_MAT1 A3 -1150 100 150 R 35 35 1 1 B -X PIO1_0/AD1/CT32B1_CAP0/R B3 1150 300 150 L 35 35 1 1 B -X PIO1_2/AD3/CT32B1_MAT1/R C3 1150 100 150 L 35 35 1 1 B -X VSS D3 -100 -500 150 U 35 35 1 1 W -X PIO0_10/SCK/CT16B0_MAT2/SWCLK A4 -1150 0 150 R 35 35 1 1 B -X PIO0_11/AD0/CT32B0_MAT3/R B4 -1150 -100 150 R 35 35 1 1 B -X PIO1_1/AD2/CT32B1_MAT0/R C4 1150 200 150 L 35 35 1 1 B -X PIO1_3/AD4/CT32B1_MAT2/SWDIO D4 1150 0 150 L 35 35 1 1 B +S -550 550 550 -550 0 1 10 f +X VDD A1 100 700 150 D 50 50 1 1 W +X VSS B1 100 -700 150 U 50 50 1 1 W +X PIO0_0 C1 -700 400 150 R 50 50 1 1 B +X PIO1_7 D1 700 -100 150 L 50 50 1 1 B +X PIO0_8 A2 -700 300 150 R 50 50 1 1 B +X XTALIN B2 -700 -400 150 R 50 50 1 1 I +X PIO1_6 C2 700 0 150 L 50 50 1 1 B +X VDD D2 -100 700 150 D 50 50 1 1 W +X PIO0_9 A3 -700 200 150 R 50 50 1 1 B +X PIO1_0 B3 700 400 150 L 50 50 1 1 B +X PIO1_2 C3 700 200 150 L 50 50 1 1 B +X VSS D3 -100 -700 150 U 50 50 1 1 W +X PIO0_10 A4 -700 100 150 R 50 50 1 1 B +X PIO0_11 B4 -700 0 150 R 50 50 1 1 B +X PIO1_1 C4 700 300 150 L 50 50 1 1 B +X PIO1_3 D4 700 100 150 L 50 50 1 1 B +ENDDRAW +ENDDEF +# +# LPC1104UK +# +DEF LPC1104UK U 0 40 Y Y 1 F N +F0 "U" -500 600 50 H V C CNN +F1 "LPC1104UK" 400 600 50 H V C CNN +F2 "Housings_BGA:WLCSP16" -700 -600 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + *WLCSP*16* +$ENDFPLIST +DRAW +S -550 550 550 -550 0 1 10 f +X PIO0_6 A1 -700 200 150 R 50 50 1 1 B +X XTALIN B1 -700 -400 150 R 50 50 1 1 I +X PIO0_1 C1 -700 300 150 R 50 50 1 1 B +X PIO1_7 D1 700 -100 150 L 50 50 1 1 B +X PIO0_10 A2 -700 -100 150 R 50 50 1 1 B +X PIO0_0 B2 -700 400 150 R 50 50 1 1 B +X PIO1_6 C2 700 0 150 L 50 50 1 1 B +X VDD D2 0 700 150 D 50 50 1 1 W +X PIO0_8 A3 -700 100 150 R 50 50 1 1 B +X PIO1_0 B3 700 400 150 L 50 50 1 1 B +X PIO1_2 C3 700 200 150 L 50 50 1 1 B +X VSS D3 0 -700 150 U 50 50 1 1 W +X PIO0_9 A4 -700 0 150 R 50 50 1 1 B +X PIO0_11 B4 -700 -200 150 R 50 50 1 1 B +X PIO1_1 C4 700 300 150 L 50 50 1 1 B +X PIO1_3 D4 700 100 150 L 50 50 1 1 B ENDDRAW ENDDEF # From b110ed3ec463417da8dd742c0bc97f76bff3c7db Mon Sep 17 00:00:00 2001 From: hackscribble Date: Mon, 1 May 2017 15:20:33 +0100 Subject: [PATCH 5/8] Fixed footprnt name. --- library/nxp_armmcu.lib | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/library/nxp_armmcu.lib b/library/nxp_armmcu.lib index f9e53ee4..cbf23330 100644 --- a/library/nxp_armmcu.lib +++ b/library/nxp_armmcu.lib @@ -6,7 +6,7 @@ EESchema-LIBRARY Version 2.3 DEF LPC1102UK U 0 40 Y Y 1 F N F0 "U" -500 600 50 H V C CNN F1 "LPC1102UK" 400 600 50 H V C CNN -F2 "Housings_BGA:WLCSP16" -700 -600 50 H I C CNN +F2 "Housings_BGA:WLCSP-16" -700 -600 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST *WLCSP*16* @@ -37,7 +37,7 @@ ENDDEF DEF LPC1104UK U 0 40 Y Y 1 F N F0 "U" -500 600 50 H V C CNN F1 "LPC1104UK" 400 600 50 H V C CNN -F2 "Housings_BGA:WLCSP16" -700 -600 50 H I C CNN +F2 "Housings_BGA:WLCSP-16" -700 -600 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST *WLCSP*16* From 67c28115f6ab081c2d783ba7089d62c75b286016 Mon Sep 17 00:00:00 2001 From: hackscribble Date: Wed, 24 May 2017 11:49:18 +0100 Subject: [PATCH 6/8] Fixed footprint name and filter. --- library/nxp_armmcu.lib | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/library/nxp_armmcu.lib b/library/nxp_armmcu.lib index cbf23330..76fdefa8 100644 --- a/library/nxp_armmcu.lib +++ b/library/nxp_armmcu.lib @@ -6,10 +6,10 @@ EESchema-LIBRARY Version 2.3 DEF LPC1102UK U 0 40 Y Y 1 F N F0 "U" -500 600 50 H V C CNN F1 "LPC1102UK" 400 600 50 H V C CNN -F2 "Housings_BGA:WLCSP-16" -700 -600 50 H I C CNN +F2 "Housings_CSP:WLCSP-16_4x4_2.17x2.32mm_Pitch0.5mm" -1300 -600 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST - *WLCSP*16* + WLCSP2.17x2.32* $ENDFPLIST DRAW S -550 550 550 -550 0 1 10 f @@ -37,10 +37,10 @@ ENDDEF DEF LPC1104UK U 0 40 Y Y 1 F N F0 "U" -500 600 50 H V C CNN F1 "LPC1104UK" 400 600 50 H V C CNN -F2 "Housings_BGA:WLCSP-16" -700 -600 50 H I C CNN +F2 "Housings_CSP:WLCSP-16_4x4_2.17x2.32mm_Pitch0.5mm" -1200 -600 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST - *WLCSP*16* + WLCSP2.17x2.32* $ENDFPLIST DRAW S -550 550 550 -550 0 1 10 f From 65ed597dd5a21333553b7b9ab31f06b40d617b68 Mon Sep 17 00:00:00 2001 From: hackscribble Date: Thu, 25 May 2017 08:48:43 +0100 Subject: [PATCH 7/8] Updated footprint filter. --- library/nxp_armmcu.lib | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/library/nxp_armmcu.lib b/library/nxp_armmcu.lib index 76fdefa8..f2ee4135 100644 --- a/library/nxp_armmcu.lib +++ b/library/nxp_armmcu.lib @@ -9,7 +9,7 @@ F1 "LPC1102UK" 400 600 50 H V C CNN F2 "Housings_CSP:WLCSP-16_4x4_2.17x2.32mm_Pitch0.5mm" -1300 -600 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST - WLCSP2.17x2.32* + *WLCSP*2.17x2.32* $ENDFPLIST DRAW S -550 550 550 -550 0 1 10 f @@ -40,7 +40,7 @@ F1 "LPC1104UK" 400 600 50 H V C CNN F2 "Housings_CSP:WLCSP-16_4x4_2.17x2.32mm_Pitch0.5mm" -1200 -600 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST - WLCSP2.17x2.32* + *WLCSP*2.17x2.32* $ENDFPLIST DRAW S -550 550 550 -550 0 1 10 f From b9c7bbd191186fc1c6be00321ed44f7455c78824 Mon Sep 17 00:00:00 2001 From: hackscribble Date: Thu, 25 May 2017 16:04:57 +0100 Subject: [PATCH 8/8] Updated footprint filter in LPC176x. --- library/nxp_armmcu.lib | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/library/nxp_armmcu.lib b/library/nxp_armmcu.lib index f2ee4135..966b64b1 100644 --- a/library/nxp_armmcu.lib +++ b/library/nxp_armmcu.lib @@ -361,7 +361,7 @@ F2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" -1450 -2450 50 H I C CNN F3 "" 0 -100 50 H I C CNN ALIAS LPC1764FBD100 LPC1765FBD100 LPC1766FBD100 LPC1767FBD100 LPC1768FBD100 LPC1769FBD100 $FPLIST - *L*QFP*100* + *L*QFP*14x14* $ENDFPLIST DRAW S -750 2350 750 -2350 0 1 10 f