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ATMEGA8U2 symbol added to atmel.lib

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This commit is contained in:
nidhogg 2014-10-22 17:44:50 +05:30
parent 323366af1d
commit 90da07fe20
1 changed files with 163 additions and 116 deletions
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279
library/atmel.lib
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@ -5086,122 +5086,6 @@ X (ADC1)PA1 39 1000 1600 150 L 40 40 1 1 B
ENDDRAW
ENDDEF
#
# ATmega32U4
#
DEF ATmega32U4 U 0 40 Y Y 1 F N
F0 "U" -900 1700 60 H V C CNN
F1 "ATmega32U4" -650 -1550 60 H V C CNN
F2 "" 1200 1100 60 H V C CNN
F3 "" 1200 1100 60 H V C CNN
$FPLIST
TQFP44
QFN
$ENDFPLIST
DRAW
S -950 1650 900 -1450 0 1 0 N
X (INT6/AIN0)PE6 1 1200 -650 300 L 50 50 1 1 I
X UVCC 2 -1250 1550 300 R 50 50 1 1 I
X D- 3 -1250 650 300 R 50 50 1 1 I
X D+ 4 -1250 750 300 R 50 50 1 1 I
X UGNG 5 -1250 450 300 R 50 50 1 1 I
X UCAP 6 -1250 550 300 R 50 50 1 1 I
X VBUS 7 -1250 850 300 R 50 50 1 1 I
X (SS/PCINT0)PB0 8 1200 1550 300 L 50 50 1 1 I
X (SCLK/PCINT1)PB1 9 1200 1450 300 L 50 50 1 1 I
X (PDI/MOSI/PCINT2)PB2 10 1200 1350 300 L 50 50 1 1 I
X (RXD/INT2)PD2 20 1200 150 300 L 50 50 1 1 I
X (ADC13/OC1B/OC4B/PCINT13)PB6 30 1200 950 300 L 50 50 1 1 I
X (ADC1)PF1 40 1200 -950 300 L 50 50 1 1 I
X (PDO/MISO/PCINT3)PB3 11 1200 1250 300 L 50 50 1 1 I
X (TXD/INT3)PD3 21 1200 50 300 L 50 50 1 1 I
X (OC3A/~OC4A~)PC6 31 1200 650 300 L 50 50 1 1 I
X (ADC0)PF0 41 1200 -850 300 L 50 50 1 1 I
X (OC0A/OC1C/~RTS~/PCINT7)PB7 12 1200 850 300 L 50 50 1 1 I
X (XCK1/~CTS~)PD5 22 1200 -150 300 L 50 50 1 1 I
X (ICP3/CLK0/OC4A)PC7 32 1200 550 300 L 50 50 1 1 I
X AREF 42 -1250 1150 300 R 50 50 1 1 I
X RESET 13 -1250 150 300 R 50 50 1 1 I
X GND 23 -1250 -1250 300 R 50 50 1 1 I
X (~HWB~)PE2 33 1200 -550 300 L 50 50 1 1 I
X GND 43 -1250 -1150 300 R 50 50 1 1 I
X VCC 14 -1250 1450 300 R 50 50 1 1 I
X AVCC 24 -1250 1050 300 R 50 50 1 1 I
X VCC 34 -1250 1350 300 R 50 50 1 1 I
X AVCC 44 -1250 1250 300 R 50 50 1 1 I
X GND 15 -1250 -1350 300 R 50 50 1 1 I
X (ICP2/ADC8)PD4 25 1200 -50 300 L 50 50 1 1 I
X GND 35 -1250 -1050 300 R 50 50 1 1 I
X XTAL2 16 -1250 -550 300 R 50 50 1 1 I
X (T1/~OC4D~/ADC9)PD6 26 1200 -250 300 L 50 50 1 1 I
X (ADC7/TDI)PF7 36 1200 -1350 300 L 50 50 1 1 I
X XTAL1 17 -1250 -450 300 R 50 50 1 1 I
X (T0/OC4D/ADC10)PD7 27 1200 -350 300 L 50 50 1 1 I
X (ADC6/TDO)PF6 37 1200 -1250 300 L 50 50 1 1 I
X (OC0B/SCL/INT0)PD0 18 1200 350 300 L 50 50 1 1 I
X (ADC11/PCINT4)PB4 28 1200 1150 300 L 50 50 1 1 I
X (ADC5/TMS)PF5 38 1200 -1150 300 L 50 50 1 1 I
X (SDA/INT1)PD1 19 1200 250 300 L 50 50 1 1 I
X (ADC12/OC1A/~OC4B~/PCINT12)PB5 29 1200 1050 300 L 50 50 1 1 I
X (ADC4/TCK)PF4 39 1200 -1050 300 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
# ATmega32U4-AU
#
DEF ATmega32U4-AU U 0 40 Y Y 1 F N
F0 "U" -900 1700 60 H V C CNN
F1 "ATmega32U4-AU" -650 -1550 60 H V C CNN
F2 "" 1200 1100 60 H V C CNN
F3 "" 1200 1100 60 H V C CNN
DRAW
S -950 1650 900 -1450 0 1 0 N
X (INT6/AIN0)PE6 1 1200 -650 300 L 50 50 1 1 I
X UVCC 2 -1250 1550 300 R 50 50 1 1 I
X D- 3 -1250 650 300 R 50 50 1 1 I
X D+ 4 -1250 750 300 R 50 50 1 1 I
X UGNG 5 -1250 450 300 R 50 50 1 1 I
X UCAP 6 -1250 550 300 R 50 50 1 1 I
X VBUS 7 -1250 850 300 R 50 50 1 1 I
X (SS/PCINT0)PB0 8 1200 1550 300 L 50 50 1 1 I
X (SCLK/PCINT1)PB1 9 1200 1450 300 L 50 50 1 1 I
X (PDI/MOSI/PCINT2)PB2 10 1200 1350 300 L 50 50 1 1 I
X (RXD/INT2)PD2 20 1200 150 300 L 50 50 1 1 I
X (ADC13/OC1B/OC4B/PCINT13)PB6 30 1200 950 300 L 50 50 1 1 I
X (ADC1)PF1 40 1200 -950 300 L 50 50 1 1 I
X (PDO/MISO/PCINT3)PB3 11 1200 1250 300 L 50 50 1 1 I
X (TXD/INT3)PD3 21 1200 50 300 L 50 50 1 1 I
X (OC3A/~OC4A~)PC6 31 1200 650 300 L 50 50 1 1 I
X (ADC0)PF0 41 1200 -850 300 L 50 50 1 1 I
X (OC0A/OC1C/~RTS~/PCINT7)PB7 12 1200 850 300 L 50 50 1 1 I
X (XCK1/~CTS~)PD5 22 1200 -150 300 L 50 50 1 1 I
X (ICP3/CLK0/OC4A)PC7 32 1200 550 300 L 50 50 1 1 I
X AREF 42 -1250 1150 300 R 50 50 1 1 I
X RESET 13 -1250 150 300 R 50 50 1 1 I
X GND 23 -1250 -1250 300 R 50 50 1 1 I
X (~HWB~)PE2 33 1200 -550 300 L 50 50 1 1 I
X GND 43 -1250 -1150 300 R 50 50 1 1 I
X VCC 14 -1250 1450 300 R 50 50 1 1 I
X AVCC 24 -1250 1050 300 R 50 50 1 1 I
X VCC 34 -1250 1350 300 R 50 50 1 1 I
X AVCC 44 -1250 1250 300 R 50 50 1 1 I
X GND 15 -1250 -1350 300 R 50 50 1 1 I
X (ICP2/ADC8)PD4 25 1200 -50 300 L 50 50 1 1 I
X GND 35 -1250 -1050 300 R 50 50 1 1 I
X XTAL2 16 -1250 -550 300 R 50 50 1 1 I
X (T1/~OC4D~/ADC9)PD6 26 1200 -250 300 L 50 50 1 1 I
X (ADC7/TDI)PF7 36 1200 -1350 300 L 50 50 1 1 I
X XTAL1 17 -1250 -450 300 R 50 50 1 1 I
X (T0/OC4D/ADC10)PD7 27 1200 -350 300 L 50 50 1 1 I
X (ADC6/TDO)PF6 37 1200 -1250 300 L 50 50 1 1 I
X (OC0B/SCL/INT0)PD0 18 1200 350 300 L 50 50 1 1 I
X (ADC11/PCINT4)PB4 28 1200 1150 300 L 50 50 1 1 I
X (ADC5/TMS)PF5 38 1200 -1150 300 L 50 50 1 1 I
X (SDA/INT1)PD1 19 1200 250 300 L 50 50 1 1 I
X (ADC12/OC1A/~OC4B~/PCINT12)PB5 29 1200 1050 300 L 50 50 1 1 I
X (ADC4/TCK)PF4 39 1200 -1050 300 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
# ATMEGA64-A
#
DEF ATMEGA64-A IC 0 40 Y Y 1 F N
@ -6248,6 +6132,53 @@ X (ADC1)PA1 39 1000 1600 150 L 40 40 1 1 B
ENDDRAW
ENDDEF
#
# ATMEGA8U2
#
DEF ATMEGA8U2 IC 0 40 Y Y 1 F N
F0 "IC" -850 1300 60 H V C CNN
F1 "ATMEGA8U2" 750 -1300 50 H V C CNN
F2 "TQFP-32" -100 0 50 H V C CNN
F3 "http://www.atmel.com/Images/doc7799.pdf" 100 -1400 50 H I C CNN
$FPLIST
TQFP-32
$ENDFPLIST
DRAW
S -950 1200 1000 -1200 0 1 10 f
X XTAL1 1 -1100 150 150 R 50 50 1 1 B
X PC0(XTAL2) 2 -1100 50 150 R 50 50 1 1 B
X GND 3 -1100 350 150 R 50 50 1 1 W
X VCC 4 -1100 450 150 R 50 50 1 1 W
X (PCINT11/AIN2)PC2 5 1150 -650 150 L 50 50 1 1 B
X (OC.0B/INT0)PD0 6 1150 200 150 L 50 50 1 1 B
X (AIN0/INT1)PD1 7 1150 100 150 L 50 50 1 1 B
X (RXD1/AIN1/INT2)PD2 8 1150 0 150 L 50 50 1 1 B
X (TXD1/INT3)PD3 9 1150 -100 150 L 50 50 1 1 B
X (INT5/AIN3)PD4 10 1150 -200 150 L 50 50 1 1 B
X (PCINT6)PB6 20 1150 450 150 L 50 50 1 1 B
X D- 30 -1100 -500 150 R 50 50 1 1 B
X (XCK/AIN4/PCINT12)PD5 11 1150 -300 150 L 50 50 1 1 B
X (PCINT7/OC.0A/OC.1C)PB7 21 1150 350 150 L 50 50 1 1 B
X UVCC 31 -1100 -600 150 R 50 50 1 1 W
X (RTS/AIN5/INT6)PD6 12 1150 -400 150 L 50 50 1 1 B
X (INT4/ICP1/CLK0)PC7 22 1150 -1050 150 L 50 50 1 1 B
X AVCC 32 -1100 550 150 R 50 50 1 1 W
X (HWB/AIN6/T0/INT7)PD7 13 1150 -500 150 L 50 50 1 1 B
X (OC.1A/PCINT8)PC6 23 1150 -950 150 L 50 50 1 1 B
X (SS/PCINT0)PB0 14 1150 1050 150 L 50 50 1 1 B
X PC1(RESET/dW) 24 -1100 650 150 R 50 50 1 1 B
X (SCLK/PCINT1)PB1 15 1150 950 150 L 50 50 1 1 B
X (PCINT9/OC.1B)PC5 25 1150 -850 150 L 50 50 1 1 B
X (PDI/MOSI/PCINT2)PB2 16 1150 850 150 L 50 50 1 1 B
X (PCINT10)PC4 26 1150 -750 150 L 50 50 1 1 B
X (PD0/MISO/PCINT3)PB3 17 1150 750 150 L 50 50 1 1 B
X UCAP 27 -1100 -200 150 R 50 50 1 1 P
X (T1/PCINT4)PB4 18 1150 650 150 L 50 50 1 1 B
X UGND 28 -1100 -300 150 R 50 50 1 1 W
X (PCINT5)PB5 19 1150 550 150 L 50 50 1 1 B
X D+ 29 -1100 -400 150 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# ATTINY10-P
#
DEF ATTINY10-P IC 0 40 Y Y 1 F N
@ -10566,6 +10497,122 @@ X AC0OUT/AC7/ADC7/PA7 29 1300 100 150 L 40 35 1 1 B
ENDDRAW
ENDDEF
#
# ATmega32U4
#
DEF ATmega32U4 U 0 40 Y Y 1 F N
F0 "U" -900 1700 60 H V C CNN
F1 "ATmega32U4" -650 -1550 60 H V C CNN
F2 "" 1200 1100 60 H V C CNN
F3 "" 1200 1100 60 H V C CNN
$FPLIST
TQFP44
QFN
$ENDFPLIST
DRAW
S -950 1650 900 -1450 0 1 0 N
X (INT6/AIN0)PE6 1 1200 -650 300 L 50 50 1 1 I
X UVCC 2 -1250 1550 300 R 50 50 1 1 I
X D- 3 -1250 650 300 R 50 50 1 1 I
X D+ 4 -1250 750 300 R 50 50 1 1 I
X UGNG 5 -1250 450 300 R 50 50 1 1 I
X UCAP 6 -1250 550 300 R 50 50 1 1 I
X VBUS 7 -1250 850 300 R 50 50 1 1 I
X (SS/PCINT0)PB0 8 1200 1550 300 L 50 50 1 1 I
X (SCLK/PCINT1)PB1 9 1200 1450 300 L 50 50 1 1 I
X (PDI/MOSI/PCINT2)PB2 10 1200 1350 300 L 50 50 1 1 I
X (RXD/INT2)PD2 20 1200 150 300 L 50 50 1 1 I
X (ADC13/OC1B/OC4B/PCINT13)PB6 30 1200 950 300 L 50 50 1 1 I
X (ADC1)PF1 40 1200 -950 300 L 50 50 1 1 I
X (PDO/MISO/PCINT3)PB3 11 1200 1250 300 L 50 50 1 1 I
X (TXD/INT3)PD3 21 1200 50 300 L 50 50 1 1 I
X (OC3A/~OC4A~)PC6 31 1200 650 300 L 50 50 1 1 I
X (ADC0)PF0 41 1200 -850 300 L 50 50 1 1 I
X (OC0A/OC1C/~RTS~/PCINT7)PB7 12 1200 850 300 L 50 50 1 1 I
X (XCK1/~CTS~)PD5 22 1200 -150 300 L 50 50 1 1 I
X (ICP3/CLK0/OC4A)PC7 32 1200 550 300 L 50 50 1 1 I
X AREF 42 -1250 1150 300 R 50 50 1 1 I
X RESET 13 -1250 150 300 R 50 50 1 1 I
X GND 23 -1250 -1250 300 R 50 50 1 1 I
X (~HWB~)PE2 33 1200 -550 300 L 50 50 1 1 I
X GND 43 -1250 -1150 300 R 50 50 1 1 I
X VCC 14 -1250 1450 300 R 50 50 1 1 I
X AVCC 24 -1250 1050 300 R 50 50 1 1 I
X VCC 34 -1250 1350 300 R 50 50 1 1 I
X AVCC 44 -1250 1250 300 R 50 50 1 1 I
X GND 15 -1250 -1350 300 R 50 50 1 1 I
X (ICP2/ADC8)PD4 25 1200 -50 300 L 50 50 1 1 I
X GND 35 -1250 -1050 300 R 50 50 1 1 I
X XTAL2 16 -1250 -550 300 R 50 50 1 1 I
X (T1/~OC4D~/ADC9)PD6 26 1200 -250 300 L 50 50 1 1 I
X (ADC7/TDI)PF7 36 1200 -1350 300 L 50 50 1 1 I
X XTAL1 17 -1250 -450 300 R 50 50 1 1 I
X (T0/OC4D/ADC10)PD7 27 1200 -350 300 L 50 50 1 1 I
X (ADC6/TDO)PF6 37 1200 -1250 300 L 50 50 1 1 I
X (OC0B/SCL/INT0)PD0 18 1200 350 300 L 50 50 1 1 I
X (ADC11/PCINT4)PB4 28 1200 1150 300 L 50 50 1 1 I
X (ADC5/TMS)PF5 38 1200 -1150 300 L 50 50 1 1 I
X (SDA/INT1)PD1 19 1200 250 300 L 50 50 1 1 I
X (ADC12/OC1A/~OC4B~/PCINT12)PB5 29 1200 1050 300 L 50 50 1 1 I
X (ADC4/TCK)PF4 39 1200 -1050 300 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
# ATmega32U4-AU
#
DEF ATmega32U4-AU U 0 40 Y Y 1 F N
F0 "U" -900 1700 60 H V C CNN
F1 "ATmega32U4-AU" -650 -1550 60 H V C CNN
F2 "" 1200 1100 60 H V C CNN
F3 "" 1200 1100 60 H V C CNN
DRAW
S -950 1650 900 -1450 0 1 0 N
X (INT6/AIN0)PE6 1 1200 -650 300 L 50 50 1 1 I
X UVCC 2 -1250 1550 300 R 50 50 1 1 I
X D- 3 -1250 650 300 R 50 50 1 1 I
X D+ 4 -1250 750 300 R 50 50 1 1 I
X UGNG 5 -1250 450 300 R 50 50 1 1 I
X UCAP 6 -1250 550 300 R 50 50 1 1 I
X VBUS 7 -1250 850 300 R 50 50 1 1 I
X (SS/PCINT0)PB0 8 1200 1550 300 L 50 50 1 1 I
X (SCLK/PCINT1)PB1 9 1200 1450 300 L 50 50 1 1 I
X (PDI/MOSI/PCINT2)PB2 10 1200 1350 300 L 50 50 1 1 I
X (RXD/INT2)PD2 20 1200 150 300 L 50 50 1 1 I
X (ADC13/OC1B/OC4B/PCINT13)PB6 30 1200 950 300 L 50 50 1 1 I
X (ADC1)PF1 40 1200 -950 300 L 50 50 1 1 I
X (PDO/MISO/PCINT3)PB3 11 1200 1250 300 L 50 50 1 1 I
X (TXD/INT3)PD3 21 1200 50 300 L 50 50 1 1 I
X (OC3A/~OC4A~)PC6 31 1200 650 300 L 50 50 1 1 I
X (ADC0)PF0 41 1200 -850 300 L 50 50 1 1 I
X (OC0A/OC1C/~RTS~/PCINT7)PB7 12 1200 850 300 L 50 50 1 1 I
X (XCK1/~CTS~)PD5 22 1200 -150 300 L 50 50 1 1 I
X (ICP3/CLK0/OC4A)PC7 32 1200 550 300 L 50 50 1 1 I
X AREF 42 -1250 1150 300 R 50 50 1 1 I
X RESET 13 -1250 150 300 R 50 50 1 1 I
X GND 23 -1250 -1250 300 R 50 50 1 1 I
X (~HWB~)PE2 33 1200 -550 300 L 50 50 1 1 I
X GND 43 -1250 -1150 300 R 50 50 1 1 I
X VCC 14 -1250 1450 300 R 50 50 1 1 I
X AVCC 24 -1250 1050 300 R 50 50 1 1 I
X VCC 34 -1250 1350 300 R 50 50 1 1 I
X AVCC 44 -1250 1250 300 R 50 50 1 1 I
X GND 15 -1250 -1350 300 R 50 50 1 1 I
X (ICP2/ADC8)PD4 25 1200 -50 300 L 50 50 1 1 I
X GND 35 -1250 -1050 300 R 50 50 1 1 I
X XTAL2 16 -1250 -550 300 R 50 50 1 1 I
X (T1/~OC4D~/ADC9)PD6 26 1200 -250 300 L 50 50 1 1 I
X (ADC7/TDI)PF7 36 1200 -1350 300 L 50 50 1 1 I
X XTAL1 17 -1250 -450 300 R 50 50 1 1 I
X (T0/OC4D/ADC10)PD7 27 1200 -350 300 L 50 50 1 1 I
X (ADC6/TDO)PF6 37 1200 -1250 300 L 50 50 1 1 I
X (OC0B/SCL/INT0)PD0 18 1200 350 300 L 50 50 1 1 I
X (ADC11/PCINT4)PB4 28 1200 1150 300 L 50 50 1 1 I
X (ADC5/TMS)PF5 38 1200 -1150 300 L 50 50 1 1 I
X (SDA/INT1)PD1 19 1200 250 300 L 50 50 1 1 I
X (ADC12/OC1A/~OC4B~/PCINT12)PB5 29 1200 1050 300 L 50 50 1 1 I
X (ADC4/TCK)PF4 39 1200 -1050 300 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
# AVR-ISP-10
#
DEF AVR-ISP-10 CON 0 40 Y Y 1 F N