update mechanical holes to newly commited schematic symbols.
This commit is contained in:
Ashton Johnson
parent
a7c0b6f1c8
commit
8e002ca039
4 changed files with 306 additions and 297 deletions
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@ -1,4 +1,4 @@
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(kicad_pcb (version 20160815) (host pcbnew no-vcs-found-undefined)
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(kicad_pcb (version 20160815) (host pcbnew 201611191051+7361~55~ubuntu16.04.1-product)
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(general
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(links 10)
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@ -9,7 +9,7 @@
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(tracks 0)
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(zones 0)
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(modules 5)
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(nets 35)
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(nets 31)
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)
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(page A3)
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@ -90,40 +90,36 @@
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)
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(net 0 "")
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(net 1 "Net-(MH1-Pad1)")
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(net 2 "Net-(MH2-Pad1)")
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(net 3 "Net-(MH3-Pad1)")
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(net 4 "Net-(MH4-Pad1)")
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(net 5 +3V3)
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(net 6 +5V)
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(net 7 GND)
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(net 8 /ID_SD)
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(net 9 /ID_SC)
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(net 10 /GPIO5)
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(net 11 /GPIO6)
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(net 12 /GPIO12)
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(net 13 /GPIO13)
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(net 14 /GPIO19)
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(net 15 /GPIO20)
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(net 16 /GPIO26)
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(net 17 /GPIO21)
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(net 18 "/GPIO2(SDA1)")
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(net 19 "/GPIO3(SCL1)")
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(net 20 "/GPIO4(GCLK)")
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(net 21 "/GPIO14(TXD0)")
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(net 22 "/GPIO15(RXD0)")
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(net 23 "/GPIO17(GEN0)")
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(net 24 "/GPIO18(GEN1)")
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(net 25 "/GPIO27(GEN2)")
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(net 26 "/GPIO22(GEN3)")
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(net 27 "/GPIO23(GEN4)")
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(net 28 "/GPIO24(GEN5)")
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(net 29 "/GPIO10(SPI_MOSI)")
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(net 30 "/GPIO9(SPI_MISO)")
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(net 31 "/GPIO25(GEN6)")
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(net 32 "/GPIO11(SPI_CLK)")
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(net 33 "/GPIO8(SPI_CE0_N)")
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(net 34 "/GPIO7(SPI_CE1_N)")
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(net 1 +3V3)
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(net 2 +5V)
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(net 3 GND)
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(net 4 /ID_SD)
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(net 5 /ID_SC)
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(net 6 /GPIO5)
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(net 7 /GPIO6)
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(net 8 /GPIO12)
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(net 9 /GPIO13)
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(net 10 /GPIO19)
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(net 11 /GPIO20)
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(net 12 /GPIO26)
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(net 13 /GPIO21)
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(net 14 "/GPIO2(SDA1)")
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(net 15 "/GPIO3(SCL1)")
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(net 16 "/GPIO4(GCLK)")
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(net 17 "/GPIO14(TXD0)")
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(net 18 "/GPIO15(RXD0)")
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(net 19 "/GPIO17(GEN0)")
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(net 20 "/GPIO18(GEN1)")
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(net 21 "/GPIO27(GEN2)")
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(net 22 "/GPIO22(GEN3)")
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(net 23 "/GPIO23(GEN4)")
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(net 24 "/GPIO24(GEN5)")
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(net 25 "/GPIO10(SPI_MOSI)")
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(net 26 "/GPIO9(SPI_MISO)")
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(net 27 "/GPIO25(GEN6)")
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(net 28 "/GPIO11(SPI_CLK)")
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(net 29 "/GPIO8(SPI_CE0_N)")
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(net 30 "/GPIO7(SPI_CE1_N)")
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(net_class Default "This is the default net class."
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(clearance 0.2)
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@ -164,10 +160,6 @@
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(add_net /ID_SC)
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(add_net /ID_SD)
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(add_net GND)
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(add_net "Net-(MH1-Pad1)")
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(add_net "Net-(MH2-Pad1)")
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(add_net "Net-(MH3-Pad1)")
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(add_net "Net-(MH4-Pad1)")
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)
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(net_class Power ""
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@ -181,12 +173,12 @@
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(diff_pair_width 0.2)
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)
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(module Mounting_Holes:MountingHole_2-5mm (layer F.Cu) (tedit 580C1F55) (tstamp 580CBA7A)
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(module Mounting_Holes:MountingHole_2-5mm (layer F.Cu) (tedit 5834FC00) (tstamp 580CBA7A)
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(at 203.5 97.5 180)
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(descr "Mounting hole, Befestigungsbohrung, 2,5mm, No Annular, Kein Restring,")
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(tags "Mounting hole, Befestigungsbohrung, 2,5mm, No Annular, Kein Restring,")
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(path /580C2C2C)
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(fp_text reference MH1 (at 0 -3.50012 180) (layer F.SilkS)
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(path /5834FB2E)
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(fp_text reference MK1 (at 0 -3.50012 180) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value M2.5 (at 0.09906 3.59918 180) (layer F.Fab)
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@ -194,15 +186,15 @@
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)
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(fp_circle (center 0 0) (end 2.5 0) (layer Cmts.User) (width 0.381))
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(pad 1 thru_hole circle (at 0 0 180) (size 2.5 2.5) (drill 2.5) (layers *.Cu *.Mask)
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(net 1 "Net-(MH1-Pad1)") (solder_mask_margin 1.25) (clearance 1.35))
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(solder_mask_margin 1.25) (clearance 1.35))
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)
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(module Mounting_Holes:MountingHole_2-5mm (layer F.Cu) (tedit 580C1F52) (tstamp 580CBAAE)
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(module Mounting_Holes:MountingHole_2-5mm (layer F.Cu) (tedit 5834FC0B) (tstamp 580CBAAE)
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(at 261.5 97.5 180)
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(descr "Mounting hole, Befestigungsbohrung, 2,5mm, No Annular, Kein Restring,")
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(tags "Mounting hole, Befestigungsbohrung, 2,5mm, No Annular, Kein Restring,")
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(path /580C2C7C)
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(fp_text reference MH2 (at 0 -3.50012 180) (layer F.SilkS)
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(path /5834FC19)
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(fp_text reference MK2 (at 0 -3.50012 180) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value M2.5 (at 0.09906 3.59918 180) (layer F.Fab)
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@ -210,15 +202,15 @@
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)
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(fp_circle (center 0 0) (end 2.5 0) (layer Cmts.User) (width 0.381))
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(pad 1 thru_hole circle (at 0 0 180) (size 2.5 2.5) (drill 2.5) (layers *.Cu *.Mask)
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(net 2 "Net-(MH2-Pad1)") (solder_mask_margin 1.25) (clearance 1.35))
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(solder_mask_margin 1.25) (clearance 1.35))
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)
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(module Mounting_Holes:MountingHole_2-5mm (layer F.Cu) (tedit 580C1F62) (tstamp 580CBAC8)
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(module Mounting_Holes:MountingHole_2-5mm (layer F.Cu) (tedit 5834FC1C) (tstamp 580CBAC8)
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(at 203.5 146.5)
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(descr "Mounting hole, Befestigungsbohrung, 2,5mm, No Annular, Kein Restring,")
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(tags "Mounting hole, Befestigungsbohrung, 2,5mm, No Annular, Kein Restring,")
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(path /580C2C45)
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(fp_text reference MH3 (at 0 -3.50012) (layer F.SilkS)
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(path /5834FBEF)
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(fp_text reference MK3 (at 0 -3.50012) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value M2.5 (at 0.09906 3.59918) (layer F.Fab)
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@ -226,7 +218,7 @@
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)
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(fp_circle (center 0 0) (end 2.5 0) (layer Cmts.User) (width 0.381))
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(pad 1 thru_hole circle (at 0 0) (size 2.5 2.5) (drill 2.5) (layers *.Cu *.Mask)
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(net 3 "Net-(MH3-Pad1)") (solder_mask_margin 1.25) (clearance 1.35))
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(solder_mask_margin 1.25) (clearance 1.35))
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)
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(module Socket_Strips:Socket_Strip_Straight_2x20 (layer F.Cu) (tedit 580C0D63) (tstamp 580C7F66)
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@ -253,85 +245,85 @@
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(fp_line (start 1.27 1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
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(pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 5 +3V3))
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(net 1 +3V3))
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(pad 2 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 6 +5V))
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(net 2 +5V))
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(pad 3 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 18 "/GPIO2(SDA1)"))
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(net 14 "/GPIO2(SDA1)"))
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(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 6 +5V))
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(net 2 +5V))
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(pad 5 thru_hole oval (at 5.08 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 19 "/GPIO3(SCL1)"))
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(net 15 "/GPIO3(SCL1)"))
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(pad 6 thru_hole oval (at 5.08 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 7 GND))
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(net 3 GND))
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(pad 7 thru_hole oval (at 7.62 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 20 "/GPIO4(GCLK)"))
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(net 16 "/GPIO4(GCLK)"))
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(pad 8 thru_hole oval (at 7.62 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 21 "/GPIO14(TXD0)"))
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(net 17 "/GPIO14(TXD0)"))
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(pad 9 thru_hole oval (at 10.16 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 7 GND))
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(net 3 GND))
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(pad 10 thru_hole oval (at 10.16 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 22 "/GPIO15(RXD0)"))
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(net 18 "/GPIO15(RXD0)"))
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(pad 11 thru_hole oval (at 12.7 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 23 "/GPIO17(GEN0)"))
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(net 19 "/GPIO17(GEN0)"))
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(pad 12 thru_hole oval (at 12.7 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 24 "/GPIO18(GEN1)"))
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(net 20 "/GPIO18(GEN1)"))
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(pad 13 thru_hole oval (at 15.24 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 25 "/GPIO27(GEN2)"))
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(net 21 "/GPIO27(GEN2)"))
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(pad 14 thru_hole oval (at 15.24 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 7 GND))
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(net 3 GND))
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(pad 15 thru_hole oval (at 17.78 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 26 "/GPIO22(GEN3)"))
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(net 22 "/GPIO22(GEN3)"))
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(pad 16 thru_hole oval (at 17.78 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 27 "/GPIO23(GEN4)"))
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(net 23 "/GPIO23(GEN4)"))
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(pad 17 thru_hole oval (at 20.32 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 5 +3V3))
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(net 1 +3V3))
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(pad 18 thru_hole oval (at 20.32 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 28 "/GPIO24(GEN5)"))
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(net 24 "/GPIO24(GEN5)"))
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(pad 19 thru_hole oval (at 22.86 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 29 "/GPIO10(SPI_MOSI)"))
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(net 25 "/GPIO10(SPI_MOSI)"))
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(pad 20 thru_hole oval (at 22.86 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 7 GND))
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(net 3 GND))
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(pad 21 thru_hole oval (at 25.4 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 30 "/GPIO9(SPI_MISO)"))
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(net 26 "/GPIO9(SPI_MISO)"))
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(pad 22 thru_hole oval (at 25.4 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 31 "/GPIO25(GEN6)"))
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(net 27 "/GPIO25(GEN6)"))
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(pad 23 thru_hole oval (at 27.94 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 32 "/GPIO11(SPI_CLK)"))
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(net 28 "/GPIO11(SPI_CLK)"))
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(pad 24 thru_hole oval (at 27.94 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 33 "/GPIO8(SPI_CE0_N)"))
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(net 29 "/GPIO8(SPI_CE0_N)"))
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(pad 25 thru_hole oval (at 30.48 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 7 GND))
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(net 3 GND))
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(pad 26 thru_hole oval (at 30.48 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 34 "/GPIO7(SPI_CE1_N)"))
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(net 30 "/GPIO7(SPI_CE1_N)"))
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(pad 27 thru_hole oval (at 33.02 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 8 /ID_SD))
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(net 4 /ID_SD))
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(pad 28 thru_hole oval (at 33.02 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 9 /ID_SC))
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(net 5 /ID_SC))
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(pad 29 thru_hole oval (at 35.56 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 10 /GPIO5))
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(net 6 /GPIO5))
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(pad 30 thru_hole oval (at 35.56 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 7 GND))
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(net 3 GND))
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(pad 31 thru_hole oval (at 38.1 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 11 /GPIO6))
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(net 7 /GPIO6))
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(pad 32 thru_hole oval (at 38.1 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 12 /GPIO12))
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(net 8 /GPIO12))
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(pad 33 thru_hole oval (at 40.64 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 13 /GPIO13))
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(net 9 /GPIO13))
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(pad 34 thru_hole oval (at 40.64 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 7 GND))
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(net 3 GND))
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(pad 35 thru_hole oval (at 43.18 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 14 /GPIO19))
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(net 10 /GPIO19))
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(pad 36 thru_hole oval (at 43.18 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 15 /GPIO20))
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(net 11 /GPIO20))
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(pad 37 thru_hole oval (at 45.72 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 16 /GPIO26))
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(net 12 /GPIO26))
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(pad 38 thru_hole oval (at 45.72 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 17 /GPIO21))
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(net 13 /GPIO21))
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(pad 39 thru_hole oval (at 48.26 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 7 GND))
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(net 3 GND))
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(pad 40 thru_hole oval (at 48.26 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 7 GND))
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(net 3 GND))
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(model Socket_Strips.3dshapes/Socket_Strip_Straight_2x20.wrl
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(at (xyz 0.95 -0.05 0))
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(scale (xyz 1 1 1))
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@ -339,12 +331,12 @@
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)
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)
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(module Mounting_Holes:MountingHole_2-5mm (layer F.Cu) (tedit 580C1F72) (tstamp 580CBAD7)
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(module Mounting_Holes:MountingHole_2-5mm (layer F.Cu) (tedit 5834FC15) (tstamp 580CBAD7)
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(at 261.5 146.5)
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(descr "Mounting hole, Befestigungsbohrung, 2,5mm, No Annular, Kein Restring,")
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(tags "Mounting hole, Befestigungsbohrung, 2,5mm, No Annular, Kein Restring,")
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(path /580C2CAA)
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(fp_text reference MH4 (at 0 -3.50012) (layer F.SilkS)
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(path /5834FC4F)
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(fp_text reference MK4 (at 0 -3.50012) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value M2.5 (at 0.09906 3.59918) (layer F.Fab)
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@ -352,7 +344,7 @@
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)
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(fp_circle (center 0 0) (end 2.5 0) (layer Cmts.User) (width 0.381))
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(pad 1 thru_hole circle (at 0 0) (size 2.5 2.5) (drill 2.5) (layers *.Cu *.Mask)
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(net 4 "Net-(MH4-Pad1)") (solder_mask_margin 1.25) (clearance 1.35))
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(solder_mask_margin 1.25) (clearance 1.35))
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)
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(gr_line (start 244 146) (end 244 131) (layer Edge.Cuts) (width 0.1))
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