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Merge pull request #1612 from Misca1234/CY765211_CY7C65213_CY7C25215

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Cy765211 cy7 c65213 cy7 c25215
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Oliver 2017-09-21 20:57:32 +10:00 committed by GitHub
parent 0c2cb533e4 9a51c56827
commit 73add7ed2e
2 changed files with 231 additions and 0 deletions
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48
library/cypress.dcm
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@ -1,5 +1,53 @@
EESchema-DOCLIB Version 2.0
#
$CMP CY7C65211-24LTXI
D USB-Serial single channel bridge with capsense and BCD, +1.71V to +5.5V VDD, UART/I2C/SPI/RS232/RS422, QFN-24
K USB-Serial single channel bridge
F http://www.cypress.com/file/139886/download
$ENDCMP
#
$CMP CY7C65211A-24LTXI
D USB-Serial single channel bridge with capsense and BCD, +1.71V to +5.5V VDD, UART/I2C/SPI/RS232/RS422/RS485, QFN-24
K USB-Serial single channel bridge
F http://www.cypress.com/file/139886/download
$ENDCMP
#
$CMP CY7C65213-28PVXI
D USB-UART LP Bridge Controller, full speed 12Mbps, +1.71V to 5.5V VDD, UART/RS232/RS422, SSOP-28
K USB-UART LP Bridge Controller, full speed 12Mbps
F http://www.cypress.com/file/139881/download
$ENDCMP
#
$CMP CY7C65213-32LTXI
D USB-UART LP Bridge Controller, full speed 12Mbps, +1.71V to 5.5V VDD, UART/RS232/RS422, QFN-32
K USB-UART LP Bridge Controller, full speed 12Mbps
F http://www.cypress.com/file/139881/download
$ENDCMP
#
$CMP CY7C65213A-28PVXI
D USB-UART LP Bridge Controller, full speed 12Mbps, +1.71V to 5.5V VDD, UART/RS232/RS422/RS485, SSOP-28
K USB-UART LP Bridge Controller, full speed 12Mbps
F http://www.cypress.com/file/139881/download
$ENDCMP
#
$CMP CY7C65213A-32LTXI
D USB-UART LP Bridge Controller, full speed 12Mbps, +1.71V to 5.5V VDD, UART/RS232/RS422/RS485, QFN-32
K USB-UART LP Bridge Controller, full speed 12Mbps
F http://www.cypress.com/file/139881/download
$ENDCMP
#
$CMP CY7C65215-32LTXI
D USB-Serial Dual Channel Bridge with CapSense Full-Speed 12 Mbps, +1.71V to +5.5V VDD, UART/I2C/SPI/RS232/RS422/JTAG, QFN-32
K USB-Serial single channel bridge
F http://www.cypress.com/file/129956/download
$ENDCMP
#
$CMP CY7C65215A-32LTXI
D USB-Serial Dual Channel Bridge with CapSense, +1.71V to +5.5V VDD, UART/I2C/SPI/RS232/RS422/RS485/JTAG, QFN-32
K USB-Serial single channel bridge
F http://www.cypress.com/file/129956/download
$ENDCMP
#
$CMP CY8C4127LQI-BL453
D 56-QFN, 24-MHz ARM® Cortex®-M0, 128KB Flash, 16kB SRAM, NO UDB, CAP-SENSE W/O GESTURE, NO LCD DRIVE
K CYPRESS PSOC BLE CY8 CY8C4 ARM CORTEX M0 BLUETOOTH QFN

183
library/cypress.lib
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@ -271,6 +271,189 @@ X Q7 19 700 0 150 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# CY7C65211-24LTXI
#
DEF CY7C65211-24LTXI U 0 40 Y Y 1 F N
F0 "U" -540 650 50 H V C CNN
F1 "CY7C65211-24LTXI" 130 650 50 H V L CNN
F2 "Housings_DFN_QFN:QFN-24-1EP_4x4mm_Pitch0.5mm" 0 -900 50 H I C CNN
F3 "" -1600 850 50 H I C CNN
ALIAS CY7C65211A-24LTXI
$FPLIST
QFN*1EP*4x4mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -600 600 600 -700 0 1 10 f
X SCB_0/GPIO_6 1 -700 200 100 R 50 50 1 1 B
X SCB_5/GPIO_7 2 -700 -300 100 R 50 50 1 1 B
X VSSD 3 -200 -800 100 U 50 50 1 1 W
X GPIO_8 4 700 -400 100 L 50 50 1 1 T
X GPIO_9 5 700 -300 100 L 50 50 1 1 T
X GPIO_10 6 700 -200 100 L 50 50 1 1 T
X GPIO_11 7 700 -100 100 L 50 50 1 1 T
X SUSPEND 8 700 200 100 L 50 50 1 1 O
X WAKEUP 9 -700 400 100 R 50 50 1 1 I
X USBDP 10 700 400 100 L 50 50 1 1 B
X SCB_1/GPIO_2 20 -700 -200 100 R 50 50 1 1 B
X USBDM 11 700 300 100 L 50 50 1 1 B
X SCB_2/GPIO_3 21 -700 0 100 R 50 50 1 1 B
X VCCD 12 -700 -500 100 R 50 50 1 1 W
X SCB_3/GPIO_4 22 -700 -100 100 R 50 50 1 1 B
X VSSD 13 -100 -800 100 U 50 50 1 1 W
X SCB_4/GPIO_5 23 -700 100 100 R 50 50 1 1 B
X ~nXRES 14 -700 500 100 R 50 50 1 1 I
X VDDD 24 0 700 100 D 50 50 1 1 W
X VBUS 15 700 500 100 L 50 50 1 1 w
X 1EP 25 -600 -600 100 R 50 50 1 1 N N
X VSSD 16 0 -800 100 U 50 50 1 1 W
X VSSA 17 100 -800 100 U 50 50 1 1 W
X GPIO_0 18 700 -500 100 L 50 50 1 1 T
X GPIO_1 19 700 -600 100 L 50 50 1 1 T
ENDDRAW
ENDDEF
#
# CY7C65213-28PVXI
#
DEF CY7C65213-28PVXI U 0 40 Y Y 1 F N
F0 "U" -350 750 50 H V C CNN
F1 "CY7C65213-28PVXI" 140 750 50 H V L CNN
F2 "Housings_SSOP:SSOP-28_5.3x10.2mm_Pitch0.65mm" 0 -900 50 H I C CNN
F3 "" -2500 500 50 H I C CNN
ALIAS CY7C65213A-28PVXI
$FPLIST
SSOP*5.3x10.2mm*Pitch0.65mm*
$ENDFPLIST
DRAW
S -400 700 500 -700 0 1 10 f
X TXD 1 -500 300 100 R 50 50 1 1 O
X DTR 2 -500 0 100 R 50 50 1 1 O
X RTS 3 -500 200 100 R 50 50 1 1 O
X VCCIO 4 0 800 100 D 50 50 1 1 W
X RXD 5 -500 400 100 R 50 50 1 1 I
X RI 6 -500 -300 100 R 50 50 1 1 I
X GND 7 100 -800 100 U 50 50 1 1 W
X GPIO5 8 600 100 100 L 50 50 1 1 T
X DSR 9 -500 -100 100 R 50 50 1 1 I
X DCD 10 -500 -200 100 R 50 50 1 1 I
X VCC 20 100 800 100 D 50 50 1 1 W
X CTS 11 -500 100 100 R 50 50 1 1 I
X GND 21 0 -800 100 U 50 50 1 1 W
X GPIO4 12 600 0 100 L 50 50 1 1 B
X GPIO1 22 600 -300 100 L 50 50 1 1 B
X GPIO2 13 600 -200 100 L 50 50 1 1 T
X GPIO0 23 600 -400 100 L 50 50 1 1 B
X GPIO3 14 600 -100 100 L 50 50 1 1 B
X NC 24 500 -600 100 L 50 50 1 1 N N
X USBDP 15 600 600 100 L 50 50 1 1 B
X NC 25 500 -500 100 L 50 50 1 1 N N
X USBDM 16 600 500 100 L 50 50 1 1 B
X DNU 26 -500 -500 100 R 50 50 1 1 P
X VCCD 17 -500 -400 100 R 50 50 1 1 P
X GPIO6 27 600 200 100 L 50 50 1 1 T
X GND 18 -100 -800 100 U 50 50 1 1 W
X GPIO7 28 600 300 100 L 50 50 1 1 T
X ~RESET 19 -500 600 100 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# CY7C65213-32LTXI
#
DEF CY7C65213-32LTXI U 0 40 Y Y 1 F N
F0 "U" -430 750 50 H V C CNN
F1 "CY7C65213-32LTXI" 140 750 50 H V L CNN
F2 "Housings_DFN_QFN:QFN-32-1EP_5x5mm_Pitch0.5mm" 0 -1100 50 H I C CNN
F3 "" -2500 500 50 H I C CNN
ALIAS CY7C65213A-32LTXI
$FPLIST
QFN*1EP*5x5mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -500 700 500 -900 0 1 10 f
X VCCIO 1 -100 800 100 D 50 50 1 1 W
X RXD 2 -600 400 100 R 50 50 1 1 I
X RI 3 -600 -300 100 R 50 50 1 1 I
X GND 4 100 -1000 100 U 50 50 1 1 W
X GPIO5 5 600 100 100 L 50 50 1 1 T
X DSR 6 -600 -100 100 R 50 50 1 1 I
X DCD 7 -600 -200 100 R 50 50 1 1 I
X CTS 8 -600 100 100 R 50 50 1 1 I
X GPIO4 9 600 0 100 L 50 50 1 1 B
X GPIO2 10 600 -200 100 L 50 50 1 1 T
X GND 20 0 -1000 100 U 50 50 1 1 W
X TXD 30 -600 300 100 R 50 50 1 1 O
X GPIO3 11 600 -100 100 L 50 50 1 1 B
X GPIO1 21 600 -300 100 L 50 50 1 1 B
X DTR 31 -600 0 100 R 50 50 1 1 O
X GPIO6 12 600 200 100 L 50 50 1 1 T
X GPIO0 22 600 -400 100 L 50 50 1 1 B
X RTS 32 -600 200 100 R 50 50 1 1 O
X GPIO7 13 600 300 100 L 50 50 1 1 T
X DNU 23 -600 -600 100 R 50 50 1 1 P
X 1EP 33 -500 -500 100 R 50 50 1 1 N N
X USBDP 14 600 600 100 L 50 50 1 1 B
X AGND 24 200 -1000 100 U 50 50 1 1 W
X USBDM 15 600 500 100 L 50 50 1 1 B
X DNU 25 -600 -700 100 R 50 50 1 1 P
X VCCD 16 100 800 100 D 50 50 1 1 P
X DNU 26 -600 -800 100 R 50 50 1 1 P
X GND 17 -100 -1000 100 U 50 50 1 1 W
X DNU 27 600 -800 100 L 50 50 1 1 P
X ~RESET 18 -600 600 100 R 50 50 1 1 B
X DNU 28 600 -700 100 L 50 50 1 1 P
X VCC 19 0 800 100 D 50 50 1 1 W
X DNU 29 600 -600 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CY7C65215-32LTXI
#
DEF CY7C65215-32LTXI U 0 40 Y Y 1 F N
F0 "U" -530 860 50 H V C CNN
F1 "CY7C65215-32LTXI" 280 850 50 H V L CNN
F2 "Housings_DFN_QFN:QFN-32-1EP_5x5mm_Pitch0.5mm" 0 -1300 50 H I C CNN
F3 "" -1600 1050 50 H I C CNN
ALIAS CY7C65215A-32LTXI
$FPLIST
QFN*1EP*5x5mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -600 800 600 -1100 0 1 10 f
X VDDD 1 -100 900 100 D 50 50 1 1 W
X SCB0_0/GPIO_8 2 -700 400 100 R 50 50 1 1 B
X SCB0_5/GPIO_9 3 -700 -100 100 R 50 50 1 1 B
X VSSD 4 -100 -1200 100 U 50 50 1 1 W
X SCB1_0/GPIO_10 5 -700 -300 100 R 50 50 1 1 B
X SCB1_1/GPIO_11 6 -700 -400 100 R 50 50 1 1 B
X SCB1_2/GPIO12 7 -700 -500 100 R 50 50 1 1 B
X SCB1_3/GPIO_13 8 -700 -600 100 R 50 50 1 1 B
X SCB1_4/GPIO_14 9 -700 -700 100 R 50 50 1 1 B
X SCB1_5/GPIO_15 10 -700 -800 100 R 50 50 1 1 B
X VDDD 20 200 900 100 D 50 50 1 1 W
X SCB0_4/GPIO_5 30 -700 0 100 R 50 50 1 1 B
X SUSPEND 11 700 300 100 L 50 50 1 1 O
X GPIO_17 21 700 -300 100 L 50 50 1 1 T
X GPIO_6 31 700 -600 100 L 50 50 1 1 B
X WAKEUP 12 -700 600 100 R 50 50 1 1 I
X GPIO_18 22 700 -200 100 L 50 50 1 1 T
X GPIO_7 32 700 -500 100 L 50 50 1 1 B
X GPIO_16 13 700 -400 100 L 50 50 1 1 T
X VDDD 23 0 900 100 D 50 50 1 1 W
X 1EP 33 -600 -1000 100 R 50 50 1 1 N N
X USBDP 14 700 600 100 L 50 50 1 1 B
X VSSA 24 100 -1200 100 U 50 50 1 1 W
X USBDM 15 700 500 100 L 50 50 1 1 B
X GPIO_0 25 700 -800 100 L 50 50 1 1 B
X VCCD 16 100 900 100 D 50 50 1 1 W
X GPIO_1 26 700 -700 100 L 50 50 1 1 B
X VSSD 17 0 -1200 100 U 50 50 1 1 W
X SCB0_1/GPIO_2 27 -700 300 100 R 50 50 1 1 B
X ~nXRES 18 -700 700 100 R 50 50 1 1 I
X SCB0_2/GPIO_3 28 -700 200 100 R 50 50 1 1 B
X VBUS 19 700 700 100 L 50 50 1 1 w
X SCB0_3/GPIO_4 29 -700 100 100 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# CY8C4xx7LQI-4xx
#
DEF CY8C4xx7LQI-4xx U 0 40 Y Y 1 F N