Added SN74LVC1G332.

KLC violations were made on purpose to comply with the other gates.

library/74xx.dcm

@@ -818,4 +818,10 @@ D 4 x 4 Register Files 3 State Out
 K TTL Register 3State
 $ENDCMP
 #
+$CMP SN74LVC1G332
+D 3-input OR Gate
+K 3 input OR
+F http://www.ti.com/lit/ds/symlink/sn74lvc1g332.pdf
+$ENDCMP
+#
 #End Doc Library

library/74xx.lib

@@ -4374,4 +4374,36 @@ X A 19 800 500 300 L 50 50 1 1 O
 ENDDRAW
 ENDDEF
 #
+# SN74LVC1G332
+#
+DEF SN74LVC1G332 U 0 30 Y Y 1 F N
+F0 "U" 0 50 50 H V C CNN
+F1 "SN74LVC1G332" 30 -10 39 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ SOT-23*
+ SC70*
+$ENDFPLIST
+DRAW
+X GND 2 -200 -200 0 U 50 50 0 0 W N
+X Vcc 5 -200 200 0 D 50 50 0 0 W
+A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198
+A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2
+A 4 -120 320 906 221 0 1 0 N 2 200 300 0
+P 2 0 1 0 -300 -200 0 -200 N
+P 2 0 1 0 -300 200 0 200 N
+P 2 0 1 0 -230 0 -210 0 N
+X ~ 1 -600 100 370 R 50 50 1 1 I
+X ~ 3 -600 0 370 R 50 50 1 1 I
+X ~ 4 600 0 300 L 50 50 1 1 O
+X ~ 6 -600 -100 370 R 50 50 1 1 I
+A 100 0 200 896 -896 0 2 0 N 101 200 101 -199
+P 4 0 2 0 100 200 -300 200 -300 -200 100 -200 N
+X ~ 1 -600 100 300 R 50 50 1 2 I I
+X ~ 2 -600 -100 300 R 50 50 1 2 I I
+X ~ 3 600 0 300 L 50 50 1 2 O I
+ENDDRAW
+ENDDEF
+#
 #End Library