fix template
This commit is contained in:
jean-pierre charras
Oliver
parent
f5a09493c2
commit
4d795f2eb3
38 changed files with 1726 additions and 2369 deletions
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@ -1,28 +1,34 @@
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EESchema-LIBRARY Version 2.3 Date: 15/11/2012 21:22:43
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EESchema-LIBRARY Version 2.3
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#encoding utf-8
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#
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# +3.3V
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# +3V3
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#
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DEF +3.3V #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -40 30 H I C CNN
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F1 "+3.3V" 0 110 30 H V C CNN
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ALIAS +3,3V
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DEF +3V3 #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "+3V3" 0 140 50 H V C CNN
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F2 "" 0 0 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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ALIAS +3.3V
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DRAW
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X +3.3V 1 0 0 0 U 30 30 0 0 W N
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C 0 60 20 0 1 0 N
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P 3 0 1 0 0 0 0 40 0 40 N
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X +3V3 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# +5V
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#
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DEF +5V #PWR 0 40 Y Y 1 F P
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F0 "#PWR" 0 90 20 H I C CNN
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F1 "+5V" 0 90 30 H V C CNN
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DEF +5V #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "+5V" 0 140 50 H V C CNN
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F2 "" 0 0 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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DRAW
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X +5V 1 0 0 0 U 20 20 0 0 W N
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C 0 50 20 0 1 0 N
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P 4 0 1 0 0 0 0 30 0 30 0 30 N
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X +5V 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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@ -31,6 +37,8 @@ ENDDEF
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DEF CONN_13X2 P 0 10 Y N 1 F N
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F0 "P" 0 700 60 H V C CNN
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F1 "CONN_13X2" 0 0 50 V V C CNN
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F2 "" 0 0 60 H I C CNN
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F3 "" 0 0 60 H I C CNN
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DRAW
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S -100 650 100 -650 0 1 0 N
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X P1 1 -400 600 300 R 40 30 1 1 P I
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@ -64,12 +72,14 @@ ENDDEF
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#
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# GND
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#
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DEF ~GND #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 0 30 H I C CNN
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F1 "GND" 0 -70 30 H I C CNN
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DEF GND #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -250 50 H I C CNN
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F1 "GND" 0 -150 50 H V C CNN
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F2 "" 0 0 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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DRAW
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P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
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X GND 1 0 0 0 U 30 30 1 1 W N
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P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
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X GND 1 0 0 0 D 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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@ -1,10 +0,0 @@
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Cmp-Mod V01 Created by CvPcb (2012-11-15 BZR 3804)-testing date = 15/11/2012 21:23:25
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BeginCmp
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TimeStamp = /50A55ABA;
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Reference = P1;
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ValeurCmp = CONN_13X2;
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IdModule = pin_array_13x2;
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EndCmp
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EndListe
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@ -1,15 +1,15 @@
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(kicad_pcb (version 3) (host pcbnew "(2012-11-30 BZR 3829)-testing")
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(kicad_pcb (version 4) (host pcbnew 4.0.5)
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(general
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(links 0)
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(no_connects 0)
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(area 127.606667 112.000001 242.964763 190.8)
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(area 143.424999 124.924999 228.575001 181.075001)
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(thickness 1.6)
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(drawings 41)
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(tracks 0)
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(zones 0)
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(modules 1)
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(nets 4)
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(nets 27)
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)
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(page A3)
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@ -18,21 +18,21 @@
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)
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(layers
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(15 F.Cu signal)
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(0 B.Cu signal)
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(16 B.Adhes user)
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(17 F.Adhes user)
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(18 B.Paste user)
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(19 F.Paste user)
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(20 B.SilkS user)
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(21 F.SilkS user)
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(22 B.Mask user)
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(23 F.Mask user)
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(24 Dwgs.User user)
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(25 Cmts.User user)
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(26 Eco1.User user)
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(27 Eco2.User user)
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(28 Edge.Cuts user)
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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)
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(setup
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@ -63,10 +63,10 @@
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(aux_axis_origin 143.5 181)
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(visible_elements 7FFFFFFF)
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(pcbplotparams
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(layerselection 3178497)
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(layerselection 0x00030_80000001)
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(usegerberextensions true)
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(excludeedgelayer true)
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(linewidth 152400)
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(linewidth 0.150000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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@ -79,7 +79,6 @@
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotothertext true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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@ -91,9 +90,32 @@
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)
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(net 0 "")
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(net 1 +3.3V)
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(net 2 +5V)
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(net 3 GND)
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(net 1 +5V)
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(net 2 GND)
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(net 3 +3V3)
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(net 4 "/GPIO0(SDA)")
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(net 5 "Net-(P1-Pad4)")
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(net 6 "/GPIO1(SCL)")
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(net 7 /GPIO4)
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(net 8 /TXD)
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(net 9 "Net-(P1-Pad9)")
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(net 10 /RXD)
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(net 11 /GPIO17)
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(net 12 /GPIO18)
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(net 13 /GPIO21)
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(net 14 "Net-(P1-Pad14)")
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(net 15 /GPIO22)
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(net 16 /GPIO23)
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(net 17 "Net-(P1-Pad17)")
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(net 18 /GPIO24)
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(net 19 "/GPIO10(MOSI)")
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(net 20 "Net-(P1-Pad20)")
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(net 21 "/GPIO9(MISO)")
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(net 22 /GPIO25)
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(net 23 "/GPIO11(SCLK)")
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(net 24 "/GPIO8(CE0)")
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(net 25 "Net-(P1-Pad25)")
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(net 26 "/GPIO7(CE1)")
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(net_class Default "This is the default net class."
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(clearance 0.2)
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@ -102,10 +124,32 @@
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(via_drill 0.6)
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(uvia_dia 0.5)
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(uvia_drill 0.1)
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(add_net "")
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(add_net +3.3V)
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(add_net +3V3)
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(add_net +5V)
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(add_net "/GPIO0(SDA)")
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(add_net "/GPIO1(SCL)")
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(add_net "/GPIO10(MOSI)")
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||||
(add_net "/GPIO11(SCLK)")
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(add_net /GPIO17)
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(add_net /GPIO18)
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||||
(add_net /GPIO21)
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(add_net /GPIO22)
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(add_net /GPIO23)
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(add_net /GPIO24)
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(add_net /GPIO25)
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(add_net /GPIO4)
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(add_net "/GPIO7(CE1)")
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(add_net "/GPIO8(CE0)")
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(add_net "/GPIO9(MISO)")
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(add_net /RXD)
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(add_net /TXD)
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(add_net GND)
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(add_net "Net-(P1-Pad14)")
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(add_net "Net-(P1-Pad17)")
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(add_net "Net-(P1-Pad20)")
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(add_net "Net-(P1-Pad25)")
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(add_net "Net-(P1-Pad4)")
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(add_net "Net-(P1-Pad9)")
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)
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(net_class Power ""
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@ -117,106 +161,85 @@
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(uvia_drill 0.1)
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)
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(module pin_array_13x2 (layer F.Cu) (tedit 50A55E7A) (tstamp 50A55DA3)
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(at 161 129)
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(descr "Double rangee de contacts 2 x 12 pins")
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(tags CONN)
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(module Pin_Headers:Pin_Header_Straight_2x13 locked (layer F.Cu) (tedit 584FB37B) (tstamp 584FB325)
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(at 145.75536 130.27914 90)
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(descr "Through hole pin header")
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(tags "pin header")
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(path /50A55ABA)
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(fp_text reference P1 (at -15.5 4) (layer F.SilkS)
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(effects (font (size 1.016 1.016) (thickness 0.2032)))
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(fp_text reference P1 (at 1.5875 32.6136 90) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value CONN_13X2 (at 12 4) (layer F.SilkS)
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(effects (font (size 1.016 1.016) (thickness 0.2032)))
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(fp_text value CONN_13X2 (at -2.37998 16.29664 180) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start -16.51 2.54) (end 16.51 2.54) (layer F.SilkS) (width 0.2032))
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(fp_line (start 16.51 -2.54) (end -16.51 -2.54) (layer F.SilkS) (width 0.2032))
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||||
(fp_line (start -16.51 -2.54) (end -16.51 2.54) (layer F.SilkS) (width 0.2032))
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||||
(fp_line (start 16.51 2.54) (end 16.51 -2.54) (layer F.SilkS) (width 0.2032))
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||||
(pad 1 thru_hole rect (at -15.24 1.27) (size 1.524 1.524) (drill 0.8128)
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(layers *.Cu *.Mask F.SilkS)
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(net 1 +3.3V)
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)
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||||
(pad 2 thru_hole circle (at -15.24 -1.27) (size 1.524 1.524) (drill 1.016)
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(layers *.Cu *.Mask F.SilkS)
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(net 2 +5V)
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)
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(pad 3 thru_hole circle (at -12.7 1.27) (size 1.524 1.524) (drill 1.016)
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(layers *.Cu *.Mask F.SilkS)
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||||
)
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||||
(pad 4 thru_hole circle (at -12.7 -1.27) (size 1.524 1.524) (drill 1.016)
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(layers *.Cu *.Mask F.SilkS)
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)
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(pad 5 thru_hole circle (at -10.16 1.27) (size 1.524 1.524) (drill 1.016)
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(layers *.Cu *.Mask F.SilkS)
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)
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||||
(pad 6 thru_hole circle (at -10.16 -1.27) (size 1.524 1.524) (drill 1.016)
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||||
(layers *.Cu *.Mask F.SilkS)
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(net 3 GND)
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||||
)
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||||
(pad 7 thru_hole circle (at -7.62 1.27) (size 1.524 1.524) (drill 1.016)
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||||
(layers *.Cu *.Mask F.SilkS)
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||||
)
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||||
(pad 8 thru_hole circle (at -7.62 -1.27) (size 1.524 1.524) (drill 1.016)
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||||
(layers *.Cu *.Mask F.SilkS)
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||||
)
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||||
(pad 9 thru_hole circle (at -5.08 1.27) (size 1.524 1.524) (drill 1.016)
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(layers *.Cu *.Mask F.SilkS)
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||||
)
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||||
(pad 10 thru_hole circle (at -5.08 -1.27) (size 1.524 1.524) (drill 1.016)
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(layers *.Cu *.Mask F.SilkS)
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||||
)
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||||
(pad 11 thru_hole circle (at -2.54 1.27) (size 1.524 1.524) (drill 1.016)
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||||
(layers *.Cu *.Mask F.SilkS)
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)
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(pad 12 thru_hole circle (at -2.54 -1.27) (size 1.524 1.524) (drill 1.016)
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(layers *.Cu *.Mask F.SilkS)
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)
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||||
(pad 13 thru_hole circle (at 0 1.27) (size 1.524 1.524) (drill 1.016)
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(layers *.Cu *.Mask F.SilkS)
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||||
)
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||||
(pad 14 thru_hole circle (at 0 -1.27) (size 1.524 1.524) (drill 1.016)
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||||
(layers *.Cu *.Mask F.SilkS)
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)
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||||
(pad 15 thru_hole circle (at 2.54 1.27) (size 1.524 1.524) (drill 1.016)
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||||
(layers *.Cu *.Mask F.SilkS)
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)
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||||
(pad 16 thru_hole circle (at 2.54 -1.27) (size 1.524 1.524) (drill 1.016)
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||||
(layers *.Cu *.Mask F.SilkS)
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)
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||||
(pad 17 thru_hole circle (at 5.08 1.27) (size 1.524 1.524) (drill 1.016)
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(layers *.Cu *.Mask F.SilkS)
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)
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||||
(pad 18 thru_hole circle (at 5.08 -1.27) (size 1.524 1.524) (drill 1.016)
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||||
(layers *.Cu *.Mask F.SilkS)
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)
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||||
(pad 19 thru_hole circle (at 7.62 1.27) (size 1.524 1.524) (drill 1.016)
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(layers *.Cu *.Mask F.SilkS)
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)
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||||
(pad 20 thru_hole circle (at 7.62 -1.27) (size 1.524 1.524) (drill 1.016)
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||||
(layers *.Cu *.Mask F.SilkS)
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)
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||||
(pad 21 thru_hole circle (at 10.16 1.27) (size 1.524 1.524) (drill 1.016)
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||||
(layers *.Cu *.Mask F.SilkS)
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)
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||||
(pad 22 thru_hole circle (at 10.16 -1.27) (size 1.524 1.524) (drill 1.016)
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||||
(layers *.Cu *.Mask F.SilkS)
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)
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||||
(pad 23 thru_hole circle (at 12.7 1.27) (size 1.524 1.524) (drill 1.016)
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||||
(layers *.Cu *.Mask F.SilkS)
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||||
)
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||||
(pad 24 thru_hole circle (at 12.7 -1.27) (size 1.524 1.524) (drill 1.016)
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||||
(layers *.Cu *.Mask F.SilkS)
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)
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||||
(pad 25 thru_hole circle (at 15.24 1.27) (size 1.524 1.524) (drill 1.016)
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(layers *.Cu *.Mask F.SilkS)
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)
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||||
(pad 26 thru_hole circle (at 15.24 -1.27) (size 1.524 1.524) (drill 1.016)
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(layers *.Cu *.Mask F.SilkS)
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||||
)
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||||
(model pin_array/pins_array_13x2.wrl
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||||
(at (xyz 0 0 0))
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||||
(fp_line (start -1.75 -1.75) (end -1.75 32.25) (layer F.CrtYd) (width 0.05))
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||||
(fp_line (start 4.3 -1.75) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
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||||
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
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||||
(fp_line (start -1.75 32.25) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
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||||
(fp_line (start 3.81 -1.27) (end 3.81 31.75) (layer F.SilkS) (width 0.15))
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||||
(fp_line (start -1.27 1.27) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
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||||
(fp_line (start 3.81 31.75) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
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||||
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
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||||
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
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(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
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||||
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
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||||
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
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(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 3 +3V3))
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(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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||||
(net 1 +5V))
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||||
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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||||
(net 4 "/GPIO0(SDA)"))
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||||
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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||||
(net 5 "Net-(P1-Pad4)"))
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||||
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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||||
(net 6 "/GPIO1(SCL)"))
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||||
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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||||
(net 2 GND))
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||||
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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||||
(net 7 /GPIO4))
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||||
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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||||
(net 8 /TXD))
|
||||
(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 9 "Net-(P1-Pad9)"))
|
||||
(pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 10 /RXD))
|
||||
(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 11 /GPIO17))
|
||||
(pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 12 /GPIO18))
|
||||
(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 13 /GPIO21))
|
||||
(pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 14 "Net-(P1-Pad14)"))
|
||||
(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 15 /GPIO22))
|
||||
(pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 16 /GPIO23))
|
||||
(pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 17 "Net-(P1-Pad17)"))
|
||||
(pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 18 /GPIO24))
|
||||
(pad 19 thru_hole oval (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 19 "/GPIO10(MOSI)"))
|
||||
(pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 20 "Net-(P1-Pad20)"))
|
||||
(pad 21 thru_hole oval (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 21 "/GPIO9(MISO)"))
|
||||
(pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 22 /GPIO25))
|
||||
(pad 23 thru_hole oval (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 23 "/GPIO11(SCLK)"))
|
||||
(pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 24 "/GPIO8(CE0)"))
|
||||
(pad 25 thru_hole oval (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 25 "Net-(P1-Pad25)"))
|
||||
(pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
||||
(net 26 "/GPIO7(CE1)"))
|
||||
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x13.wrl
|
||||
(at (xyz 0.05 -0.6 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
(rotate (xyz 0 0 90))
|
||||
)
|
||||
)
|
||||
|
||||
|
|
@ -294,6 +317,4 @@
|
|||
(gr_line (start 143.5 181) (end 228.5 181) (angle 90) (layer Edge.Cuts) (width 0.15))
|
||||
(gr_line (start 143.5 125) (end 143.5 181) (angle 90) (layer Edge.Cuts) (width 0.15))
|
||||
|
||||
|
||||
|
||||
)
|
||||
|
|
|
|||
|
|
@ -1,35 +1,111 @@
|
|||
# EESchema Netlist Version 1.1 created 15/11/2012 21:22:35
|
||||
(
|
||||
( /50A55ABA $noname P1 CONN_13X2 {Lib=CONN_13X2}
|
||||
( 1 +3.3V )
|
||||
( 2 +5V )
|
||||
( 3 ? )
|
||||
( 4 ? )
|
||||
( 5 ? )
|
||||
( 6 GND )
|
||||
( 7 ? )
|
||||
( 8 ? )
|
||||
( 9 ? )
|
||||
( 10 ? )
|
||||
( 11 ? )
|
||||
( 12 ? )
|
||||
( 13 ? )
|
||||
( 14 ? )
|
||||
( 15 ? )
|
||||
( 16 ? )
|
||||
( 17 ? )
|
||||
( 18 ? )
|
||||
( 19 ? )
|
||||
( 20 ? )
|
||||
( 21 ? )
|
||||
( 22 ? )
|
||||
( 23 ? )
|
||||
( 24 ? )
|
||||
( 25 ? )
|
||||
( 26 ? )
|
||||
)
|
||||
)
|
||||
*
|
||||
{ Pin List by Nets
|
||||
}
|
||||
#End
|
||||
(export (version D)
|
||||
(design
|
||||
(source E:/kicad-git/kicad_git_libs/template/raspberrypi-gpio/raspberrypi-gpio.sch)
|
||||
(date "13/12/2016 09:39:29")
|
||||
(tool "Eeschema 4.0.5")
|
||||
(sheet (number 1) (name /) (tstamps /)
|
||||
(title_block
|
||||
(title)
|
||||
(company)
|
||||
(rev)
|
||||
(date "15 nov 2012")
|
||||
(source raspberrypi-gpio.sch)
|
||||
(comment (number 1) (value ""))
|
||||
(comment (number 2) (value ""))
|
||||
(comment (number 3) (value ""))
|
||||
(comment (number 4) (value "")))))
|
||||
(components
|
||||
(comp (ref P1)
|
||||
(value CONN_13X2)
|
||||
(footprint Pin_Headers:Pin_Header_Straight_2x13)
|
||||
(libsource (lib raspberrypi-gpio-cache) (part CONN_13X2))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 50A55ABA)))
|
||||
(libparts
|
||||
(libpart (lib raspberrypi-gpio-cache) (part CONN_13X2)
|
||||
(fields
|
||||
(field (name Reference) P)
|
||||
(field (name Value) CONN_13X2))
|
||||
(pins
|
||||
(pin (num 1) (name P1) (type passive))
|
||||
(pin (num 2) (name P2) (type passive))
|
||||
(pin (num 3) (name P3) (type passive))
|
||||
(pin (num 4) (name P4) (type passive))
|
||||
(pin (num 5) (name P5) (type passive))
|
||||
(pin (num 6) (name P6) (type passive))
|
||||
(pin (num 7) (name P7) (type passive))
|
||||
(pin (num 8) (name P8) (type passive))
|
||||
(pin (num 9) (name P9) (type passive))
|
||||
(pin (num 10) (name P10) (type passive))
|
||||
(pin (num 11) (name P11) (type passive))
|
||||
(pin (num 12) (name P12) (type passive))
|
||||
(pin (num 13) (name P13) (type passive))
|
||||
(pin (num 14) (name P14) (type passive))
|
||||
(pin (num 15) (name P15) (type passive))
|
||||
(pin (num 16) (name P16) (type passive))
|
||||
(pin (num 17) (name P17) (type passive))
|
||||
(pin (num 18) (name P18) (type passive))
|
||||
(pin (num 19) (name P19) (type passive))
|
||||
(pin (num 20) (name P20) (type passive))
|
||||
(pin (num 21) (name P21) (type passive))
|
||||
(pin (num 22) (name P22) (type passive))
|
||||
(pin (num 23) (name P23) (type passive))
|
||||
(pin (num 24) (name P20) (type passive))
|
||||
(pin (num 25) (name P24) (type passive))
|
||||
(pin (num 26) (name P22) (type passive)))))
|
||||
(libraries
|
||||
(library (logical raspberrypi-gpio-cache)
|
||||
(uri E:\kicad-git\kicad_git_libs\template\raspberrypi-gpio\raspberrypi-gpio-cache.lib)))
|
||||
(nets
|
||||
(net (code 1) (name "/GPIO10(MOSI)")
|
||||
(node (ref P1) (pin 19)))
|
||||
(net (code 2) (name GND)
|
||||
(node (ref P1) (pin 6)))
|
||||
(net (code 3) (name "Net-(P1-Pad25)")
|
||||
(node (ref P1) (pin 25)))
|
||||
(net (code 4) (name "/GPIO11(SCLK)")
|
||||
(node (ref P1) (pin 23)))
|
||||
(net (code 5) (name "/GPIO9(MISO)")
|
||||
(node (ref P1) (pin 21)))
|
||||
(net (code 6) (name "Net-(P1-Pad17)")
|
||||
(node (ref P1) (pin 17)))
|
||||
(net (code 7) (name /GPIO22)
|
||||
(node (ref P1) (pin 15)))
|
||||
(net (code 8) (name /GPIO21)
|
||||
(node (ref P1) (pin 13)))
|
||||
(net (code 9) (name /GPIO17)
|
||||
(node (ref P1) (pin 11)))
|
||||
(net (code 10) (name "Net-(P1-Pad9)")
|
||||
(node (ref P1) (pin 9)))
|
||||
(net (code 11) (name /GPIO4)
|
||||
(node (ref P1) (pin 7)))
|
||||
(net (code 12) (name /GPIO24)
|
||||
(node (ref P1) (pin 18)))
|
||||
(net (code 13) (name "/GPIO7(CE1)")
|
||||
(node (ref P1) (pin 26)))
|
||||
(net (code 14) (name "/GPIO8(CE0)")
|
||||
(node (ref P1) (pin 24)))
|
||||
(net (code 15) (name /GPIO25)
|
||||
(node (ref P1) (pin 22)))
|
||||
(net (code 16) (name "Net-(P1-Pad20)")
|
||||
(node (ref P1) (pin 20)))
|
||||
(net (code 17) (name /GPIO23)
|
||||
(node (ref P1) (pin 16)))
|
||||
(net (code 18) (name "Net-(P1-Pad14)")
|
||||
(node (ref P1) (pin 14)))
|
||||
(net (code 19) (name /GPIO18)
|
||||
(node (ref P1) (pin 12)))
|
||||
(net (code 20) (name /RXD)
|
||||
(node (ref P1) (pin 10)))
|
||||
(net (code 21) (name /TXD)
|
||||
(node (ref P1) (pin 8)))
|
||||
(net (code 22) (name "Net-(P1-Pad4)")
|
||||
(node (ref P1) (pin 4)))
|
||||
(net (code 23) (name +5V)
|
||||
(node (ref P1) (pin 2)))
|
||||
(net (code 24) (name +3V3)
|
||||
(node (ref P1) (pin 1)))
|
||||
(net (code 25) (name "/GPIO1(SCL)")
|
||||
(node (ref P1) (pin 5)))
|
||||
(net (code 26) (name "/GPIO0(SDA)")
|
||||
(node (ref P1) (pin 3)))))
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
update=15/11/2012 21:11:59
|
||||
update=13/12/2016 09:33:12
|
||||
version=1
|
||||
last_client=kicad
|
||||
[cvpcb]
|
||||
|
|
@ -77,39 +77,11 @@ LibName7=display
|
|||
LibName8=valves
|
||||
LibName9=led
|
||||
LibName10=dip_sockets
|
||||
[general]
|
||||
version=1
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
NetFmt=1
|
||||
HPGLSpd=20
|
||||
HPGLDm=15
|
||||
HPGLNum=1
|
||||
offX_A4=0
|
||||
offY_A4=0
|
||||
offX_A3=0
|
||||
offY_A3=0
|
||||
offX_A2=0
|
||||
offY_A2=0
|
||||
offX_A1=0
|
||||
offY_A1=0
|
||||
offX_A0=0
|
||||
offY_A0=0
|
||||
offX_A=0
|
||||
offY_A=0
|
||||
offX_B=0
|
||||
offY_B=0
|
||||
offX_C=0
|
||||
offY_C=0
|
||||
offX_D=0
|
||||
offY_D=0
|
||||
offX_E=0
|
||||
offY_E=0
|
||||
RptD_X=0
|
||||
RptD_Y=100
|
||||
RptLab=1
|
||||
SimCmd=
|
||||
UseNetN=0
|
||||
LabSize=60
|
||||
[eeschema/libraries]
|
||||
LibName1=power
|
||||
LibName2=device
|
||||
|
|
@ -122,24 +94,13 @@ LibName8=cmos4000
|
|||
LibName9=adc-dac
|
||||
LibName10=memory
|
||||
LibName11=xilinx
|
||||
LibName12=special
|
||||
LibName13=microcontrollers
|
||||
LibName14=dsp
|
||||
LibName15=microchip
|
||||
LibName16=analog_switches
|
||||
LibName17=motorola
|
||||
LibName18=texas
|
||||
LibName19=intel
|
||||
LibName20=audio
|
||||
LibName21=interface
|
||||
LibName22=digital-audio
|
||||
LibName23=philips
|
||||
LibName24=display
|
||||
LibName25=cypress
|
||||
LibName26=siliconi
|
||||
LibName27=opto
|
||||
LibName28=atmel
|
||||
LibName29=contrib
|
||||
LibName30=valves
|
||||
[general]
|
||||
version=1
|
||||
LibName12=microcontrollers
|
||||
LibName13=dsp
|
||||
LibName14=microchip
|
||||
LibName15=analog_switches
|
||||
LibName16=motorola
|
||||
LibName17=texas
|
||||
LibName18=intel
|
||||
LibName19=audio
|
||||
LibName20=interface
|
||||
LibName21=opto
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
EESchema Schematic File Version 2 date 15/11/2012 21:22:43
|
||||
EESchema Schematic File Version 2
|
||||
LIBS:power
|
||||
LIBS:device
|
||||
LIBS:transistors
|
||||
|
|
@ -10,7 +10,6 @@ LIBS:cmos4000
|
|||
LIBS:adc-dac
|
||||
LIBS:memory
|
||||
LIBS:xilinx
|
||||
LIBS:special
|
||||
LIBS:microcontrollers
|
||||
LIBS:dsp
|
||||
LIBS:microchip
|
||||
|
|
@ -20,17 +19,9 @@ LIBS:texas
|
|||
LIBS:intel
|
||||
LIBS:audio
|
||||
LIBS:interface
|
||||
LIBS:digital-audio
|
||||
LIBS:philips
|
||||
LIBS:display
|
||||
LIBS:cypress
|
||||
LIBS:siliconi
|
||||
LIBS:opto
|
||||
LIBS:atmel
|
||||
LIBS:contrib
|
||||
LIBS:valves
|
||||
LIBS:rpi-cache
|
||||
EELAYER 27 0
|
||||
LIBS:raspberrypi-gpio-cache
|
||||
EELAYER 25 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
|
|
@ -50,6 +41,8 @@ U 1 1 50A55ABA
|
|||
P 2400 1800
|
||||
F 0 "P1" H 2400 2500 60 0000 C CNN
|
||||
F 1 "CONN_13X2" V 2400 1800 50 0000 C CNN
|
||||
F 2 "Pin_Headers:Pin_Header_Straight_2x13" H 2400 1100 30 0000 C CNN
|
||||
F 3 "" H 2400 1800 60 0001 C CNN
|
||||
1 2400 1800
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
|
|
@ -57,8 +50,10 @@ $Comp
|
|||
L +3.3V #PWR01
|
||||
U 1 1 50A55B18
|
||||
P 1900 1050
|
||||
F 0 "#PWR01" H 1900 1010 30 0001 C CNN
|
||||
F 1 "+3.3V" H 1900 1160 30 0000 C CNN
|
||||
F 0 "#PWR01" H 1900 900 50 0001 C CNN
|
||||
F 1 "+3.3V" H 1900 1190 50 0000 C CNN
|
||||
F 2 "" H 1900 1050 50 0000 C CNN
|
||||
F 3 "" H 1900 1050 50 0000 C CNN
|
||||
1 1900 1050
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
|
|
@ -70,8 +65,10 @@ $Comp
|
|||
L +5V #PWR02
|
||||
U 1 1 50A55B2E
|
||||
P 2900 1050
|
||||
F 0 "#PWR02" H 2900 1140 20 0001 C CNN
|
||||
F 1 "+5V" H 2900 1140 30 0000 C CNN
|
||||
F 0 "#PWR02" H 2900 900 50 0001 C CNN
|
||||
F 1 "+5V" H 2900 1190 50 0000 C CNN
|
||||
F 2 "" H 2900 1050 50 0000 C CNN
|
||||
F 3 "" H 2900 1050 50 0000 C CNN
|
||||
1 2900 1050
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
|
|
@ -123,8 +120,10 @@ $Comp
|
|||
L GND #PWR03
|
||||
U 1 1 50A55C3F
|
||||
P 2900 2500
|
||||
F 0 "#PWR03" H 2900 2500 30 0001 C CNN
|
||||
F 1 "GND" H 2900 2430 30 0001 C CNN
|
||||
F 0 "#PWR03" H 2900 2250 50 0001 C CNN
|
||||
F 1 "GND" H 2900 2350 50 0000 C CNN
|
||||
F 2 "" H 2900 2500 50 0000 C CNN
|
||||
F 3 "" H 2900 2500 50 0000 C CNN
|
||||
1 2900 2500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue