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Merge branch 'microchip-pic18'

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This commit is contained in:
Oliver Walters 2015-11-17 16:22:29 +11:00
parent 97e38c47f2 32f5a38943
commit 447dfd4a26
2 changed files with 9 additions and 7 deletions
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6
library/microchip_pic18mcu.dcm
View file

@ -265,12 +265,14 @@ F http://ww1.microchip.com/downloads/en/DeviceDoc/39762f.pdf
$ENDCMP
#
$CMP PIC18F1220-SO
D 18-Pin Flash Microcontroller 4K Flash 256byte RAM, ADC UART PWM
D 18-Pin Flash Microcontroller 4K Flash 256byte RAM
K RAM ADC UART PWM
F http://ww1.microchip.com/downloads/en/DeviceDoc/39605F.pdf
$ENDCMP
#
$CMP PIC18F1320-SO
D 18-Pin Flash Microcontroller 8K Flash 256byte RAM, ADC UART PWM in SOIC-18 package
D 18-Pin Flash Microcontroller 8K Flash 256byte RAM
K RAM ADC UART PWM
F http://ww1.microchip.com/downloads/en/DeviceDoc/39605F.pdf
$ENDCMP
#

10
library/microchip_pic18mcu.lib
View file

@ -1442,7 +1442,7 @@ X ECCP1/PSP4/RD4 2 1000 -300 100 L 50 50 1 1 B
X PSP5/RD5 3 1000 -400 100 L 50 50 1 1 B
X TX2/PSP6/RD6 4 1000 -500 100 L 50 50 1 1 B
X RX2/PSP7/RD7 5 1000 -600 100 L 50 50 1 1 B
X Vss 6 -50 -1200 100 U 50 50 1 1 W
X Vss 6 0 -1200 100 U 50 50 1 1 W
X Vdd 7 100 1200 100 D 50 50 1 1 W
X RB0/AN10/INT0 8 -1000 400 100 R 50 50 1 1 B
X RB1/AN8/INT1 9 -1000 300 100 R 50 50 1 1 B
@ -1465,7 +1465,7 @@ X CANTX/TX1/CCP3/RC6 44 1000 400 100 L 50 50 1 1 B
X RB5/CCP5 15 -1000 -100 100 R 50 50 1 1 B
X RE0/AN5 25 1000 -1000 100 L 50 50 1 1 B
X RC1 35 1000 900 100 L 50 50 1 1 B
X PAD 45 250 -1200 100 U 50 50 1 1 W
X PAD 45 300 -1200 100 U 50 50 1 1 W
X RB6/PGC 16 -1000 -200 100 R 50 50 1 1 B
X RE1/AN6 26 1000 -900 100 L 50 50 1 1 B
X CCP2/RC2 36 1000 800 100 L 50 50 1 1 B
@ -1476,7 +1476,7 @@ X ~MLCR~/RE3 18 -1000 -800 100 R 50 50 1 1 B
X Vdd 28 0 1200 100 D 50 50 1 1 W
X C1INA/PSP0/RD0 38 1000 100 100 L 50 50 1 1 B
X RA0/CVref/AN0 19 -1000 1000 100 R 50 50 1 1 B
X Vss 29 50 -1200 100 U 50 50 1 1 W
X Vss 29 100 -1200 100 U 50 50 1 1 W
X C1INB/PSP1/RD1 39 1000 0 100 L 50 50 1 1 B
ENDDRAW
ENDDEF
@ -1496,7 +1496,7 @@ X ECCP1/PSP4/RD4 2 1000 -300 100 L 50 50 1 1 B
X PSP5/RD5 3 1000 -400 100 L 50 50 1 1 B
X TX2/PSP6/RD6 4 1000 -500 100 L 50 50 1 1 B
X RX2/PSP7/RD7 5 1000 -600 100 L 50 50 1 1 B
X Vss 6 -50 -1200 100 U 50 50 1 1 W
X Vss 6 0 -1200 100 U 50 50 1 1 W
X Vdd 7 100 1200 100 D 50 50 1 1 W
X RB0/AN10/INT0 8 -1000 400 100 R 50 50 1 1 B
X RB1/AN8/INT1 9 -1000 300 100 R 50 50 1 1 B
@ -1529,7 +1529,7 @@ X ~MLCR~/RE3 18 -1000 -800 100 R 50 50 1 1 B
X Vdd 28 0 1200 100 D 50 50 1 1 W
X C1INA/PSP0/RD0 38 1000 100 100 L 50 50 1 1 B
X RA0/CVrefAN0 19 -1000 1000 100 R 50 50 1 1 B
X Vss 29 50 -1200 100 U 50 50 1 1 W
X Vss 29 100 -1200 100 U 50 50 1 1 W
X C1INB/PSP1/RD1 39 1000 0 100 L 50 50 1 1 B
ENDDRAW
ENDDEF