From cf7cd88aec82bb1e43f7796cd937940b6b5fc3f6 Mon Sep 17 00:00:00 2001 From: Scott Date: Wed, 12 Aug 2015 12:31:14 -0400 Subject: [PATCH 1/4] Added a schematic symbol for the STM32F405Rx, which is the 64-pin version of the 100-pin STM32F405Vx --- library/stm32.dcm | 6 ++++ library/stm32.lib | 79 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 85 insertions(+) diff --git a/library/stm32.dcm b/library/stm32.dcm index 51cf2c25..6a240cbd 100644 --- a/library/stm32.dcm +++ b/library/stm32.dcm @@ -264,6 +264,12 @@ K STM32 ARM Cortex-M3 MCU F http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/CD00220364.pdf $ENDCMP # +$CMP STM32F405R +D STM32F405Rx, 32-bit ARM Cortex-M4F microcontroller, 168 MHz, 512-1024 kB Flash, 192 kB SRAM, FPU +K ARM 32bit CortexM4F M4F STM Microcontroller FPU +F http://www.st.com/web/catalog/mmc/FM141/SC1169/SS1577/LN1035/PF252144 +$ENDCMP +# $CMP STM32F405VG D STM32F407VG, 32-bit ARM Cortex-M4F microcontroller, 168 MHz, 1024 kB Flash, 192 kB SRAM, FPU K ARM 32bit CortexM4F M4F STM Microcontroller FPU diff --git a/library/stm32.lib b/library/stm32.lib index da555bd4..4e22c0ae 100644 --- a/library/stm32.lib +++ b/library/stm32.lib @@ -1639,6 +1639,85 @@ X VDD 100 100 2850 150 D 40 40 1 1 W ENDDRAW ENDDEF # +# STM32F405R +# +DEF STM32F405R U 0 40 Y Y 1 F N +F0 "U" 100 -550 60 H V C CNN +F1 "STM32F405R" 100 -450 60 H V C CNN +F2 "TQFP64" 100 -650 60 H V C CNN +F3 "" 100 -550 60 H V C CNN +$FPLIST + LQFP64 +$ENDFPLIST +DRAW +S -3300 -2100 3100 2000 0 1 0 f +X VBAT 1 1000 2300 300 D 50 50 1 1 I +X PC13/EVENTOUT 2 3400 -1500 300 L 50 50 1 1 I +X PC14/OSC32_IN/EVENTOUT 3 3400 -1600 300 L 50 50 1 1 I +X PC15/OSC32_OUT/EVENTOUT 4 3400 -1700 300 L 50 50 1 1 I +X PH0/OSC_IN/EVENTOUT 5 -3600 1150 300 R 50 50 1 1 I +X PH1/OSC_OUT/EVENTOUT 6 -3600 550 300 R 50 50 1 1 I +X NRST 7 -3600 1350 300 R 50 50 1 1 I +X PC0/OTG_HS_ULPI_STP/EVENTOUT 8 3400 -200 300 L 50 50 1 1 I +X PC1/EVENTOUT 9 3400 -300 300 L 50 50 1 1 I +X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/I2S2ext_SD/EVENTOUT 10 3400 -400 300 L 50 50 1 1 I +X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/OTG_HS_SOF/I2S3_WS/EVENTOUT 20 -3600 -650 300 R 50 50 1 1 I +X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/TIM2_CH4/EVENTOUT 30 3400 500 300 L 50 50 1 1 I +X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/TIM3_CH4/EVENTOUT 40 3400 -1100 300 L 50 50 1 1 I +X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 50 -3600 -1750 300 R 50 50 1 1 I +X BOOT0 60 -3600 1550 300 R 50 50 1 1 I +X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/EVENTOUT 11 3400 -500 300 L 50 50 1 1 I +X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 21 -3600 -750 300 R 50 50 1 1 I +X VCAP_1 31 300 -2400 300 U 50 50 1 1 I +X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 41 -3600 -1050 300 R 50 50 1 1 I +X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/USART3_TX/EVENTOUT 51 3400 -1200 300 L 50 50 1 1 I +X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/I2C1_SCL/CAN1_RX/EVENTOUT 61 3400 800 300 L 50 50 1 1 I +X VSSA 12 -1000 -2400 300 U 50 50 1 1 I +X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/TIM3_CH1/TIM1_BKIN/EVENTOUT 22 -3600 -850 300 R 50 50 1 1 I +X VDD 32 -100 2300 300 D 50 50 1 1 I +X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/EVENTOUT 42 -3600 -1150 300 R 50 50 1 1 I +X PC11/UART4_RX/SPI3_MISO/SDIO_D3/USART3_RX/I2S3ext_SD/EVENTOUT 52 3400 -1300 300 L 50 50 1 1 I +X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/I2C1_SDA/CAN1_TX/EVENTOUT 62 3400 700 300 L 50 50 1 1 I +X VDDA 13 -900 2300 300 D 50 50 1 1 I +X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/TIM1_CH1N/EVENTOUT 23 -3600 -950 300 R 50 50 1 1 I +X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/OTG_HS_ID/EVENTOUT 33 3400 400 300 L 50 50 1 1 I +X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/EVENTOUT 43 -3600 -1250 300 R 50 50 1 1 I +X PC12/UART5_TX/SDIO_CK/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 53 3400 -1400 300 L 50 50 1 1 I +X VSS 63 -600 -2400 300 U 50 50 1 1 I +X PA0/WKUP/USART2_CTS/UART4_TX/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 14 -3600 -250 300 R 50 50 1 1 I +X PC4/EVENTOUT 24 3400 -600 300 L 50 50 1 1 I +X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/EVENTOUT 34 3400 300 300 L 50 50 1 1 I +X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 44 -3600 -1350 300 R 50 50 1 1 I +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/EVENTOUT 54 -3600 150 300 R 50 50 1 1 I +X VDD 64 500 2300 300 D 50 50 1 1 I +X PA1/USART2_RTS/UART4_RX/TIM5_CH2/TIMM2_CH2/EVENTOUT 15 -3600 -350 300 R 50 50 1 1 I +X PC5/EVENTOUT 25 3400 -700 300 L 50 50 1 1 I +X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 35 3400 200 300 L 50 50 1 1 I +X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 45 -3600 -1450 300 R 50 50 1 1 I +X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 55 3400 1300 300 L 50 50 1 1 I +X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/EVENTOUT 16 -3600 -450 300 R 50 50 1 1 I +X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/TIM1_CH2N/EVENTOUT 26 3400 1600 300 L 50 50 1 1 I +X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 36 3400 100 300 L 50 50 1 1 I +X PA13/JTMS/SWDIO/EVENTOUT 46 -3600 -1550 300 R 50 50 1 1 I +X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 56 3400 1200 300 L 50 50 1 1 I +X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/EVENTOUT 17 -3600 -550 300 R 50 50 1 1 I +X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 27 3400 1500 300 L 50 50 1 1 I +X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/TIM3_CH1/EVENTOUT 37 3400 -800 300 L 50 50 1 1 I +X VCAP_2 47 800 -2400 300 U 50 50 1 1 I +X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/I2S3_SD/EVENTOUT 57 3400 1100 300 L 50 50 1 1 I +X VSS 18 -800 -2400 300 U 50 50 1 1 I +X PB2/BOOT1/EVENTOUT 28 3400 1400 300 L 50 50 1 1 I +X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/TIM3_CH2/EVENTOUT 38 3400 -900 300 L 50 50 1 1 I +X VDD 48 200 2300 300 D 50 50 1 1 I +X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/USART1_TX/EVENTOUT 58 3400 1000 300 L 50 50 1 1 I +X VDD 19 -400 2300 300 D 50 50 1 1 I +X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/TIM2_CH3/EVENTOUT 29 3400 600 300 L 50 50 1 1 I +X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/EVENTOUT 39 3400 -1000 300 L 50 50 1 1 I +X PA14/JTCK/SWCLK/EVENTOUT 49 -3600 -1650 300 R 50 50 1 1 I +X PB7/I2C1_SDA/FSMC_NL/USART1_RX/TIM4_CH2/EVENTOUT 59 3400 900 300 L 50 50 1 1 I +ENDDRAW +ENDDEF +# # STM32F405VG # DEF STM32F405VG U 0 40 Y Y 1 F N From e39f31b2a2f25061a861e8a50aec4382bded8bf6 Mon Sep 17 00:00:00 2001 From: Scott Date: Wed, 12 Aug 2015 14:20:17 -0400 Subject: [PATCH 2/4] Added STM32F407R as well. Also removed the (seemingly not useful?) EVENTOUT description from every single GPIO pin to keep the symbol size reasonable. --- library/stm32.dcm | 2 +- library/stm32.lib | 237 ++++++++++++++++++++++++++++++---------------- 2 files changed, 159 insertions(+), 80 deletions(-) diff --git a/library/stm32.dcm b/library/stm32.dcm index 6a240cbd..7e26327f 100644 --- a/library/stm32.dcm +++ b/library/stm32.dcm @@ -1,4 +1,4 @@ -EESchema-DOCLIB Version 2.0 +EESchema-DOCLIB Version 2.0 Date: Wed 12 Aug 2015 02:20:09 PM EDT # $CMP STM32F050C4 D STM32F050C4, 32-bit ARM Cortex-M0 Microcontroller, 48MHz, 16KB Flash, 4KB RAM, RTC, VQFP48 diff --git a/library/stm32.lib b/library/stm32.lib index 4e22c0ae..e23d268a 100644 --- a/library/stm32.lib +++ b/library/stm32.lib @@ -1,4 +1,4 @@ -EESchema-LIBRARY Version 2.3 +EESchema-LIBRARY Version 2.3 Date: Wed 12 Aug 2015 02:20:09 PM EDT #encoding utf-8 # # STM32F050C4 @@ -7,7 +7,7 @@ DEF STM32F050C4 U 0 40 Y Y 1 F N F0 "U" -1500 1900 60 H V C CNN F1 "STM32F050C4" 1250 -1900 60 H V C CNN F2 "LQFP48" 0 0 40 H V C CIN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN ALIAS STM32F050C6 DRAW S -1550 1850 1550 -1850 0 1 10 f @@ -68,7 +68,7 @@ DEF STM32F050K4 U 0 40 Y Y 1 F N F0 "U" -1400 1450 60 H V C CNN F1 "STM32F050K4" 1150 -1450 60 H V C CNN F2 "LQFP32" 0 0 40 H V C CIN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN ALIAS STM32F050K6 DRAW S -1450 1400 1450 -1400 0 1 10 f @@ -113,7 +113,7 @@ DEF STM32F100C4 U 0 40 Y Y 1 F N F0 "U" -1300 1650 60 H V C CNN F1 "STM32F100C4" 1050 -1650 60 H V C CNN F2 "LQFP48" 0 0 40 H V C CIN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN ALIAS STM32F100C6 DRAW S -1350 1600 1350 -1600 0 1 10 f @@ -174,7 +174,7 @@ DEF STM32F100C8 U 0 40 Y Y 1 F N F0 "U" -1300 1650 60 H V C CNN F1 "STM32F100C8" 1050 -1650 60 H V C CNN F2 "LQFP48" 0 0 40 H V C CIN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN ALIAS STM32F100CB DRAW S -1350 1600 1350 -1600 0 1 10 f @@ -235,7 +235,7 @@ DEF STM32F100R4 U 0 40 Y Y 1 F N F0 "U" -1300 1950 60 H V C CNN F1 "STM32F100R4" 1050 -1900 60 H V C CNN F2 "LQFP64" 0 0 40 H V C CIN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN ALIAS STM32F100R6 DRAW S -1350 1900 1350 -1850 0 1 10 f @@ -312,7 +312,7 @@ DEF STM32F100R8 U 0 40 Y Y 1 F N F0 "U" -1300 1950 60 H V C CNN F1 "STM32F100R8" 1050 -1900 60 H V C CNN F2 "LQFP64" 0 0 40 H V C CIN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN ALIAS STM32F100RB DRAW S -1350 1900 1350 -1850 0 1 10 f @@ -389,7 +389,7 @@ DEF STM32F100V8 U 0 40 Y Y 1 F N F0 "U" -1300 2800 60 H V C CNN F1 "STM32F100V8" 1050 -2800 60 H V C CNN F2 "LQFP100" 0 0 40 H V C CIN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN ALIAS STM32F100VB DRAW S -1350 2750 1350 -2750 0 1 10 f @@ -501,7 +501,7 @@ DEF STM32F103C4 U 0 40 Y Y 1 F N F0 "U" -1300 1650 50 H V C CNN F1 "STM32F103C4" 1050 -1650 50 H V C CNN F2 "LQFP48" 0 0 50 H V C CNN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN ALIAS STM32F103C6 DRAW S -1350 1600 1350 -1600 0 1 10 f @@ -562,7 +562,7 @@ DEF STM32F103C8 U 0 40 Y Y 1 F N F0 "U" -1300 1650 50 H V C CNN F1 "STM32F103C8" 1050 -1650 50 H V C CNN F2 "LQFP48" 0 0 50 H V C CNN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN ALIAS STM32F103CB DRAW S -1350 1600 1350 -1600 0 1 10 f @@ -623,7 +623,7 @@ DEF STM32F103R4 U 0 40 Y Y 1 F N F0 "U" -1350 1950 50 H V C CNN F1 "STM32F103R4" 1150 -1950 50 H V C CNN F2 "LQFP64" 0 0 50 H V C CNN -F3 "" 0 300 60 H V C CNN +F3 "~" 0 300 60 H V C CNN ALIAS STM32F103R6 DRAW S -1400 1900 1400 -1900 0 1 10 f @@ -700,7 +700,7 @@ DEF STM32F103R8 U 0 40 Y Y 1 F N F0 "U" -1350 1950 50 H V C CNN F1 "STM32F103R8" 1150 -1950 50 H V C CNN F2 "LQFP64" 0 0 50 H V C CNN -F3 "" 0 300 60 H V C CNN +F3 "~" 0 300 60 H V C CNN ALIAS STM32F103RB DRAW S -1400 1900 1400 -1900 0 1 10 f @@ -777,7 +777,7 @@ DEF STM32F103RC U 0 40 Y Y 1 F N F0 "U" -1350 1950 50 H V C CNN F1 "STM32F103RC" 1150 -1950 50 H V C CNN F2 "LQFP64" 0 0 50 H V C CNN -F3 "" 0 300 60 H V C CNN +F3 "~" 0 300 60 H V C CNN ALIAS STM32F103RD STM32F103RE DRAW S -1400 1900 1400 -1900 0 1 10 f @@ -854,7 +854,7 @@ DEF STM32F103RF U 0 40 Y Y 1 F N F0 "U" -1350 1950 50 H V C CNN F1 "STM32F103RF" 1150 -1950 50 H V C CNN F2 "LQFP64" 0 0 50 H V C CNN -F3 "" 0 300 60 H V C CNN +F3 "~" 0 300 60 H V C CNN ALIAS STM32F103RG DRAW S -1400 1900 1400 -1900 0 1 10 f @@ -931,7 +931,7 @@ DEF STM32F103V8 U 0 40 Y Y 1 F N F0 "U" -1350 2800 50 H V C CNN F1 "STM32F103V8" 1150 -2800 50 H V C CNN F2 "LQFP100" 0 0 50 H V C CNN -F3 "" 0 1150 60 H V C CNN +F3 "~" 0 1150 60 H V C CNN ALIAS STM32F103VB DRAW S -1400 2750 1400 -2750 0 1 10 f @@ -1043,7 +1043,7 @@ DEF STM32F103VC U 0 40 Y Y 1 F N F0 "U" -1350 2800 50 H V C CNN F1 "STM32F103VC" 1150 -2800 50 H V C CNN F2 "LQFP100" 0 0 50 H V C CNN -F3 "" 0 1150 60 H V C CNN +F3 "~" 0 1150 60 H V C CNN ALIAS STM32F103VD STM32F103VE DRAW S -1400 2750 1400 -2750 0 1 10 f @@ -1155,7 +1155,7 @@ DEF STM32F103VF U 0 40 Y Y 1 F N F0 "U" -1350 2800 50 H V C CNN F1 "STM32F103VF" 1150 -2800 50 H V C CNN F2 "LQFP100" 0 0 50 H V C CNN -F3 "" 0 1150 60 H V C CNN +F3 "~" 0 1150 60 H V C CNN ALIAS STM32F103VG DRAW S -1400 2750 1400 -2750 0 1 10 f @@ -1267,7 +1267,7 @@ DEF STM32F105R8 U 0 40 Y Y 1 F N F0 "U" -2000 1900 60 H V C CNN F1 "STM32F105R8" 1750 -1900 60 H V C CNN F2 "LQFP64" 50 0 50 H V C CIN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN ALIAS STM32F105RB STM32F105RC DRAW S -2050 1850 2050 -1850 0 1 10 f @@ -1344,7 +1344,7 @@ DEF STM32F105V8 U 0 40 Y Y 1 F N F0 "U" -2000 2750 60 H V C CNN F1 "STM32F105V8" 1750 -2750 60 H V C CNN F2 "LQFP100" -50 0 50 H V C CIN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN ALIAS STM32F105VB STM32F105VC DRAW S -2050 2700 2050 -2700 0 1 10 f @@ -1456,7 +1456,7 @@ DEF STM32F107RB U 0 40 Y Y 1 F N F0 "U" -2000 1900 60 H V C CNN F1 "STM32F107RB" 1750 -1900 60 H V C CNN F2 "LQFP64" 50 0 50 H V C CIN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN ALIAS STM32F107RC DRAW S -2050 1850 2050 -1850 0 1 10 f @@ -1533,7 +1533,7 @@ DEF STM32F107VB U 0 40 Y Y 1 F N F0 "U" -2000 2750 60 H V C CNN F1 "STM32F107VB" 1750 -2750 60 H V C CNN F2 "LQFP100" -50 0 50 H V C CIN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN ALIAS STM32F107VC DRAW S -2050 2700 2050 -2700 0 1 10 f @@ -1645,76 +1645,76 @@ DEF STM32F405R U 0 40 Y Y 1 F N F0 "U" 100 -550 60 H V C CNN F1 "STM32F405R" 100 -450 60 H V C CNN F2 "TQFP64" 100 -650 60 H V C CNN -F3 "" 100 -550 60 H V C CNN +F3 "~" 100 -550 60 H V C CNN $FPLIST LQFP64 $ENDFPLIST DRAW S -3300 -2100 3100 2000 0 1 0 f X VBAT 1 1000 2300 300 D 50 50 1 1 I -X PC13/EVENTOUT 2 3400 -1500 300 L 50 50 1 1 I -X PC14/OSC32_IN/EVENTOUT 3 3400 -1600 300 L 50 50 1 1 I -X PC15/OSC32_OUT/EVENTOUT 4 3400 -1700 300 L 50 50 1 1 I -X PH0/OSC_IN/EVENTOUT 5 -3600 1150 300 R 50 50 1 1 I -X PH1/OSC_OUT/EVENTOUT 6 -3600 550 300 R 50 50 1 1 I +X PC13 2 3400 -1500 300 L 50 50 1 1 I +X PC14/OSC32_IN 3 3400 -1600 300 L 50 50 1 1 I +X PC15/OSC32_OUT 4 3400 -1700 300 L 50 50 1 1 I +X PH0/OSC_IN 5 -3600 1150 300 R 50 50 1 1 I +X PH1/OSC_OUT 6 -3600 550 300 R 50 50 1 1 I X NRST 7 -3600 1350 300 R 50 50 1 1 I -X PC0/OTG_HS_ULPI_STP/EVENTOUT 8 3400 -200 300 L 50 50 1 1 I -X PC1/EVENTOUT 9 3400 -300 300 L 50 50 1 1 I -X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/I2S2ext_SD/EVENTOUT 10 3400 -400 300 L 50 50 1 1 I -X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/OTG_HS_SOF/I2S3_WS/EVENTOUT 20 -3600 -650 300 R 50 50 1 1 I -X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/TIM2_CH4/EVENTOUT 30 3400 500 300 L 50 50 1 1 I -X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/TIM3_CH4/EVENTOUT 40 3400 -1100 300 L 50 50 1 1 I -X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 50 -3600 -1750 300 R 50 50 1 1 I +X PC0/OTG_HS_ULPI_STP 8 3400 -200 300 L 50 50 1 1 I +X PC1 9 3400 -300 300 L 50 50 1 1 I +X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/I2S2ext_SD 10 3400 -400 300 L 50 50 1 1 I +X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/OTG_HS_SOF/I2S3_WS 20 -3600 -650 300 R 50 50 1 1 I +X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/TIM2_CH4 30 3400 500 300 L 50 50 1 1 I +X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/TIM3_CH4 40 3400 -1100 300 L 50 50 1 1 I +X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS 50 -3600 -1750 300 R 50 50 1 1 I X BOOT0 60 -3600 1550 300 R 50 50 1 1 I -X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/EVENTOUT 11 3400 -500 300 L 50 50 1 1 I -X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 21 -3600 -750 300 R 50 50 1 1 I +X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT 11 3400 -500 300 L 50 50 1 1 I +X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN 21 -3600 -750 300 R 50 50 1 1 I X VCAP_1 31 300 -2400 300 U 50 50 1 1 I -X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 41 -3600 -1050 300 R 50 50 1 1 I -X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/USART3_TX/EVENTOUT 51 3400 -1200 300 L 50 50 1 1 I -X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/I2C1_SCL/CAN1_RX/EVENTOUT 61 3400 800 300 L 50 50 1 1 I +X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF 41 -3600 -1050 300 R 50 50 1 1 I +X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/USART3_TX 51 3400 -1200 300 L 50 50 1 1 I +X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/I2C1_SCL/CAN1_RX 61 3400 800 300 L 50 50 1 1 I X VSSA 12 -1000 -2400 300 U 50 50 1 1 I -X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/TIM3_CH1/TIM1_BKIN/EVENTOUT 22 -3600 -850 300 R 50 50 1 1 I +X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/TIM3_CH1/TIM1_BKIN 22 -3600 -850 300 R 50 50 1 1 I X VDD 32 -100 2300 300 D 50 50 1 1 I -X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/EVENTOUT 42 -3600 -1150 300 R 50 50 1 1 I -X PC11/UART4_RX/SPI3_MISO/SDIO_D3/USART3_RX/I2S3ext_SD/EVENTOUT 52 3400 -1300 300 L 50 50 1 1 I -X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/I2C1_SDA/CAN1_TX/EVENTOUT 62 3400 700 300 L 50 50 1 1 I +X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA 42 -3600 -1150 300 R 50 50 1 1 I +X PC11/UART4_RX/SPI3_MISO/SDIO_D3/USART3_RX/I2S3ext_SD 52 3400 -1300 300 L 50 50 1 1 I +X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/I2C1_SDA/CAN1_TX 62 3400 700 300 L 50 50 1 1 I X VDDA 13 -900 2300 300 D 50 50 1 1 I -X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/TIM1_CH1N/EVENTOUT 23 -3600 -950 300 R 50 50 1 1 I -X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/OTG_HS_ID/EVENTOUT 33 3400 400 300 L 50 50 1 1 I -X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/EVENTOUT 43 -3600 -1250 300 R 50 50 1 1 I -X PC12/UART5_TX/SDIO_CK/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 53 3400 -1400 300 L 50 50 1 1 I +X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/TIM1_CH1N 23 -3600 -950 300 R 50 50 1 1 I +X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/OTG_HS_ID 33 3400 400 300 L 50 50 1 1 I +X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID 43 -3600 -1250 300 R 50 50 1 1 I +X PC12/UART5_TX/SDIO_CK/SPI3_MOSI/I2S3_SD/USART3_CK 53 3400 -1400 300 L 50 50 1 1 I X VSS 63 -600 -2400 300 U 50 50 1 1 I -X PA0/WKUP/USART2_CTS/UART4_TX/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 14 -3600 -250 300 R 50 50 1 1 I -X PC4/EVENTOUT 24 3400 -600 300 L 50 50 1 1 I -X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/EVENTOUT 34 3400 300 300 L 50 50 1 1 I -X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 44 -3600 -1350 300 R 50 50 1 1 I -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/EVENTOUT 54 -3600 150 300 R 50 50 1 1 I +X PA0/WKUP/USART2_CTS/UART4_TX/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR 14 -3600 -250 300 R 50 50 1 1 I +X PC4 24 3400 -600 300 L 50 50 1 1 I +X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6 34 3400 300 300 L 50 50 1 1 I +X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM 44 -3600 -1350 300 R 50 50 1 1 I +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 54 -3600 150 300 R 50 50 1 1 I X VDD 64 500 2300 300 D 50 50 1 1 I -X PA1/USART2_RTS/UART4_RX/TIM5_CH2/TIMM2_CH2/EVENTOUT 15 -3600 -350 300 R 50 50 1 1 I -X PC5/EVENTOUT 25 3400 -700 300 L 50 50 1 1 I -X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 35 3400 200 300 L 50 50 1 1 I -X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 45 -3600 -1450 300 R 50 50 1 1 I -X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 55 3400 1300 300 L 50 50 1 1 I -X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/EVENTOUT 16 -3600 -450 300 R 50 50 1 1 I -X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/TIM1_CH2N/EVENTOUT 26 3400 1600 300 L 50 50 1 1 I -X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 36 3400 100 300 L 50 50 1 1 I -X PA13/JTMS/SWDIO/EVENTOUT 46 -3600 -1550 300 R 50 50 1 1 I -X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 56 3400 1200 300 L 50 50 1 1 I -X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/EVENTOUT 17 -3600 -550 300 R 50 50 1 1 I -X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 27 3400 1500 300 L 50 50 1 1 I -X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/TIM3_CH1/EVENTOUT 37 3400 -800 300 L 50 50 1 1 I +X PA1/USART2_RTS/UART4_RX/TIM5_CH2/TIMM2_CH2 15 -3600 -350 300 R 50 50 1 1 I +X PC5 25 3400 -700 300 L 50 50 1 1 I +X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD 35 3400 200 300 L 50 50 1 1 I +X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP 45 -3600 -1450 300 R 50 50 1 1 I +X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK 55 3400 1300 300 L 50 50 1 1 I +X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3 16 -3600 -450 300 R 50 50 1 1 I +X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/TIM1_CH2N 26 3400 1600 300 L 50 50 1 1 I +X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP 36 3400 100 300 L 50 50 1 1 I +X PA13/JTMS/SWDIO 46 -3600 -1550 300 R 50 50 1 1 I +X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD 56 3400 1200 300 L 50 50 1 1 I +X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0 17 -3600 -550 300 R 50 50 1 1 I +X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/OTG_HS_INTN/TIM1_CH3N 27 3400 1500 300 L 50 50 1 1 I +X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/TIM3_CH1 37 3400 -800 300 L 50 50 1 1 I X VCAP_2 47 800 -2400 300 U 50 50 1 1 I -X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/I2S3_SD/EVENTOUT 57 3400 1100 300 L 50 50 1 1 I +X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/I2S3_SD 57 3400 1100 300 L 50 50 1 1 I X VSS 18 -800 -2400 300 U 50 50 1 1 I -X PB2/BOOT1/EVENTOUT 28 3400 1400 300 L 50 50 1 1 I -X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/TIM3_CH2/EVENTOUT 38 3400 -900 300 L 50 50 1 1 I +X PB2/BOOT1 28 3400 1400 300 L 50 50 1 1 I +X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/TIM3_CH2 38 3400 -900 300 L 50 50 1 1 I X VDD 48 200 2300 300 D 50 50 1 1 I -X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/USART1_TX/EVENTOUT 58 3400 1000 300 L 50 50 1 1 I +X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/USART1_TX 58 3400 1000 300 L 50 50 1 1 I X VDD 19 -400 2300 300 D 50 50 1 1 I -X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/TIM2_CH3/EVENTOUT 29 3400 600 300 L 50 50 1 1 I -X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/EVENTOUT 39 3400 -1000 300 L 50 50 1 1 I -X PA14/JTCK/SWCLK/EVENTOUT 49 -3600 -1650 300 R 50 50 1 1 I -X PB7/I2C1_SDA/FSMC_NL/USART1_RX/TIM4_CH2/EVENTOUT 59 3400 900 300 L 50 50 1 1 I +X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/TIM2_CH3 29 3400 600 300 L 50 50 1 1 I +X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK 39 3400 -1000 300 L 50 50 1 1 I +X PA14/JTCK/SWCLK 49 -3600 -1650 300 R 50 50 1 1 I +X PB7/I2C1_SDA/FSMC_NL/USART1_RX/TIM4_CH2 59 3400 900 300 L 50 50 1 1 I ENDDRAW ENDDEF # @@ -1724,7 +1724,7 @@ DEF STM32F405VG U 0 40 Y Y 1 F N F0 "U" 0 0 60 H V C CNN F1 "STM32F405VG" 0 100 60 H V C CNN F2 "TQFP100" 0 -100 60 H V C CNN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN DRAW S -4700 -2700 4700 2700 0 1 0 f X PE2/TRACECLK/FSMC_A23/EVENTOUT 1 5000 2350 300 L 50 50 1 1 I @@ -1830,13 +1830,92 @@ X VDD 100 750 3000 300 D 50 50 1 1 I ENDDRAW ENDDEF # +# STM32F407R +# +DEF STM32F407R U 0 40 Y Y 1 F N +F0 "U" 150 -600 60 H V C CNN +F1 "STM32F407R" 150 -500 60 H V C CNN +F2 "TQFP64" 150 -700 60 H V C CNN +F3 "~" 150 -600 60 H V C CNN +$FPLIST + LQFP64 +$ENDFPLIST +DRAW +S -3300 -2100 3100 2000 0 1 0 f +X VBAT 1 1000 2300 300 D 50 50 1 1 I +X PC13 2 3400 -1500 300 L 50 50 1 1 I +X PC14/OSC32_IN 3 3400 -1600 300 L 50 50 1 1 I +X PC15/OSC32_OUT 4 3400 -1700 300 L 50 50 1 1 I +X PH0/OSC_IN 5 -3600 1150 300 R 50 50 1 1 I +X PH1/OSC_OUT 6 -3600 550 300 R 50 50 1 1 I +X NRST 7 -3600 1350 300 R 50 50 1 1 I +X PC0/OTG_HS_ULPI_STP 8 3400 -200 300 L 50 50 1 1 I +X PC1/ETH_MDC/_EVENTOUT 9 3400 -300 300 L 50 50 1 1 I +X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD 10 3400 -400 300 L 50 50 1 1 I +X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC/OTG_HS_SOF/I2S3_WS 20 -3600 -650 300 R 50 50 1 1 I +X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4 30 3400 500 300 L 50 50 1 1 I +X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4 40 3400 -1100 300 L 50 50 1 1 I +X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS 50 -3600 -1750 300 R 50 50 1 1 I +X BOOT0 60 -3600 1550 300 R 50 50 1 1 I +X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK 11 3400 -500 300 L 50 50 1 1 I +X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN 21 -3600 -750 300 R 50 50 1 1 I +X VCAP_1 31 300 -2400 300 U 50 50 1 1 I +X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF 41 -3600 -1050 300 R 50 50 1 1 I +X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX 51 3400 -1200 300 L 50 50 1 1 I +X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/DCMI_D6/ETH_MII_TXD3/I2C1_SCL/CAN1_RX 61 3400 800 300 L 50 50 1 1 I +X VSSA 12 -1000 -2400 300 U 50 50 1 1 I +X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1_BKIN 22 -3600 -850 300 R 50 50 1 1 I +X VDD 32 -100 2300 300 D 50 50 1 1 I +X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/DCMI_D0 42 -3600 -1150 300 R 50 50 1 1 I +X PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4/USART3_RX/I2S3ext_SD 52 3400 -1300 300 L 50 50 1 1 I +X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TX 62 3400 700 300 L 50 50 1 1 I +X VDDA 13 -900 2300 300 D 50 50 1 1 I +X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/RMII_CRS_DV 23 -3600 -950 300 R 50 50 1 1 I +X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID 33 3400 400 300 L 50 50 1 1 I +X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/DCMI_D1 43 -3600 -1250 300 R 50 50 1 1 I +X PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK 53 3400 -1400 300 L 50 50 1 1 I +X VSS 63 -600 -2400 300 U 50 50 1 1 I +X PA0/WKUP/USART2_CTS/UART4_TX/ETH_MII_CRS_/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR 14 -3600 -250 300 R 50 50 1 1 I +X PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0 24 3400 -600 300 L 50 50 1 1 I +X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1 34 3400 300 300 L 50 50 1 1 I +X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM 44 -3600 -1350 300 R 50 50 1 1 I +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11 54 -3600 150 300 R 50 50 1 1 I +X VDD 64 500 2300 300 D 50 50 1 1 I +X PA1/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIMM2_CH2 15 -3600 -350 300 R 50 50 1 1 I +X PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1 25 3400 -700 300 L 50 50 1 1 I +X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD 35 3400 200 300 L 50 50 1 1 I +X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP 45 -3600 -1450 300 R 50 50 1 1 I +X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK 55 3400 1300 300 L 50 50 1 1 I +X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO 16 -3600 -450 300 R 50 50 1 1 I +X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N 26 3400 1600 300 L 50 50 1 1 I +X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP 36 3400 100 300 L 50 50 1 1 I +X PA13/JTMS/SWDIO 46 -3600 -1550 300 R 50 50 1 1 I +X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD 56 3400 1200 300 L 50 50 1 1 I +X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL 17 -3600 -550 300 R 50 50 1 1 I +X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/OTG_HS_INTN/TIM1_CH3N 27 3400 1500 300 L 50 50 1 1 I +X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0/TIM3_CH1 37 3400 -800 300 L 50 50 1 1 I +X VCAP_2 47 800 -2400 300 U 50 50 1 1 I +X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/DCMI_D10/I2S3_SD 57 3400 1100 300 L 50 50 1 1 I +X VSS 18 -800 -2400 300 U 50 50 1 1 I +X PB2/BOOT1 28 3400 1400 300 L 50 50 1 1 I +X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1/TIM3_CH2 38 3400 -900 300 L 50 50 1 1 I +X VDD 48 200 2300 300 D 50 50 1 1 I +X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/DCMI_D5/USART1_TX 58 3400 1000 300 L 50 50 1 1 I +X VDD 19 -400 2300 300 D 50 50 1 1 I +X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3 29 3400 600 300 L 50 50 1 1 I +X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2 39 3400 -1000 300 L 50 50 1 1 I +X PA14/JTCK/SWCLK 49 -3600 -1650 300 R 50 50 1 1 I +X PB7/I2C1_SDA/FSMC_NL/DCMI_VSYNC/USART1_RX/TIM4_CH2 59 3400 900 300 L 50 50 1 1 I +ENDDRAW +ENDDEF +# # STM32F407VE # DEF STM32F407VE U 0 40 Y Y 1 F N F0 "U" 0 0 60 H V C CNN F1 "STM32F407VE" 0 100 60 H V C CNN F2 "TQFP100" 0 -100 60 H V C CNN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN DRAW S -4700 -2700 4700 2700 0 1 0 f X PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/EVENTOUT 1 5000 2350 300 L 50 50 1 1 I @@ -1948,7 +2027,7 @@ DEF STM32F407VG U 0 40 Y Y 1 F N F0 "U" 0 0 60 H V C CNN F1 "STM32F407VG" 0 100 60 H V C CNN F2 "TQFP100" 0 -100 60 H V C CNN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN DRAW S -4700 -2700 4700 2700 0 1 0 f X PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/EVENTOUT 1 5000 2350 300 L 50 50 1 1 I @@ -2060,7 +2139,7 @@ DEF STM32F415VG U 0 40 Y Y 1 F N F0 "U" 0 0 60 H V C CNN F1 "STM32F415VG" 0 100 60 H V C CNN F2 "TQFP100" 0 -100 60 H V C CNN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN DRAW S -4700 -2700 4700 2700 0 1 0 f X PE2/TRACECLK/FSMC_A23/EVENTOUT 1 5000 2350 300 L 50 50 1 1 I @@ -2172,7 +2251,7 @@ DEF STM32F417VE U 0 40 Y Y 1 F N F0 "U" 0 0 60 H V C CNN F1 "STM32F417VE" 0 100 60 H V C CNN F2 "TQFP100" 0 -100 60 H V C CNN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN DRAW S -4700 -2700 4700 2700 0 1 0 f X PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/EVENTOUT 1 5000 2350 300 L 50 50 1 1 I @@ -2284,7 +2363,7 @@ DEF STM32F417VG U 0 40 Y Y 1 F N F0 "U" 0 0 60 H V C CNN F1 "STM32F417VG" 0 100 60 H V C CNN F2 "TQFP100" 0 -100 60 H V C CNN -F3 "" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN DRAW S -4700 -2700 4700 2700 0 1 0 f X PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/EVENTOUT 1 5000 2350 300 L 50 50 1 1 I From c9e4248829e0269a2085282b56bc5027e0342ea7 Mon Sep 17 00:00:00 2001 From: Scott Date: Wed, 12 Aug 2015 14:32:24 -0400 Subject: [PATCH 3/4] Apparently there isn't a 64-pin version of the 407. This undoes most of the last commit. --- library/stm32.lib | 79 ----------------------------------------------- 1 file changed, 79 deletions(-) diff --git a/library/stm32.lib b/library/stm32.lib index d5b664bb..8f1af4d3 100644 --- a/library/stm32.lib +++ b/library/stm32.lib @@ -1874,85 +1874,6 @@ X VDD 100 750 3000 300 D 50 50 1 1 I ENDDRAW ENDDEF # -# STM32F407R -# -DEF STM32F407R U 0 40 Y Y 1 F N -F0 "U" 150 -600 60 H V C CNN -F1 "STM32F407R" 150 -500 60 H V C CNN -F2 "TQFP64" 150 -700 60 H V C CNN -F3 "~" 150 -600 60 H V C CNN -$FPLIST - LQFP64 -$ENDFPLIST -DRAW -S -3300 -2100 3100 2000 0 1 0 f -X VBAT 1 1000 2300 300 D 50 50 1 1 I -X PC13 2 3400 -1500 300 L 50 50 1 1 I -X PC14/OSC32_IN 3 3400 -1600 300 L 50 50 1 1 I -X PC15/OSC32_OUT 4 3400 -1700 300 L 50 50 1 1 I -X PH0/OSC_IN 5 -3600 1150 300 R 50 50 1 1 I -X PH1/OSC_OUT 6 -3600 550 300 R 50 50 1 1 I -X NRST 7 -3600 1350 300 R 50 50 1 1 I -X PC0/OTG_HS_ULPI_STP 8 3400 -200 300 L 50 50 1 1 I -X PC1/ETH_MDC/_EVENTOUT 9 3400 -300 300 L 50 50 1 1 I -X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD 10 3400 -400 300 L 50 50 1 1 I -X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC/OTG_HS_SOF/I2S3_WS 20 -3600 -650 300 R 50 50 1 1 I -X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4 30 3400 500 300 L 50 50 1 1 I -X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4 40 3400 -1100 300 L 50 50 1 1 I -X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS 50 -3600 -1750 300 R 50 50 1 1 I -X BOOT0 60 -3600 1550 300 R 50 50 1 1 I -X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK 11 3400 -500 300 L 50 50 1 1 I -X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN 21 -3600 -750 300 R 50 50 1 1 I -X VCAP_1 31 300 -2400 300 U 50 50 1 1 I -X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF 41 -3600 -1050 300 R 50 50 1 1 I -X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX 51 3400 -1200 300 L 50 50 1 1 I -X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/DCMI_D6/ETH_MII_TXD3/I2C1_SCL/CAN1_RX 61 3400 800 300 L 50 50 1 1 I -X VSSA 12 -1000 -2400 300 U 50 50 1 1 I -X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1_BKIN 22 -3600 -850 300 R 50 50 1 1 I -X VDD 32 -100 2300 300 D 50 50 1 1 I -X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/DCMI_D0 42 -3600 -1150 300 R 50 50 1 1 I -X PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4/USART3_RX/I2S3ext_SD 52 3400 -1300 300 L 50 50 1 1 I -X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TX 62 3400 700 300 L 50 50 1 1 I -X VDDA 13 -900 2300 300 D 50 50 1 1 I -X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/RMII_CRS_DV 23 -3600 -950 300 R 50 50 1 1 I -X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID 33 3400 400 300 L 50 50 1 1 I -X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/DCMI_D1 43 -3600 -1250 300 R 50 50 1 1 I -X PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK 53 3400 -1400 300 L 50 50 1 1 I -X VSS 63 -600 -2400 300 U 50 50 1 1 I -X PA0/WKUP/USART2_CTS/UART4_TX/ETH_MII_CRS_/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR 14 -3600 -250 300 R 50 50 1 1 I -X PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0 24 3400 -600 300 L 50 50 1 1 I -X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1 34 3400 300 300 L 50 50 1 1 I -X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM 44 -3600 -1350 300 R 50 50 1 1 I -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11 54 -3600 150 300 R 50 50 1 1 I -X VDD 64 500 2300 300 D 50 50 1 1 I -X PA1/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIMM2_CH2 15 -3600 -350 300 R 50 50 1 1 I -X PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1 25 3400 -700 300 L 50 50 1 1 I -X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD 35 3400 200 300 L 50 50 1 1 I -X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP 45 -3600 -1450 300 R 50 50 1 1 I -X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK 55 3400 1300 300 L 50 50 1 1 I -X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO 16 -3600 -450 300 R 50 50 1 1 I -X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N 26 3400 1600 300 L 50 50 1 1 I -X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP 36 3400 100 300 L 50 50 1 1 I -X PA13/JTMS/SWDIO 46 -3600 -1550 300 R 50 50 1 1 I -X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD 56 3400 1200 300 L 50 50 1 1 I -X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL 17 -3600 -550 300 R 50 50 1 1 I -X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/OTG_HS_INTN/TIM1_CH3N 27 3400 1500 300 L 50 50 1 1 I -X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0/TIM3_CH1 37 3400 -800 300 L 50 50 1 1 I -X VCAP_2 47 800 -2400 300 U 50 50 1 1 I -X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/DCMI_D10/I2S3_SD 57 3400 1100 300 L 50 50 1 1 I -X VSS 18 -800 -2400 300 U 50 50 1 1 I -X PB2/BOOT1 28 3400 1400 300 L 50 50 1 1 I -X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1/TIM3_CH2 38 3400 -900 300 L 50 50 1 1 I -X VDD 48 200 2300 300 D 50 50 1 1 I -X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/DCMI_D5/USART1_TX 58 3400 1000 300 L 50 50 1 1 I -X VDD 19 -400 2300 300 D 50 50 1 1 I -X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3 29 3400 600 300 L 50 50 1 1 I -X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2 39 3400 -1000 300 L 50 50 1 1 I -X PA14/JTCK/SWCLK 49 -3600 -1650 300 R 50 50 1 1 I -X PB7/I2C1_SDA/FSMC_NL/DCMI_VSYNC/USART1_RX/TIM4_CH2 59 3400 900 300 L 50 50 1 1 I -ENDDRAW -ENDDEF -# # STM32F407VE # DEF STM32F407VE U 0 40 Y Y 1 F N From 0e3ed5fb6e7dd2e39e84238090564ae51d7c852b Mon Sep 17 00:00:00 2001 From: Scott Date: Thu, 29 Oct 2015 00:11:44 -0400 Subject: [PATCH 4/4] Shifted pins onto grid and adjusted text sizes in stm32.lib --- library/stm32.dcm | 2 +- library/stm32.lib | 4090 ++++++++++++++++++++++----------------------- 2 files changed, 2046 insertions(+), 2046 deletions(-) diff --git a/library/stm32.dcm b/library/stm32.dcm index 03b1819b..62f3ed3b 100644 --- a/library/stm32.dcm +++ b/library/stm32.dcm @@ -1,4 +1,4 @@ -EESchema-DOCLIB Version 2.0 Date: Wed 12 Aug 2015 02:20:09 PM EDT +EESchema-DOCLIB Version 2.0 # $CMP STM32F030K6 D 32-bit ARM Cortex-M0 Microcontroller, 48MHz, 32KB Flash, 4KB RAM, RTC, LQFP32 diff --git a/library/stm32.lib b/library/stm32.lib index 8f1af4d3..87c13c5b 100644 --- a/library/stm32.lib +++ b/library/stm32.lib @@ -1,4 +1,4 @@ -EESchema-LIBRARY Version 2.3 Date: Wed 12 Aug 2015 02:20:09 PM EDT +EESchema-LIBRARY Version 2.3 #encoding utf-8 # # STM32F030K6 @@ -9,7 +9,6 @@ F1 "STM32F030K6" 1300 -1600 50 H V C CNN F2 "LQFP-32" 0 -100 50 H V C CIN F3 "" 0 0 50 H V C CNN DRAW -S -1650 1550 1650 -1550 0 1 10 f X VDD 1 0 1700 150 D 50 50 1 1 W X PF0/OSC_IN 2 -1800 -500 150 R 50 50 1 1 B X PF1/OSC_OUT 3 -1800 -600 150 R 50 50 1 1 B @@ -42,500 +41,501 @@ X USART1_CK/TIM1_CH1/MCO/EVENTOUT/PA8 18 1800 400 150 L 50 50 1 1 B X SPI1_MOSI/I2C1_SMBA/TIM16_BKIN/TIM3_CH2/PB5 28 1800 -1000 150 L 50 50 1 1 B X USART1_TX/TIM1_CH2/I2C1_SCL/PA9 19 1800 300 150 L 50 50 1 1 B X I2C1_SCL/USART1_TX/TIM16_CH1N/PB6 29 1800 -1100 150 L 50 50 1 1 B +S -1650 1550 1650 -1550 0 1 10 f ENDDRAW ENDDEF # # STM32F050C4 # DEF STM32F050C4 U 0 40 Y Y 1 F N -F0 "U" -1500 1900 60 H V C CNN -F1 "STM32F050C4" 1250 -1900 60 H V C CNN -F2 "LQFP48" 0 0 40 H V C CIN -F3 "~" 0 0 60 H V C CNN +F0 "U" -1500 1900 50 H V C CNN +F1 "STM32F050C4" 1250 -1900 50 H V C CNN +F2 "LQFP48" 0 0 50 H V C CIN +F3 "" 0 0 50 H V C CNN ALIAS STM32F050C6 DRAW +X VBAT 1 -1700 1100 150 R 50 50 1 1 W +X PC13 2 -1700 -600 150 R 50 50 1 1 B +X PC14/OSC32_IN 3 -1700 -700 150 R 50 50 1 1 B +X PC15/OSC32_OUT 4 -1700 -800 150 R 50 50 1 1 B +X PF0/OSC_IN 5 -1700 -100 150 R 50 50 1 1 B +X PF1/OSC_OUT 6 -1700 -200 150 R 50 50 1 1 B +X ~NRST 7 -1700 1600 150 R 50 50 1 1 I +X VSSA 8 300 -2000 150 U 50 50 1 1 W +X VDDA 9 300 2000 150 D 50 50 1 1 W +X WKUP1/RTC_TAMP2/ADC_IN0/TIM2_CH1_ETR/PA0 10 1700 1600 150 L 50 50 1 1 B +X PB2 20 1700 -300 150 L 50 50 1 1 B +X USART1_TX/TIM1_CH2/PA9 30 1700 700 150 L 50 50 1 1 B +X SPI1_MISO/I2S1_MCK/TIM3_CH1/EVENTOUT/PB4 40 1700 -500 150 L 50 50 1 1 B +X ADC1_IN1/TIM2_CH2/PA1 11 1700 1500 150 L 50 50 1 1 B +X TIM2_CH3/PB10 21 1700 -1100 150 L 50 50 1 1 B +X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 31 1700 600 150 L 50 50 1 1 B +X SPI1_MOSI/I2S1_SD/I2C1_SMBA/TIM16_BKIN/TIM3_CH2/PB5 41 1700 -600 150 L 50 50 1 1 B +X ADC1_IN2/TIM2_CH3/PA2 12 1700 1400 150 L 50 50 1 1 B +X TIM2_CH4/EVENTOUT/PB11 22 1700 -1200 150 L 50 50 1 1 B +X USART1_CTS/TIM1_CH4/EVENTOUT/PA11 32 1700 500 150 L 50 50 1 1 B +X I2C1_SCL/USART1_TX/TIM16_CH1N/PB6 42 1700 -700 150 L 50 50 1 1 B +X ADC1_IN3/TIM2_CH4/PA3 13 1700 1300 150 L 50 50 1 1 B +X VSS 23 -200 -2000 150 U 50 50 1 1 W +X USART1_RTS/TIM1_ETR/EVENTOUT/PA12 33 1700 400 150 L 50 50 1 1 B +X I2C1_SDA/USART1_RX/TIM17_CH1N/PB7 43 1700 -800 150 L 50 50 1 1 B +X SPI1_NSS/I2S1_WS/ADC_IN4/TIM14_CH1/PA4 14 1700 1200 150 L 50 50 1 1 B +X VDD 24 -200 2000 150 D 50 50 1 1 W +X IR_OUT/SWDAT/PA13 34 1700 300 150 L 50 50 1 1 B +X BOOT0 44 -1700 1400 150 R 50 50 1 1 I +X SPI1_SCK/I2S1_CK/TIM2_CH1_ETR/ADC1_IN5/PA5 15 1700 1100 150 L 50 50 1 1 B +X TIM1_BKIN/EVENTOUT/PB12 25 1700 -1300 150 L 50 50 1 1 B +X PF6 35 -1700 -300 150 R 50 50 1 1 B +X I2C1_SCL/TIM16_CH1/PB8 45 1700 -900 150 L 50 50 1 1 B +X SPI1_MISO/I2S1_MCK/TIM3_CH1/TIM1_BKIN/ADC_IN6/TIM16_CH1/EVENTOUT/PA6 16 1700 1000 150 L 50 50 1 1 B +X TIM1_CH1N/PB13 26 1700 -1400 150 L 50 50 1 1 B +X PF7 36 -1700 -400 150 R 50 50 1 1 B +X TIM4_CH4/TIM17_CH1/PB9 46 1700 -1000 150 L 50 50 1 1 B +X SPI1_MOSI/I2S1_SD/TIM3_CH2/TIM14_CH1/TIM1_CH1N/ADC_IN7/TIM17_CH1/EVENTOUT/PA7 17 1700 900 150 L 50 50 1 1 B +X TIM1_CH2N/PB14 27 1700 -1500 150 L 50 50 1 1 B +X SWCLK/PA14 37 1700 200 150 L 50 50 1 1 B +X VSS 47 0 -2000 150 U 50 50 1 1 W +X ADC1_IN8/TIM3_CH3/TIM1_CH2N/EVENTOUT/PB0 18 1700 -100 150 L 50 50 1 1 B +X TIM1_CH3N/RTC_REFIN/PB15 28 1700 -1600 150 L 50 50 1 1 B +X SPI1_NSS/I2S1_WS/TIM2_CH_ETR/EVENTOUT/PA15 38 1700 100 150 L 50 50 1 1 B +X VDD 48 0 2000 150 D 50 50 1 1 W +X ADC1_IN9/TIM3_CH4/TIM14_CH1/TIM1_CH3N/PB1 19 1700 -200 150 L 50 50 1 1 B +X USART1_CK/TIM1_CH1/MCO/EVENTOUT/PA8 29 1700 800 150 L 50 50 1 1 B +X SPI1_SCK/I2S1_CK/TIM2_CH2/EVENTOUT/PB3 39 1700 -400 150 L 50 50 1 1 B S -1550 1850 1550 -1850 0 1 10 f -X VBAT 1 -1700 1150 150 R 40 40 1 1 W -X PC13 2 -1700 -600 150 R 40 40 1 1 B -X PC14/OSC32_IN 3 -1700 -700 150 R 40 40 1 1 B -X PC15/OSC32_OUT 4 -1700 -800 150 R 40 40 1 1 B -X PF0/OSC_IN 5 -1700 -100 150 R 40 40 1 1 B -X PF1/OSC_OUT 6 -1700 -200 150 R 40 40 1 1 B -X ~NRST 7 -1700 1600 150 R 40 40 1 1 I -X VSSA 8 300 -2000 150 U 40 40 1 1 W -X VDDA 9 300 2000 150 D 40 40 1 1 W -X WKUP1/RTC_TAMP2/ADC_IN0/TIM2_CH1_ETR/PA0 10 1700 1600 150 L 40 40 1 1 B -X PB2 20 1700 -300 150 L 40 40 1 1 B -X USART1_TX/TIM1_CH2/PA9 30 1700 700 150 L 40 40 1 1 B -X SPI1_MISO/I2S1_MCK/TIM3_CH1/EVENTOUT/PB4 40 1700 -500 150 L 40 40 1 1 B -X ADC1_IN1/TIM2_CH2/PA1 11 1700 1500 150 L 40 40 1 1 B -X TIM2_CH3/PB10 21 1700 -1100 150 L 40 40 1 1 B -X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 31 1700 600 150 L 40 40 1 1 B -X SPI1_MOSI/I2S1_SD/I2C1_SMBA/TIM16_BKIN/TIM3_CH2/PB5 41 1700 -600 150 L 40 40 1 1 B -X ADC1_IN2/TIM2_CH3/PA2 12 1700 1400 150 L 40 40 1 1 B -X TIM2_CH4/EVENTOUT/PB11 22 1700 -1200 150 L 40 40 1 1 B -X USART1_CTS/TIM1_CH4/EVENTOUT/PA11 32 1700 500 150 L 40 40 1 1 B -X I2C1_SCL/USART1_TX/TIM16_CH1N/PB6 42 1700 -700 150 L 40 40 1 1 B -X ADC1_IN3/TIM2_CH4/PA3 13 1700 1300 150 L 40 40 1 1 B -X VSS 23 -150 -2000 150 U 40 40 1 1 W -X USART1_RTS/TIM1_ETR/EVENTOUT/PA12 33 1700 400 150 L 40 40 1 1 B -X I2C1_SDA/USART1_RX/TIM17_CH1N/PB7 43 1700 -800 150 L 40 40 1 1 B -X SPI1_NSS/I2S1_WS/ADC_IN4/TIM14_CH1/PA4 14 1700 1200 150 L 40 40 1 1 B -X VDD 24 -150 2000 150 D 40 40 1 1 W -X IR_OUT/SWDAT/PA13 34 1700 300 150 L 40 40 1 1 B -X BOOT0 44 -1700 1450 150 R 40 40 1 1 I -X SPI1_SCK/I2S1_CK/TIM2_CH1_ETR/ADC1_IN5/PA5 15 1700 1100 150 L 40 40 1 1 B -X TIM1_BKIN/EVENTOUT/PB12 25 1700 -1300 150 L 40 40 1 1 B -X PF6 35 -1700 -300 150 R 40 40 1 1 B -X I2C1_SCL/TIM16_CH1/PB8 45 1700 -900 150 L 40 40 1 1 B -X SPI1_MISO/I2S1_MCK/TIM3_CH1/TIM1_BKIN/ADC_IN6/TIM16_CH1/EVENTOUT/PA6 16 1700 1000 150 L 40 40 1 1 B -X TIM1_CH1N/PB13 26 1700 -1400 150 L 40 40 1 1 B -X PF7 36 -1700 -400 150 R 40 40 1 1 B -X TIM4_CH4/TIM17_CH1/PB9 46 1700 -1000 150 L 40 40 1 1 B -X SPI1_MOSI/I2S1_SD/TIM3_CH2/TIM14_CH1/TIM1_CH1N/ADC_IN7/TIM17_CH1/EVENTOUT/PA7 17 1700 900 150 L 40 40 1 1 B -X TIM1_CH2N/PB14 27 1700 -1500 150 L 40 40 1 1 B -X SWCLK/PA14 37 1700 200 150 L 40 40 1 1 B -X VSS 47 0 -2000 150 U 40 40 1 1 W -X ADC1_IN8/TIM3_CH3/TIM1_CH2N/EVENTOUT/PB0 18 1700 -100 150 L 40 40 1 1 B -X TIM1_CH3N/RTC_REFIN/PB15 28 1700 -1600 150 L 40 40 1 1 B -X SPI1_NSS/I2S1_WS/TIM2_CH_ETR/EVENTOUT/PA15 38 1700 100 150 L 40 40 1 1 B -X VDD 48 0 2000 150 D 40 40 1 1 W -X ADC1_IN9/TIM3_CH4/TIM14_CH1/TIM1_CH3N/PB1 19 1700 -200 150 L 40 40 1 1 B -X USART1_CK/TIM1_CH1/MCO/EVENTOUT/PA8 29 1700 800 150 L 40 40 1 1 B -X SPI1_SCK/I2S1_CK/TIM2_CH2/EVENTOUT/PB3 39 1700 -400 150 L 40 40 1 1 B ENDDRAW ENDDEF # # STM32F050K4 # DEF STM32F050K4 U 0 40 Y Y 1 F N -F0 "U" -1400 1450 60 H V C CNN -F1 "STM32F050K4" 1150 -1450 60 H V C CNN -F2 "LQFP32" 0 0 40 H V C CIN -F3 "~" 0 0 60 H V C CNN +F0 "U" -1400 1450 50 H V C CNN +F1 "STM32F050K4" 1150 -1450 50 H V C CNN +F2 "LQFP32" 0 0 50 H V C CIN +F3 "" 0 0 50 H V C CNN ALIAS STM32F050K6 DRAW +X VDD 1 -100 1500 100 D 50 50 1 1 W +X PF0/OSC_IN 2 -1600 -600 150 R 50 50 1 1 B +X PF1/OSC_OUT 3 -1600 -700 150 R 50 50 1 1 B +X ~NRST 4 -1600 1200 150 R 50 50 1 1 I +X VDDA 5 100 1500 100 D 50 50 1 1 W +X WKUP1/RTC_TAMP2/ADC_IN0/TIM2_CH1_ETR/PA0 6 1600 1100 150 L 50 50 1 1 B +X ADC1_IN1/TIM2_CH2/PA1 7 1600 1000 150 L 50 50 1 1 B +X ADC1_IN2/TIM2_CH3/PA2 8 1600 900 150 L 50 50 1 1 B +X ADC1_IN3/TIM2_CH4/PA3 9 1600 800 150 L 50 50 1 1 B +X SPI1_NSS/I2S1_WS/ADC_IN4/TIM14_CH1/PA4 10 1600 700 150 L 50 50 1 1 B +X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 20 1600 100 150 L 50 50 1 1 B +X I2C1_SDA/USART1_RX/TIM17_CH1N/PB7 30 1600 -1200 150 L 50 50 1 1 B +X SPI1_SCK/I2S1_CK/TIM2_CH1_ETR/ADC1_IN5/PA5 11 1600 600 150 L 50 50 1 1 B +X USART1_CTS/TIM1_CH4/EVENTOUT/PA11 21 1600 0 150 L 50 50 1 1 B +X BOOT0 31 -1600 900 150 R 50 50 1 1 I +X SPI1_MISO/I2S1_MCK/TIM3_CH1/TIM1_BKIN/ADC_IN6/TIM16_CH1/EVENTOUT/PA6 12 1600 500 150 L 50 50 1 1 B +X USART1_RTS/TIM1_ETR/EVENTOUT/PA12 22 1600 -100 150 L 50 50 1 1 B +X VSS 32 0 -1500 100 U 50 50 1 1 W +X SPI1_MOSI/I2S1_SD/TIM3_CH2/TIM14_CH1/TIM1_CH1N/ADC_IN7/TIM17_CH1/EVENTOUT/PA7 13 1600 400 150 L 50 50 1 1 B +X IR_OUT/SWDAT/PA13 23 1600 -200 150 L 50 50 1 1 B +X ADC1_IN8/TIM3_CH3/TIM1_CH2N/EVENTOUT/PB0 14 1600 -600 150 L 50 50 1 1 B +X SWCLK/PA14 24 1600 -300 150 L 50 50 1 1 B +X ADC1_IN9/TIM3_CH4/TIM14_CH1/TIM1_CH3N/PB1 15 1600 -700 150 L 50 50 1 1 B +X SPI1_NSS/I2S1_WS/TIM2_CH_ETR/EVENTOUT/PA15 25 1600 -400 150 L 50 50 1 1 B +X VSS 16 -100 -1500 100 U 50 50 1 1 W +X SPI1_SCK/I2S1_CK/TIM2_CH2/EVENTOUT/PB3 26 1600 -800 150 L 50 50 1 1 B +X VDD 17 -200 1500 100 D 50 50 1 1 W +X SPI1_MISO/I2S1_MCK/TIM3_CH1/EVENTOUT/PB4 27 1600 -900 150 L 50 50 1 1 B +X USART1_CK/TIM1_CH1/MCO/EVENTOUT/PA8 18 1600 300 150 L 50 50 1 1 B +X SPI1_MOSI/I2S1_SD/I2C1_SMBA/TIM16_BKIN/TIM3_CH2/PB5 28 1600 -1000 150 L 50 50 1 1 B +X USART1_TX/TIM1_CH2/PA9 19 1600 200 150 L 50 50 1 1 B +X I2C1_SCL/USART1_TX/TIM16_CH1N/PB6 29 1600 -1100 150 L 50 50 1 1 B S -1450 1400 1450 -1400 0 1 10 f -X VDD 1 -50 1550 150 D 40 40 1 1 W -X PF0/OSC_IN 2 -1600 -550 150 R 40 40 1 1 B -X PF1/OSC_OUT 3 -1600 -650 150 R 40 40 1 1 B -X ~NRST 4 -1600 1200 150 R 40 40 1 1 I -X VDDA 5 150 1550 150 D 40 40 1 1 W -X WKUP1/RTC_TAMP2/ADC_IN0/TIM2_CH1_ETR/PA0 6 1600 1150 150 L 40 40 1 1 B -X ADC1_IN1/TIM2_CH2/PA1 7 1600 1050 150 L 40 40 1 1 B -X ADC1_IN2/TIM2_CH3/PA2 8 1600 950 150 L 40 40 1 1 B -X ADC1_IN3/TIM2_CH4/PA3 9 1600 850 150 L 40 40 1 1 B -X SPI1_NSS/I2S1_WS/ADC_IN4/TIM14_CH1/PA4 10 1600 750 150 L 40 40 1 1 B -X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 20 1600 150 150 L 40 40 1 1 B -X I2C1_SDA/USART1_RX/TIM17_CH1N/PB7 30 1600 -1150 150 L 40 40 1 1 B -X SPI1_SCK/I2S1_CK/TIM2_CH1_ETR/ADC1_IN5/PA5 11 1600 650 150 L 40 40 1 1 B -X USART1_CTS/TIM1_CH4/EVENTOUT/PA11 21 1600 50 150 L 40 40 1 1 B -X BOOT0 31 -1600 950 150 R 40 40 1 1 I -X SPI1_MISO/I2S1_MCK/TIM3_CH1/TIM1_BKIN/ADC_IN6/TIM16_CH1/EVENTOUT/PA6 12 1600 550 150 L 40 40 1 1 B -X USART1_RTS/TIM1_ETR/EVENTOUT/PA12 22 1600 -50 150 L 40 40 1 1 B -X VSS 32 50 -1550 150 U 40 40 1 1 W -X SPI1_MOSI/I2S1_SD/TIM3_CH2/TIM14_CH1/TIM1_CH1N/ADC_IN7/TIM17_CH1/EVENTOUT/PA7 13 1600 450 150 L 40 40 1 1 B -X IR_OUT/SWDAT/PA13 23 1600 -150 150 L 40 40 1 1 B -X ADC1_IN8/TIM3_CH3/TIM1_CH2N/EVENTOUT/PB0 14 1600 -550 150 L 40 40 1 1 B -X SWCLK/PA14 24 1600 -250 150 L 40 40 1 1 B -X ADC1_IN9/TIM3_CH4/TIM14_CH1/TIM1_CH3N/PB1 15 1600 -650 150 L 40 40 1 1 B -X SPI1_NSS/I2S1_WS/TIM2_CH_ETR/EVENTOUT/PA15 25 1600 -350 150 L 40 40 1 1 B -X VSS 16 -50 -1550 150 U 40 40 1 1 W -X SPI1_SCK/I2S1_CK/TIM2_CH2/EVENTOUT/PB3 26 1600 -750 150 L 40 40 1 1 B -X VDD 17 -150 1550 150 D 40 40 1 1 W -X SPI1_MISO/I2S1_MCK/TIM3_CH1/EVENTOUT/PB4 27 1600 -850 150 L 40 40 1 1 B -X USART1_CK/TIM1_CH1/MCO/EVENTOUT/PA8 18 1600 350 150 L 40 40 1 1 B -X SPI1_MOSI/I2S1_SD/I2C1_SMBA/TIM16_BKIN/TIM3_CH2/PB5 28 1600 -950 150 L 40 40 1 1 B -X USART1_TX/TIM1_CH2/PA9 19 1600 250 150 L 40 40 1 1 B -X I2C1_SCL/USART1_TX/TIM16_CH1N/PB6 29 1600 -1050 150 L 40 40 1 1 B ENDDRAW ENDDEF # # STM32F100C4 # DEF STM32F100C4 U 0 40 Y Y 1 F N -F0 "U" -1300 1650 60 H V C CNN -F1 "STM32F100C4" 1050 -1650 60 H V C CNN -F2 "LQFP48" 0 0 40 H V C CIN -F3 "~" 0 0 60 H V C CNN +F0 "U" -1300 1650 50 H V C CNN +F1 "STM32F100C4" 1050 -1650 50 H V C CNN +F2 "LQFP48" 0 0 50 H V C CIN +F3 "" 0 0 50 H V C CNN ALIAS STM32F100C6 DRAW +X VBAT 1 -1500 700 150 R 50 50 1 1 W +X PC13/TAMPER_RTC 2 -1500 500 150 R 50 50 1 1 B +X PC14/OSC32_IN 3 -1500 400 150 R 50 50 1 1 B +X PC15/OSC32_OUT 4 -1500 300 150 R 50 50 1 1 B +X OSC_IN 5 -1500 1000 150 R 50 50 1 1 I +X OSC_OUT 6 -1500 900 150 R 50 50 1 1 O +X ~NRST 7 -1500 1400 150 R 50 50 1 1 I +X VSSA 8 300 -1700 100 U 50 50 1 1 W +X VDDA 9 300 1700 100 D 50 50 1 1 W +X WKUP/USART2_CTS/ADC1_IN0/TIM2_CH1_ETR/PA0 10 1500 1200 150 L 50 50 1 1 B +X PB2/BOOT1 20 -1500 -100 150 R 50 50 1 1 B +X USART1_TX/TIM1_CH2/TIM15_BKIN/PA9 30 1500 300 150 L 50 50 1 1 B +X PB4/NJRST 40 -1500 -300 150 R 50 50 1 1 B +X USART2_RTS/ADC1_IN1/TIM2_CH2/PA1 11 1500 1100 150 L 50 50 1 1 B +X PB10 21 -1500 -900 150 R 50 50 1 1 B +X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 31 1500 200 150 L 50 50 1 1 B +X PB5/I2C1_SMBA/TIM16_BKIN 41 -1500 -400 150 R 50 50 1 1 B +X USART2_TX/ADC1_IN2/TIM2_CH3/TIM15_CH1/PA2 12 1500 1000 150 L 50 50 1 1 B +X PB11 22 -1500 -1000 150 R 50 50 1 1 B +X USART1_CTS/TIM1_CH4/PA11 32 1500 100 150 L 50 50 1 1 B +X PB6/I2C1_SCL/TIM16_CH1N 42 -1500 -500 150 R 50 50 1 1 B +X USART2_RX/ADC1_IN3/TIM2_CH4/TIM15_CH2/PA3 13 1500 900 150 L 50 50 1 1 B +X VSS 23 -300 -1700 100 U 50 50 1 1 W +X USART1_RTS/TIM1_ETR/PA12 33 1500 0 150 L 50 50 1 1 B +X PB7/I2C1_SDA/TIM17_CH1N 43 -1500 -600 150 R 50 50 1 1 B +X SPI1_NSS/ADC1_IN4/USART2_CK/DAC1_OUT/PA4 14 1500 800 150 L 50 50 1 1 B +X VDD 24 -300 1700 100 D 50 50 1 1 W +X JTMS/SWDIO/PA13 34 1500 -100 150 L 50 50 1 1 B +X BOOT0 44 -1500 1200 150 R 50 50 1 1 I +X SPI1_SCK/ADC1_IN5/DAC2_OUT/PA5 15 1500 700 150 L 50 50 1 1 B +X PB12/TIM1_BKIN 25 -1500 -1100 150 R 50 50 1 1 B +X VSS 35 -200 -1700 100 U 50 50 1 1 W +X PB8/TIM4_CH3/TIM16_CH1/CEC 45 -1500 -700 150 R 50 50 1 1 B +X SPI1_MISO/ADC1_IN6/TIM3_CH1/PA6 16 1500 600 150 L 50 50 1 1 B +X PB13/TIM1_CH1N 26 -1500 -1200 150 R 50 50 1 1 B +X VDD 36 -200 1700 100 D 50 50 1 1 W +X PB9/TIM4_CH4/TIM17_CH1 46 -1500 -800 150 R 50 50 1 1 B +X SPI1_MOSI/ADC1_IN7/TIM3_CH2/PA7 17 1500 500 150 L 50 50 1 1 B +X PB14/TIM1_CH2N 27 -1500 -1300 150 R 50 50 1 1 B +X JTCK/SWCLK/PA14 37 1500 -200 150 L 50 50 1 1 B +X VSS 47 0 -1700 100 U 50 50 1 1 W +X PB0/ADC1_IN8/TIM3_CH3 18 -1500 100 150 R 50 50 1 1 B +X PB15/TIM1_CH3N/TIM15_CH1N 28 -1500 -1400 150 R 50 50 1 1 B +X JTDI/PA15 38 1500 -300 150 L 50 50 1 1 B +X VDD 48 0 1700 100 D 50 50 1 1 W +X PB1/ADC1_IN9/TIM3_CH4 19 -1500 0 150 R 50 50 1 1 B +X USART1_CK/MCO/TIM1_CH1/PA8 29 1500 400 150 L 50 50 1 1 B +X PB3/JTDO 39 -1500 -200 150 R 50 50 1 1 B S -1350 1600 1350 -1600 0 1 10 f -X VBAT 1 -1500 700 150 R 40 40 1 1 W -X PC13/TAMPER_RTC 2 -1500 500 150 R 40 40 1 1 B -X PC14/OSC32_IN 3 -1500 400 150 R 40 40 1 1 B -X PC15/OSC32_OUT 4 -1500 300 150 R 40 40 1 1 B -X OSC_IN 5 -1500 1050 150 R 40 40 1 1 I -X OSC_OUT 6 -1500 900 150 R 40 40 1 1 O -X ~NRST 7 -1500 1400 150 R 40 40 1 1 I -X VSSA 8 300 -1750 150 U 40 40 1 1 W -X VDDA 9 300 1750 150 D 40 40 1 1 W -X WKUP/USART2_CTS/ADC1_IN0/TIM2_CH1_ETR/PA0 10 1500 1250 150 L 40 40 1 1 B -X PB2/BOOT1 20 -1500 -50 150 R 40 40 1 1 B -X USART1_TX/TIM1_CH2/TIM15_BKIN/PA9 30 1500 350 150 L 40 40 1 1 B -X PB4/NJRST 40 -1500 -250 150 R 40 40 1 1 B -X USART2_RTS/ADC1_IN1/TIM2_CH2/PA1 11 1500 1150 150 L 40 40 1 1 B -X PB10 21 -1500 -850 150 R 40 40 1 1 B -X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 31 1500 250 150 L 40 40 1 1 B -X PB5/I2C1_SMBA/TIM16_BKIN 41 -1500 -350 150 R 40 40 1 1 B -X USART2_TX/ADC1_IN2/TIM2_CH3/TIM15_CH1/PA2 12 1500 1050 150 L 40 40 1 1 B -X PB11 22 -1500 -950 150 R 40 40 1 1 B -X USART1_CTS/TIM1_CH4/PA11 32 1500 150 150 L 40 40 1 1 B -X PB6/I2C1_SCL/TIM16_CH1N 42 -1500 -450 150 R 40 40 1 1 B -X USART2_RX/ADC1_IN3/TIM2_CH4/TIM15_CH2/PA3 13 1500 950 150 L 40 40 1 1 B -X VSS 23 -300 -1750 150 U 40 40 1 1 W -X USART1_RTS/TIM1_ETR/PA12 33 1500 50 150 L 40 40 1 1 B -X PB7/I2C1_SDA/TIM17_CH1N 43 -1500 -550 150 R 40 40 1 1 B -X SPI1_NSS/ADC1_IN4/USART2_CK/DAC1_OUT/PA4 14 1500 850 150 L 40 40 1 1 B -X VDD 24 -300 1750 150 D 40 40 1 1 W -X JTMS/SWDIO/PA13 34 1500 -50 150 L 40 40 1 1 B -X BOOT0 44 -1500 1250 150 R 40 40 1 1 I -X SPI1_SCK/ADC1_IN5/DAC2_OUT/PA5 15 1500 750 150 L 40 40 1 1 B -X PB12/TIM1_BKIN 25 -1500 -1050 150 R 40 40 1 1 B -X VSS 35 -150 -1750 150 U 40 40 1 1 W -X PB8/TIM4_CH3/TIM16_CH1/CEC 45 -1500 -650 150 R 40 40 1 1 B -X SPI1_MISO/ADC1_IN6/TIM3_CH1/PA6 16 1500 650 150 L 40 40 1 1 B -X PB13/TIM1_CH1N 26 -1500 -1150 150 R 40 40 1 1 B -X VDD 36 -150 1750 150 D 40 40 1 1 W -X PB9/TIM4_CH4/TIM17_CH1 46 -1500 -750 150 R 40 40 1 1 B -X SPI1_MOSI/ADC1_IN7/TIM3_CH2/PA7 17 1500 550 150 L 40 40 1 1 B -X PB14/TIM1_CH2N 27 -1500 -1250 150 R 40 40 1 1 B -X JTCK/SWCLK/PA14 37 1500 -150 150 L 40 40 1 1 B -X VSS 47 0 -1750 150 U 40 40 1 1 W -X PB0/ADC1_IN8/TIM3_CH3 18 -1500 150 150 R 40 40 1 1 B -X PB15/TIM1_CH3N/TIM15_CH1N 28 -1500 -1350 150 R 40 40 1 1 B -X JTDI/PA15 38 1500 -250 150 L 40 40 1 1 B -X VDD 48 0 1750 150 D 40 40 1 1 W -X PB1/ADC1_IN9/TIM3_CH4 19 -1500 50 150 R 40 40 1 1 B -X USART1_CK/MCO/TIM1_CH1/PA8 29 1500 450 150 L 40 40 1 1 B -X PB3/JTDO 39 -1500 -150 150 R 40 40 1 1 B ENDDRAW ENDDEF # # STM32F100C8 # DEF STM32F100C8 U 0 40 Y Y 1 F N -F0 "U" -1300 1650 60 H V C CNN -F1 "STM32F100C8" 1050 -1650 60 H V C CNN -F2 "LQFP48" 0 0 40 H V C CIN -F3 "~" 0 0 60 H V C CNN +F0 "U" -1300 1650 50 H V C CNN +F1 "STM32F100C8" 1050 -1650 50 H V C CNN +F2 "LQFP48" 0 0 50 H V C CIN +F3 "" 0 0 50 H V C CNN ALIAS STM32F100CB DRAW +X VBAT 1 -1500 700 150 R 50 50 1 1 W +X PC13/TAMPER_RTC 2 -1500 500 150 R 50 50 1 1 B +X PC14/OSC32_IN 3 -1500 400 150 R 50 50 1 1 B +X PC15/OSC32_OUT 4 -1500 300 150 R 50 50 1 1 B +X OSC_IN 5 -1500 1000 150 R 50 50 1 1 I +X OSC_OUT 6 -1500 900 150 R 50 50 1 1 O +X ~NRST 7 -1500 1400 150 R 50 50 1 1 I +X VSSA 8 300 -1700 100 U 50 50 1 1 W +X VDDA 9 300 1700 100 D 50 50 1 1 W +X WKUP/USART2_CTS/ADC1_IN0/TIM2_CH1_ETR/PA0 10 1500 1200 150 L 50 50 1 1 B +X PB2/BOOT1 20 -1500 -100 150 R 50 50 1 1 B +X USART1_TX/TIM1_CH2/TIM15_BKIN/PA9 30 1500 300 150 L 50 50 1 1 B +X PB4/NJRST 40 -1500 -300 150 R 50 50 1 1 B +X USART2_RTS/ADC1_IN1/TIM2_CH2/PA1 11 1500 1100 150 L 50 50 1 1 B +X PB10/I2C2_SCL/USART3_TX 21 -1500 -900 150 R 50 50 1 1 B +X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 31 1500 200 150 L 50 50 1 1 B +X PB5/I2C1_SMBA/TIM16_BKIN 41 -1500 -400 150 R 50 50 1 1 B +X USART2_TX/ADC1_IN2/TIM2_CH3/TIM15_CH1/PA2 12 1500 1000 150 L 50 50 1 1 B +X PB11/I2C2_SDA/USART3_RX 22 -1500 -1000 150 R 50 50 1 1 B +X USART1_CTS/TIM1_CH4/PA11 32 1500 100 150 L 50 50 1 1 B +X PB6/I2C1_SCL/TIM4_CH1/TIM16_CH1N 42 -1500 -500 150 R 50 50 1 1 B +X USART2_RX/ADC1_IN3/TIM2_CH4/TIM15_CH2/PA3 13 1500 900 150 L 50 50 1 1 B +X VSS 23 -300 -1700 100 U 50 50 1 1 W +X USART1_RTS/TIM1_ETR/PA12 33 1500 0 150 L 50 50 1 1 B +X PB7/I2C1_SDA/TIM17_CH1N/TIM4_CH2 43 -1500 -600 150 R 50 50 1 1 B +X SPI1_NSS/ADC1_IN4/USART2_CK/DAC1_OUT/PA4 14 1500 800 150 L 50 50 1 1 B +X VDD 24 -300 1700 100 D 50 50 1 1 W +X JTMS/SWDIO/PA13 34 1500 -100 150 L 50 50 1 1 B +X BOOT0 44 -1500 1200 150 R 50 50 1 1 I +X SPI1_SCK/ADC1_IN5/DAC2_OUT/PA5 15 1500 700 150 L 50 50 1 1 B +X PB12/SPI2_NSS/I2C2_SMBA/TIM1_BKIN/USART3_CK 25 -1500 -1100 150 R 50 50 1 1 B +X VSS 35 -200 -1700 100 U 50 50 1 1 W +X PB8/TIM4_CH3/TIM16_CH1/CEC 45 -1500 -700 150 R 50 50 1 1 B +X SPI1_MISO/ADC1_IN6/TIM3_CH1/PA6 16 1500 600 150 L 50 50 1 1 B +X PB13/SPI2_SCK/TIM1_CH1N/USART3_CTS 26 -1500 -1200 150 R 50 50 1 1 B +X VDD 36 -200 1700 100 D 50 50 1 1 W +X PB9/TIM4_CH4/TIM17_CH1 46 -1500 -800 150 R 50 50 1 1 B +X SPI1_MOSI/ADC1_IN7/TIM3_CH2/PA7 17 1500 500 150 L 50 50 1 1 B +X PB14/SPI2_MISO/TIM1_CH2N/USART3_RTS 27 -1500 -1300 150 R 50 50 1 1 B +X JTCK/SWCLK/PA14 37 1500 -200 150 L 50 50 1 1 B +X VSS 47 0 -1700 100 U 50 50 1 1 W +X PB0/ADC1_IN8/TIM3_CH3 18 -1500 100 150 R 50 50 1 1 B +X PB15/SPI2_MOSI/TIM1_CH3N/TIM15_CH1N 28 -1500 -1400 150 R 50 50 1 1 B +X JTDI/PA15 38 1500 -300 150 L 50 50 1 1 B +X VDD 48 0 1700 100 D 50 50 1 1 W +X PB1/ADC1_IN9/TIM3_CH4 19 -1500 0 150 R 50 50 1 1 B +X USART1_CK/MCO/TIM1_CH1/PA8 29 1500 400 150 L 50 50 1 1 B +X PB3/JTDO 39 -1500 -200 150 R 50 50 1 1 B S -1350 1600 1350 -1600 0 1 10 f -X VBAT 1 -1500 700 150 R 40 40 1 1 W -X PC13/TAMPER_RTC 2 -1500 500 150 R 40 40 1 1 B -X PC14/OSC32_IN 3 -1500 400 150 R 40 40 1 1 B -X PC15/OSC32_OUT 4 -1500 300 150 R 40 40 1 1 B -X OSC_IN 5 -1500 1050 150 R 40 40 1 1 I -X OSC_OUT 6 -1500 900 150 R 40 40 1 1 O -X ~NRST 7 -1500 1400 150 R 40 40 1 1 I -X VSSA 8 300 -1750 150 U 40 40 1 1 W -X VDDA 9 300 1750 150 D 40 40 1 1 W -X WKUP/USART2_CTS/ADC1_IN0/TIM2_CH1_ETR/PA0 10 1500 1250 150 L 40 40 1 1 B -X PB2/BOOT1 20 -1500 -50 150 R 40 40 1 1 B -X USART1_TX/TIM1_CH2/TIM15_BKIN/PA9 30 1500 350 150 L 40 40 1 1 B -X PB4/NJRST 40 -1500 -250 150 R 40 40 1 1 B -X USART2_RTS/ADC1_IN1/TIM2_CH2/PA1 11 1500 1150 150 L 40 40 1 1 B -X PB10/I2C2_SCL/USART3_TX 21 -1500 -850 150 R 40 40 1 1 B -X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 31 1500 250 150 L 40 40 1 1 B -X PB5/I2C1_SMBA/TIM16_BKIN 41 -1500 -350 150 R 40 40 1 1 B -X USART2_TX/ADC1_IN2/TIM2_CH3/TIM15_CH1/PA2 12 1500 1050 150 L 40 40 1 1 B -X PB11/I2C2_SDA/USART3_RX 22 -1500 -950 150 R 40 40 1 1 B -X USART1_CTS/TIM1_CH4/PA11 32 1500 150 150 L 40 40 1 1 B -X PB6/I2C1_SCL/TIM4_CH1/TIM16_CH1N 42 -1500 -450 150 R 40 40 1 1 B -X USART2_RX/ADC1_IN3/TIM2_CH4/TIM15_CH2/PA3 13 1500 950 150 L 40 40 1 1 B -X VSS 23 -300 -1750 150 U 40 40 1 1 W -X USART1_RTS/TIM1_ETR/PA12 33 1500 50 150 L 40 40 1 1 B -X PB7/I2C1_SDA/TIM17_CH1N/TIM4_CH2 43 -1500 -550 150 R 40 40 1 1 B -X SPI1_NSS/ADC1_IN4/USART2_CK/DAC1_OUT/PA4 14 1500 850 150 L 40 40 1 1 B -X VDD 24 -300 1750 150 D 40 40 1 1 W -X JTMS/SWDIO/PA13 34 1500 -50 150 L 40 40 1 1 B -X BOOT0 44 -1500 1250 150 R 40 40 1 1 I -X SPI1_SCK/ADC1_IN5/DAC2_OUT/PA5 15 1500 750 150 L 40 40 1 1 B -X PB12/SPI2_NSS/I2C2_SMBA/TIM1_BKIN/USART3_CK 25 -1500 -1050 150 R 40 40 1 1 B -X VSS 35 -150 -1750 150 U 40 40 1 1 W -X PB8/TIM4_CH3/TIM16_CH1/CEC 45 -1500 -650 150 R 40 40 1 1 B -X SPI1_MISO/ADC1_IN6/TIM3_CH1/PA6 16 1500 650 150 L 40 40 1 1 B -X PB13/SPI2_SCK/TIM1_CH1N/USART3_CTS 26 -1500 -1150 150 R 40 40 1 1 B -X VDD 36 -150 1750 150 D 40 40 1 1 W -X PB9/TIM4_CH4/TIM17_CH1 46 -1500 -750 150 R 40 40 1 1 B -X SPI1_MOSI/ADC1_IN7/TIM3_CH2/PA7 17 1500 550 150 L 40 40 1 1 B -X PB14/SPI2_MISO/TIM1_CH2N/USART3_RTS 27 -1500 -1250 150 R 40 40 1 1 B -X JTCK/SWCLK/PA14 37 1500 -150 150 L 40 40 1 1 B -X VSS 47 0 -1750 150 U 40 40 1 1 W -X PB0/ADC1_IN8/TIM3_CH3 18 -1500 150 150 R 40 40 1 1 B -X PB15/SPI2_MOSI/TIM1_CH3N/TIM15_CH1N 28 -1500 -1350 150 R 40 40 1 1 B -X JTDI/PA15 38 1500 -250 150 L 40 40 1 1 B -X VDD 48 0 1750 150 D 40 40 1 1 W -X PB1/ADC1_IN9/TIM3_CH4 19 -1500 50 150 R 40 40 1 1 B -X USART1_CK/MCO/TIM1_CH1/PA8 29 1500 450 150 L 40 40 1 1 B -X PB3/JTDO 39 -1500 -150 150 R 40 40 1 1 B ENDDRAW ENDDEF # # STM32F100R4 # DEF STM32F100R4 U 0 40 Y Y 1 F N -F0 "U" -1300 1950 60 H V C CNN -F1 "STM32F100R4" 1050 -1900 60 H V C CNN -F2 "LQFP64" 0 0 40 H V C CIN -F3 "~" 0 0 60 H V C CNN +F0 "U" -1300 2000 50 H V C CNN +F1 "STM32F100R4" 1050 -1900 50 H V C CNN +F2 "LQFP64" 0 0 50 H V C CIN +F3 "" 0 0 50 H V C CNN ALIAS STM32F100R6 DRAW -S -1350 1900 1350 -1850 0 1 10 f -X VBAT 1 -1500 550 150 R 40 40 1 1 W -X PC13/TAMPER_RTC 2 -1500 -1400 150 R 40 40 1 1 B -X PC14/OSC32_IN 3 -1500 -1500 150 R 40 40 1 1 B -X PC15/OSC32_OUT 4 -1500 -1600 150 R 40 40 1 1 B -X OSC_IN 5 -1500 1150 150 R 40 40 1 1 I -X OSC_OUT 6 -1500 900 150 R 40 40 1 1 O -X ~NRST 7 -1500 1600 150 R 40 40 1 1 I -X PC0/ADC1_IN10 8 -1500 -100 150 R 40 40 1 1 B -X PC1/ADC1_IN11 9 -1500 -200 150 R 40 40 1 1 B -X PC2/ADC1_IN12 10 -1500 -300 150 R 40 40 1 1 B -X SPI1_NSS/ADC1_IN4/USART2_CK/DAC1_OUT/PA4 20 1500 1200 150 L 40 40 1 1 B -X PB11 30 1500 -1200 150 L 40 40 1 1 B -X PC9 40 -1500 -1000 150 R 40 40 1 1 B -X JTDI/PA15 50 1500 100 150 L 40 40 1 1 B -X BOOT0 60 -1500 1400 150 R 40 40 1 1 I -X PC3/ADC1_IN13 11 -1500 -400 150 R 40 40 1 1 B -X SPI1_SCK/ADC1_IN5/DAC2_OUT/PA5 21 1500 1100 150 L 40 40 1 1 B -X VSS 31 -200 -2000 150 U 40 40 1 1 W -X USART1_CK/MCO/TIM1_CH1/PA8 41 1500 800 150 L 40 40 1 1 B -X PC10 51 -1500 -1100 150 R 40 40 1 1 B -X TIM4_CH3/TIM16_CH1/CEC/PB8 61 1500 -900 150 L 40 40 1 1 B -X VSSA 12 300 -2000 150 U 40 40 1 1 W -X SPI1_MISO/ADC1_IN6/TIM3_CH1/PA6 22 1500 1000 150 L 40 40 1 1 B -X VDD 32 -200 2050 150 D 40 40 1 1 W -X USART1_TX/TIM1_CH2/TIM15_BKIN/PA9 42 1500 700 150 L 40 40 1 1 B -X PC11 52 -1500 -1200 150 R 40 40 1 1 B -X TIM4_CH4/TIM17_CH1/PB9 62 1500 -1000 150 L 40 40 1 1 B -X VDDA 13 300 2050 150 D 40 40 1 1 W -X SPI1_MOSI/ADC1_IN7/TIM3_CH2/PA7 23 1500 900 150 L 40 40 1 1 B -X TIM1_BKIN/PB12 33 1500 -1300 150 L 40 40 1 1 B -X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 43 1500 600 150 L 40 40 1 1 B -X PC12 53 -1500 -1300 150 R 40 40 1 1 B -X VSS 63 0 -2000 150 U 40 40 1 1 W -X WKUP/USART2_CTS/ADC1_IN0/TIM2_CH1_ETR/PA0 14 1500 1600 150 L 40 40 1 1 B -X PC4/ADC1_IN14 24 -1500 -500 150 R 40 40 1 1 B -X TIM1_CH1N/PB13 34 1500 -1400 150 L 40 40 1 1 B -X USART1_CTS/TIM1_CH4/PA11 44 1500 500 150 L 40 40 1 1 B -X PD2/TIM3_ETR 54 -1500 100 150 R 40 40 1 1 B -X VDD 64 0 2050 150 D 40 40 1 1 W -X USART2_RTS/ADC1_IN1/TIM2_CH2/PA1 15 1500 1500 150 L 40 40 1 1 B -X PC5/ADC1_IN15 25 -1500 -600 150 R 40 40 1 1 B -X TIM1_CH2N/PB14 35 1500 -1500 150 L 40 40 1 1 B -X USART1_RTS/TIM1_ETR/PA12 45 1500 400 150 L 40 40 1 1 B -X JTDO/PB3 55 1500 -400 150 L 40 40 1 1 B -X USART2_TX/ADC1_IN2/TIM2_CH3/TIM15_CH1/PA2 16 1500 1400 150 L 40 40 1 1 B -X ADC1_IN8/TIM3_CH3/PB0 26 1500 -100 150 L 40 40 1 1 B -X TIM1_CH3N/TIM15_CH1N/PB15 36 1500 -1600 150 L 40 40 1 1 B -X JTMS/SWDIO/PA13 46 1500 300 150 L 40 40 1 1 B -X NJRST/PB4 56 1500 -500 150 L 40 40 1 1 B -X USART2_RX/ADC1_IN3/TIM2_CH4/TIM15_CH2/PA3 17 1500 1300 150 L 40 40 1 1 B -X ADC1_IN9/TIM3_CH4/PB1 27 1500 -200 150 L 40 40 1 1 B -X PC6 37 -1500 -700 150 R 40 40 1 1 B -X VSS 47 -100 -2000 150 U 40 40 1 1 W -X I2C1_SMBA/TIM16_BKIN/PB5 57 1500 -600 150 L 40 40 1 1 B -X VSS 18 -300 -2000 150 U 40 40 1 1 w -X BOOT1/PB2 28 1500 -300 150 L 40 40 1 1 B -X PC7 38 -1500 -800 150 R 40 40 1 1 B -X VDD 48 -100 2050 150 D 40 40 1 1 W -X I2C1_SCL/TIM16_CH1N/PB6 58 1500 -700 150 L 40 40 1 1 B -X VDD 19 -300 2050 150 D 40 40 1 1 W -X PB10 29 1500 -1100 150 L 40 40 1 1 B -X PC8 39 -1500 -900 150 R 40 40 1 1 B -X JTCK/SWCLK/PA14 49 1500 200 150 L 40 40 1 1 B -X I2C1_SDA/TIM17_CH1N/PB7 59 1500 -800 150 L 40 40 1 1 B +X VBAT 1 -1500 500 150 R 50 50 1 1 W +X PC13/TAMPER_RTC 2 -1500 -1400 150 R 50 50 1 1 B +X PC14/OSC32_IN 3 -1500 -1500 150 R 50 50 1 1 B +X PC15/OSC32_OUT 4 -1500 -1600 150 R 50 50 1 1 B +X OSC_IN 5 -1500 1100 150 R 50 50 1 1 I +X OSC_OUT 6 -1500 900 150 R 50 50 1 1 O +X ~NRST 7 -1500 1600 150 R 50 50 1 1 I +X PC0/ADC1_IN10 8 -1500 -100 150 R 50 50 1 1 B +X PC1/ADC1_IN11 9 -1500 -200 150 R 50 50 1 1 B +X PC2/ADC1_IN12 10 -1500 -300 150 R 50 50 1 1 B +X SPI1_NSS/ADC1_IN4/USART2_CK/DAC1_OUT/PA4 20 1500 1200 150 L 50 50 1 1 B +X PB11 30 1500 -1200 150 L 50 50 1 1 B +X PC9 40 -1500 -1000 150 R 50 50 1 1 B +X JTDI/PA15 50 1500 100 150 L 50 50 1 1 B +X BOOT0 60 -1500 1400 150 R 50 50 1 1 I +X PC3/ADC1_IN13 11 -1500 -400 150 R 50 50 1 1 B +X SPI1_SCK/ADC1_IN5/DAC2_OUT/PA5 21 1500 1100 150 L 50 50 1 1 B +X VSS 31 -200 -2000 150 U 50 50 1 1 W +X USART1_CK/MCO/TIM1_CH1/PA8 41 1500 800 150 L 50 50 1 1 B +X PC10 51 -1500 -1100 150 R 50 50 1 1 B +X TIM4_CH3/TIM16_CH1/CEC/PB8 61 1500 -900 150 L 50 50 1 1 B +X VSSA 12 300 -2000 150 U 50 50 1 1 W +X SPI1_MISO/ADC1_IN6/TIM3_CH1/PA6 22 1500 1000 150 L 50 50 1 1 B +X VDD 32 -200 2100 150 D 50 50 1 1 W +X USART1_TX/TIM1_CH2/TIM15_BKIN/PA9 42 1500 700 150 L 50 50 1 1 B +X PC11 52 -1500 -1200 150 R 50 50 1 1 B +X TIM4_CH4/TIM17_CH1/PB9 62 1500 -1000 150 L 50 50 1 1 B +X VDDA 13 300 2100 150 D 50 50 1 1 W +X SPI1_MOSI/ADC1_IN7/TIM3_CH2/PA7 23 1500 900 150 L 50 50 1 1 B +X TIM1_BKIN/PB12 33 1500 -1300 150 L 50 50 1 1 B +X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 43 1500 600 150 L 50 50 1 1 B +X PC12 53 -1500 -1300 150 R 50 50 1 1 B +X VSS 63 0 -2000 150 U 50 50 1 1 W +X WKUP/USART2_CTS/ADC1_IN0/TIM2_CH1_ETR/PA0 14 1500 1600 150 L 50 50 1 1 B +X PC4/ADC1_IN14 24 -1500 -500 150 R 50 50 1 1 B +X TIM1_CH1N/PB13 34 1500 -1400 150 L 50 50 1 1 B +X USART1_CTS/TIM1_CH4/PA11 44 1500 500 150 L 50 50 1 1 B +X PD2/TIM3_ETR 54 -1500 100 150 R 50 50 1 1 B +X VDD 64 0 2100 150 D 50 50 1 1 W +X USART2_RTS/ADC1_IN1/TIM2_CH2/PA1 15 1500 1500 150 L 50 50 1 1 B +X PC5/ADC1_IN15 25 -1500 -600 150 R 50 50 1 1 B +X TIM1_CH2N/PB14 35 1500 -1500 150 L 50 50 1 1 B +X USART1_RTS/TIM1_ETR/PA12 45 1500 400 150 L 50 50 1 1 B +X JTDO/PB3 55 1500 -400 150 L 50 50 1 1 B +X USART2_TX/ADC1_IN2/TIM2_CH3/TIM15_CH1/PA2 16 1500 1400 150 L 50 50 1 1 B +X ADC1_IN8/TIM3_CH3/PB0 26 1500 -100 150 L 50 50 1 1 B +X TIM1_CH3N/TIM15_CH1N/PB15 36 1500 -1600 150 L 50 50 1 1 B +X JTMS/SWDIO/PA13 46 1500 300 150 L 50 50 1 1 B +X NJRST/PB4 56 1500 -500 150 L 50 50 1 1 B +X USART2_RX/ADC1_IN3/TIM2_CH4/TIM15_CH2/PA3 17 1500 1300 150 L 50 50 1 1 B +X ADC1_IN9/TIM3_CH4/PB1 27 1500 -200 150 L 50 50 1 1 B +X PC6 37 -1500 -700 150 R 50 50 1 1 B +X VSS 47 -100 -2000 150 U 50 50 1 1 W +X I2C1_SMBA/TIM16_BKIN/PB5 57 1500 -600 150 L 50 50 1 1 B +X VSS 18 -300 -2000 150 U 50 50 1 1 w +X BOOT1/PB2 28 1500 -300 150 L 50 50 1 1 B +X PC7 38 -1500 -800 150 R 50 50 1 1 B +X VDD 48 -100 2100 150 D 50 50 1 1 W +X I2C1_SCL/TIM16_CH1N/PB6 58 1500 -700 150 L 50 50 1 1 B +X VDD 19 -300 2100 150 D 50 50 1 1 W +X PB10 29 1500 -1100 150 L 50 50 1 1 B +X PC8 39 -1500 -900 150 R 50 50 1 1 B +X JTCK/SWCLK/PA14 49 1500 200 150 L 50 50 1 1 B +X I2C1_SDA/TIM17_CH1N/PB7 59 1500 -800 150 L 50 50 1 1 B +S -1350 1950 1350 -1850 0 1 10 f ENDDRAW ENDDEF # # STM32F100R8 # DEF STM32F100R8 U 0 40 Y Y 1 F N -F0 "U" -1300 1950 60 H V C CNN -F1 "STM32F100R8" 1050 -1900 60 H V C CNN -F2 "LQFP64" 0 0 40 H V C CIN -F3 "~" 0 0 60 H V C CNN +F0 "U" -1300 2000 50 H V C CNN +F1 "STM32F100R8" 1050 -1900 50 H V C CNN +F2 "LQFP64" 0 0 50 H V C CIN +F3 "" 0 0 50 H V C CNN ALIAS STM32F100RB DRAW -S -1350 1900 1350 -1850 0 1 10 f -X VBAT 1 -1500 550 150 R 40 40 1 1 W -X PC13/TAMPER_RTC 2 -1500 -1400 150 R 40 40 1 1 B -X PC14/OSC32_IN 3 -1500 -1500 150 R 40 40 1 1 B -X PC15/OSC32_OUT 4 -1500 -1600 150 R 40 40 1 1 B -X OSC_IN 5 -1500 1150 150 R 40 40 1 1 I -X OSC_OUT 6 -1500 900 150 R 40 40 1 1 O -X ~NRST 7 -1500 1600 150 R 40 40 1 1 I -X PC0/ADC1_IN10 8 -1500 -100 150 R 40 40 1 1 B -X PC1/ADC1_IN11 9 -1500 -200 150 R 40 40 1 1 B -X PC2/ADC1_IN12 10 -1500 -300 150 R 40 40 1 1 B -X SPI1_NSS/ADC1_IN4/USART2_CK/DAC1_OUT/PA4 20 1500 1200 150 L 40 40 1 1 B -X I2C2_SDA/USART3_RX/PB11 30 1500 -1200 150 L 40 40 1 1 B -X PC9 40 -1500 -1000 150 R 40 40 1 1 B -X JTDI/PA15 50 1500 100 150 L 40 40 1 1 B -X BOOT0 60 -1500 1400 150 R 40 40 1 1 I -X PC3/ADC1_IN13 11 -1500 -400 150 R 40 40 1 1 B -X SPI1_SCK/ADC1_IN5/DAC2_OUT/PA5 21 1500 1100 150 L 40 40 1 1 B -X VSS 31 -200 -2000 150 U 40 40 1 1 W -X USART1_CK/MCO/TIM1_CH1/PA8 41 1500 800 150 L 40 40 1 1 B -X PC10 51 -1500 -1100 150 R 40 40 1 1 B -X TIM4_CH3/TIM16_CH1/CEC/PB8 61 1500 -900 150 L 40 40 1 1 B -X VSSA 12 300 -2000 150 U 40 40 1 1 W -X SPI1_MISO/ADC1_IN6/TIM3_CH1/PA6 22 1500 1000 150 L 40 40 1 1 B -X VDD 32 -200 2050 150 D 40 40 1 1 W -X USART1_TX/TIM1_CH2/TIM15_BKIN/PA9 42 1500 700 150 L 40 40 1 1 B -X PC11 52 -1500 -1200 150 R 40 40 1 1 B -X TIM4_CH4/TIM17_CH1/PB9 62 1500 -1000 150 L 40 40 1 1 B -X VDDA 13 300 2050 150 D 40 40 1 1 W -X SPI1_MOSI/ADC1_IN7/TIM3_CH2/PA7 23 1500 900 150 L 40 40 1 1 B -X SPI2_NSS/_I2C2_SMBA/TIM1_BKIN/USART3_CK/PB12 33 1500 -1300 150 L 40 40 1 1 B -X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 43 1500 600 150 L 40 40 1 1 B -X PC12 53 -1500 -1300 150 R 40 40 1 1 B -X VSS 63 0 -2000 150 U 40 40 1 1 W -X WKUP/USART2_CTS/ADC1_IN0/TIM2_CH1_ETR/PA0 14 1500 1600 150 L 40 40 1 1 B -X PC4/ADC1_IN14 24 -1500 -500 150 R 40 40 1 1 B -X SPI2_SCK/TIM1_CH1N/USART3_CTS/PB13 34 1500 -1400 150 L 40 40 1 1 B -X USART1_CTS/TIM1_CH4/PA11 44 1500 500 150 L 40 40 1 1 B -X PD2/TIM3_ETR 54 -1500 100 150 R 40 40 1 1 B -X VDD 64 0 2050 150 D 40 40 1 1 W -X USART2_RTS/ADC1_IN1/TIM2_CH2/PA1 15 1500 1500 150 L 40 40 1 1 B -X PC5/ADC1_IN15 25 -1500 -600 150 R 40 40 1 1 B -X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 35 1500 -1500 150 L 40 40 1 1 B -X USART1_RTS/TIM1_ETR/PA12 45 1500 400 150 L 40 40 1 1 B -X JTDO/PB3 55 1500 -400 150 L 40 40 1 1 B -X USART2_TX/ADC1_IN2/TIM2_CH3/TIM15_CH1/PA2 16 1500 1400 150 L 40 40 1 1 B -X ADC1_IN8/TIM3_CH3/PB0 26 1500 -100 150 L 40 40 1 1 B -X SPI2_MOSI/TIM1_CH3N/TIM15_CH1N/PB15 36 1500 -1600 150 L 40 40 1 1 B -X JTMS/SWDIO/PA13 46 1500 300 150 L 40 40 1 1 B -X NJRST/PB4 56 1500 -500 150 L 40 40 1 1 B -X USART2_RX/ADC1_IN3/TIM2_CH4/TIM15_CH2/PA3 17 1500 1300 150 L 40 40 1 1 B -X ADC1_IN9/TIM3_CH4/PB1 27 1500 -200 150 L 40 40 1 1 B -X PC6 37 -1500 -700 150 R 40 40 1 1 B -X VSS 47 -100 -2000 150 U 40 40 1 1 W -X I2C1_SMBA/TIM16_BKIN/PB5 57 1500 -600 150 L 40 40 1 1 B -X VSS 18 -300 -2000 150 U 40 40 1 1 w -X BOOT1/PB2 28 1500 -300 150 L 40 40 1 1 B -X PC7 38 -1500 -800 150 R 40 40 1 1 B -X VDD 48 -100 2050 150 D 40 40 1 1 W -X I2C1_SCL/TIM4_CH1/TIM16_CH1N/PB6 58 1500 -700 150 L 40 40 1 1 B -X VDD 19 -300 2050 150 D 40 40 1 1 W -X I2C2_SCL/USART3_TX/PB10 29 1500 -1100 150 L 40 40 1 1 B -X PC8 39 -1500 -900 150 R 40 40 1 1 B -X JTCK/SWCLK/PA14 49 1500 200 150 L 40 40 1 1 B -X I2C1_SDA/TIM4_CH2/TIM17_CH1N/PB7 59 1500 -800 150 L 40 40 1 1 B +X VBAT 1 -1500 500 150 R 50 50 1 1 W +X PC13/TAMPER_RTC 2 -1500 -1400 150 R 50 50 1 1 B +X PC14/OSC32_IN 3 -1500 -1500 150 R 50 50 1 1 B +X PC15/OSC32_OUT 4 -1500 -1600 150 R 50 50 1 1 B +X OSC_IN 5 -1500 1100 150 R 50 50 1 1 I +X OSC_OUT 6 -1500 900 150 R 50 50 1 1 O +X ~NRST 7 -1500 1600 150 R 50 50 1 1 I +X PC0/ADC1_IN10 8 -1500 -100 150 R 50 50 1 1 B +X PC1/ADC1_IN11 9 -1500 -200 150 R 50 50 1 1 B +X PC2/ADC1_IN12 10 -1500 -300 150 R 50 50 1 1 B +X SPI1_NSS/ADC1_IN4/USART2_CK/DAC1_OUT/PA4 20 1500 1200 150 L 50 50 1 1 B +X I2C2_SDA/USART3_RX/PB11 30 1500 -1200 150 L 50 50 1 1 B +X PC9 40 -1500 -1000 150 R 50 50 1 1 B +X JTDI/PA15 50 1500 100 150 L 50 50 1 1 B +X BOOT0 60 -1500 1400 150 R 50 50 1 1 I +X PC3/ADC1_IN13 11 -1500 -400 150 R 50 50 1 1 B +X SPI1_SCK/ADC1_IN5/DAC2_OUT/PA5 21 1500 1100 150 L 50 50 1 1 B +X VSS 31 -200 -2000 150 U 50 50 1 1 W +X USART1_CK/MCO/TIM1_CH1/PA8 41 1500 800 150 L 50 50 1 1 B +X PC10 51 -1500 -1100 150 R 50 50 1 1 B +X TIM4_CH3/TIM16_CH1/CEC/PB8 61 1500 -900 150 L 50 50 1 1 B +X VSSA 12 300 -2000 150 U 50 50 1 1 W +X SPI1_MISO/ADC1_IN6/TIM3_CH1/PA6 22 1500 1000 150 L 50 50 1 1 B +X VDD 32 -200 2100 150 D 50 50 1 1 W +X USART1_TX/TIM1_CH2/TIM15_BKIN/PA9 42 1500 700 150 L 50 50 1 1 B +X PC11 52 -1500 -1200 150 R 50 50 1 1 B +X TIM4_CH4/TIM17_CH1/PB9 62 1500 -1000 150 L 50 50 1 1 B +X VDDA 13 300 2100 150 D 50 50 1 1 W +X SPI1_MOSI/ADC1_IN7/TIM3_CH2/PA7 23 1500 900 150 L 50 50 1 1 B +X SPI2_NSS/_I2C2_SMBA/TIM1_BKIN/USART3_CK/PB12 33 1500 -1300 150 L 50 50 1 1 B +X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 43 1500 600 150 L 50 50 1 1 B +X PC12 53 -1500 -1300 150 R 50 50 1 1 B +X VSS 63 0 -2000 150 U 50 50 1 1 W +X WKUP/USART2_CTS/ADC1_IN0/TIM2_CH1_ETR/PA0 14 1500 1600 150 L 50 50 1 1 B +X PC4/ADC1_IN14 24 -1500 -500 150 R 50 50 1 1 B +X SPI2_SCK/TIM1_CH1N/USART3_CTS/PB13 34 1500 -1400 150 L 50 50 1 1 B +X USART1_CTS/TIM1_CH4/PA11 44 1500 500 150 L 50 50 1 1 B +X PD2/TIM3_ETR 54 -1500 100 150 R 50 50 1 1 B +X VDD 64 0 2100 150 D 50 50 1 1 W +X USART2_RTS/ADC1_IN1/TIM2_CH2/PA1 15 1500 1500 150 L 50 50 1 1 B +X PC5/ADC1_IN15 25 -1500 -600 150 R 50 50 1 1 B +X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 35 1500 -1500 150 L 50 50 1 1 B +X USART1_RTS/TIM1_ETR/PA12 45 1500 400 150 L 50 50 1 1 B +X JTDO/PB3 55 1500 -400 150 L 50 50 1 1 B +X USART2_TX/ADC1_IN2/TIM2_CH3/TIM15_CH1/PA2 16 1500 1400 150 L 50 50 1 1 B +X ADC1_IN8/TIM3_CH3/PB0 26 1500 -100 150 L 50 50 1 1 B +X SPI2_MOSI/TIM1_CH3N/TIM15_CH1N/PB15 36 1500 -1600 150 L 50 50 1 1 B +X JTMS/SWDIO/PA13 46 1500 300 150 L 50 50 1 1 B +X NJRST/PB4 56 1500 -500 150 L 50 50 1 1 B +X USART2_RX/ADC1_IN3/TIM2_CH4/TIM15_CH2/PA3 17 1500 1300 150 L 50 50 1 1 B +X ADC1_IN9/TIM3_CH4/PB1 27 1500 -200 150 L 50 50 1 1 B +X PC6 37 -1500 -700 150 R 50 50 1 1 B +X VSS 47 -100 -2000 150 U 50 50 1 1 W +X I2C1_SMBA/TIM16_BKIN/PB5 57 1500 -600 150 L 50 50 1 1 B +X VSS 18 -300 -2000 150 U 50 50 1 1 w +X BOOT1/PB2 28 1500 -300 150 L 50 50 1 1 B +X PC7 38 -1500 -800 150 R 50 50 1 1 B +X VDD 48 -100 2100 150 D 50 50 1 1 W +X I2C1_SCL/TIM4_CH1/TIM16_CH1N/PB6 58 1500 -700 150 L 50 50 1 1 B +X VDD 19 -300 2100 150 D 50 50 1 1 W +X I2C2_SCL/USART3_TX/PB10 29 1500 -1100 150 L 50 50 1 1 B +X PC8 39 -1500 -900 150 R 50 50 1 1 B +X JTCK/SWCLK/PA14 49 1500 200 150 L 50 50 1 1 B +X I2C1_SDA/TIM4_CH2/TIM17_CH1N/PB7 59 1500 -800 150 L 50 50 1 1 B +S -1350 1950 1350 -1850 0 1 10 f ENDDRAW ENDDEF # # STM32F100V8 # DEF STM32F100V8 U 0 40 Y Y 1 F N -F0 "U" -1300 2800 60 H V C CNN -F1 "STM32F100V8" 1050 -2800 60 H V C CNN -F2 "LQFP100" 0 0 40 H V C CIN -F3 "~" 0 0 60 H V C CNN +F0 "U" -1300 2800 50 H V C CNN +F1 "STM32F100V8" 1050 -2800 50 H V C CNN +F2 "LQFP100" 0 0 50 H V C CIN +F3 "" 0 0 50 H V C CNN ALIAS STM32F100VB DRAW +X PE2/TRACECLK 1 -1500 500 150 R 50 50 1 1 B +X PE3/TRACED0 2 -1500 400 150 R 50 50 1 1 B +X PE4/TRACED1 3 -1500 300 150 R 50 50 1 1 B +X PE5/TRACED2 4 -1500 200 150 R 50 50 1 1 B +X PE6/TRACED3 5 -1500 100 150 R 50 50 1 1 B +X VBAT 6 -1500 1400 150 R 50 50 1 1 W +X TAMPER_RTC/PC13 7 1500 -2300 150 L 50 50 1 1 B +X OSC32_IN/PC14 8 1500 -2400 150 L 50 50 1 1 B +X OSC32_OUT/PC15 9 1500 -2500 150 L 50 50 1 1 B +X VSS 10 -400 -2900 150 U 50 50 1 1 W +X VREF- 20 -1500 900 150 R 50 50 1 1 I +X SPI1_SCK/ADC1_IN5/DAC2_OUT/PA5 30 1500 1900 150 L 50 50 1 1 B +X PE9 40 -1500 -200 150 R 50 50 1 1 B +X VDD 50 -200 2900 150 D 50 50 1 1 W +X PD13 60 -1500 -2300 150 R 50 50 1 1 B +X USART1_CTS/TIM1_CH4/PA11 70 1500 1300 150 L 50 50 1 1 B +X PC12 80 1500 -2200 150 L 50 50 1 1 B +X NJRST/PB4 90 1500 300 150 L 50 50 1 1 B +X VDD 11 -400 2900 150 D 50 50 1 1 W +X VREF+ 21 -1500 1100 150 R 50 50 1 1 I +X SPI1_MISO/ADC1_IN6/TIM3_CH1/PA6 31 1500 1800 150 L 50 50 1 1 B +X PE10 41 -1500 -300 150 R 50 50 1 1 B +X SPI2_NSS/_I2C2_SMBA/TIM1_BKIN/USART3_CK/PB12 51 1500 -500 150 L 50 50 1 1 B +X PD14 61 -1500 -2400 150 R 50 50 1 1 B +X USART1_RTS/TIM1_ETR/PA12 71 1500 1200 150 L 50 50 1 1 B +X PD0 81 -1500 -1000 150 R 50 50 1 1 B +X I2C1_SMBA/TIM16_BKIN/PB5 91 1500 200 150 L 50 50 1 1 B +X OSC_IN 12 -1500 2000 150 R 50 50 1 1 I +X VDDA 22 300 2900 150 D 50 50 1 1 W +X SPI1_MOSI/ADC1_IN7/TIM3_CH2/PA7 32 1500 1700 150 L 50 50 1 1 B +X PE11 42 -1500 -400 150 R 50 50 1 1 B +X SPI2_SCK/TIM1_CH1N/USART3_CTS/PB13 52 1500 -600 150 L 50 50 1 1 B +X PD15 62 -1500 -2500 150 R 50 50 1 1 B +X JTMS/SWDIO/PA13 72 1500 1100 150 L 50 50 1 1 B +X PD1 82 -1500 -1100 150 R 50 50 1 1 B +X I2C1_SCL/TIM4_CH1/TIM16_CH1N/PB6 92 1500 100 150 L 50 50 1 1 B +X OSC_OUT 13 -1500 1700 150 R 50 50 1 1 O +X WKUP/USART2_CTS/ADC1_IN0/TIM2_CH1_ETR/PA0 23 1500 2400 150 L 50 50 1 1 B +X ADC1_IN14/PC4 33 1500 -1400 150 L 50 50 1 1 B +X PE12 43 -1500 -500 150 R 50 50 1 1 B +X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 53 1500 -700 150 L 50 50 1 1 B +X PC6 63 1500 -1600 150 L 50 50 1 1 B +X PD2/TIM3_ETR 83 -1500 -1200 150 R 50 50 1 1 B +X I2C1_SDA/TIM4_CH2/TIM17_CH1N/PB7 93 1500 0 150 L 50 50 1 1 B +X ~NRST 14 -1500 2400 150 R 50 50 1 1 I +X USART2_RTS/ADC1_IN1/TIM2_CH2/PA1 24 1500 2300 150 L 50 50 1 1 B +X ADC1_IN15/PC5 34 1500 -1500 150 L 50 50 1 1 B +X PE13 44 -1500 -600 150 R 50 50 1 1 B +X SPI2_MOSI/TIM1_CH3N/TIM15_CH1N/PB15 54 1500 -800 150 L 50 50 1 1 B +X PC7 64 1500 -1700 150 L 50 50 1 1 B +X VSS 74 -100 -2900 150 U 50 50 1 1 W +X PD3 84 -1500 -1300 150 R 50 50 1 1 B +X BOOT0 94 -1500 2200 150 R 50 50 1 1 I +X ADC1_IN10/PC0 15 1500 -1000 150 L 50 50 1 1 B +X USART2_TX/ADC1_IN2/TIM2_CH3/TIM15_CH1/PA2 25 1500 2200 150 L 50 50 1 1 B +X ADC1_IN8/TIM3_CH3/PB0 35 1500 700 150 L 50 50 1 1 B +X PE14 45 -1500 -700 150 R 50 50 1 1 B +X PD8 55 -1500 -1800 150 R 50 50 1 1 B +X PC8 65 1500 -1800 150 L 50 50 1 1 B +X VDD 75 -100 2900 150 D 50 50 1 1 W +X PD4 85 -1500 -1400 150 R 50 50 1 1 B +X TIM4_CH3/TIM16_CH1/CEC/PB8 95 1500 -100 150 L 50 50 1 1 B +X ADC1_IN11/PC1 16 1500 -1100 150 L 50 50 1 1 B +X USART2_RX/ADC1_IN3/TIM2_CH4/TIM15_CH2/PA3 26 1500 2100 150 L 50 50 1 1 B +X ADC1_IN9/TIM3_CH4/PB1 36 1500 600 150 L 50 50 1 1 B +X PE15 46 -1500 -800 150 R 50 50 1 1 B +X PD9 56 -1500 -1900 150 R 50 50 1 1 B +X PC9 66 1500 -1900 150 L 50 50 1 1 B +X JTCK/SWCLK/PA14 76 1500 1000 150 L 50 50 1 1 B +X PD5 86 -1500 -1500 150 R 50 50 1 1 B +X TIM4_CH4/TIM17_CH1/PB9 96 1500 -200 150 L 50 50 1 1 B +X ADC1_IN12/PC2 17 1500 -1200 150 L 50 50 1 1 B +X VSS 27 -300 -2900 150 U 50 50 1 1 W +X BOOT1/PB2 37 1500 500 150 L 50 50 1 1 B +X I2C2_SCL/USART3_TX/PB10 47 1500 -300 150 L 50 50 1 1 B +X PD10 57 -1500 -2000 150 R 50 50 1 1 B +X USART1_CK/MCO/TIM1_CH1/PA8 67 1500 1600 150 L 50 50 1 1 B +X JTDI/PA15 77 1500 900 150 L 50 50 1 1 B +X PD6 87 -1500 -1600 150 R 50 50 1 1 B +X PE0/TIM4_ETR 97 -1500 700 150 R 50 50 1 1 B +X ADC1_IN13/PC3 18 1500 -1300 150 L 50 50 1 1 B +X VDD 28 -300 2900 150 D 50 50 1 1 W +X PE7 38 -1500 0 150 R 50 50 1 1 B +X I2C2_SDA/USART3_RX/PB11 48 1500 -400 150 L 50 50 1 1 B +X PD11 58 -1500 -2100 150 R 50 50 1 1 B +X USART1_TX/TIM1_CH2/TIM15_BKIN/PA9 68 1500 1500 150 L 50 50 1 1 B +X PC10 78 1500 -2000 150 L 50 50 1 1 B +X PD7 88 -1500 -1700 150 R 50 50 1 1 B +X PE1 98 -1500 600 150 R 50 50 1 1 B +X VSSA 19 300 -2900 150 U 50 50 1 1 W +X SPI1_NSS/ADC1_IN4/USART2_CK/DAC1_OUT/PA4 29 1500 2000 150 L 50 50 1 1 B +X PE8 39 -1500 -100 150 R 50 50 1 1 B +X VSS 49 -200 -2900 150 U 50 50 1 1 w +X PD12 59 -1500 -2200 150 R 50 50 1 1 B +X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 69 1500 1400 150 L 50 50 1 1 B +X PC11 79 1500 -2100 150 L 50 50 1 1 B +X JTDO/PB3 89 1500 400 150 L 50 50 1 1 B +X VSS 99 0 -2900 150 U 50 50 1 1 W +X VDD 100 0 2900 150 D 50 50 1 1 W S -1350 2750 1350 -2750 0 1 10 f -X PE2/TRACECLK 1 -1500 550 150 R 40 40 1 1 B -X PE3/TRACED0 2 -1500 450 150 R 40 40 1 1 B -X PE4/TRACED1 3 -1500 350 150 R 40 40 1 1 B -X PE5/TRACED2 4 -1500 250 150 R 40 40 1 1 B -X PE6/TRACED3 5 -1500 150 150 R 40 40 1 1 B -X VBAT 6 -1500 1450 150 R 40 40 1 1 W -X TAMPER_RTC/PC13 7 1500 -2250 150 L 40 40 1 1 B -X OSC32_IN/PC14 8 1500 -2350 150 L 40 40 1 1 B -X OSC32_OUT/PC15 9 1500 -2450 150 L 40 40 1 1 B -X VSS 10 -400 -2900 150 U 40 40 1 1 W -X VREF- 20 -1500 950 150 R 40 40 1 1 I -X SPI1_SCK/ADC1_IN5/DAC2_OUT/PA5 30 1500 1950 150 L 40 40 1 1 B -X PE9 40 -1500 -150 150 R 40 40 1 1 B -X VDD 50 -200 2900 150 D 40 40 1 1 W -X PD13 60 -1500 -2250 150 R 40 40 1 1 B -X USART1_CTS/TIM1_CH4/PA11 70 1500 1350 150 L 40 40 1 1 B -X PC12 80 1500 -2150 150 L 40 40 1 1 B -X NJRST/PB4 90 1500 350 150 L 40 40 1 1 B -X VDD 11 -400 2900 150 D 40 40 1 1 W -X VREF+ 21 -1500 1150 150 R 40 40 1 1 I -X SPI1_MISO/ADC1_IN6/TIM3_CH1/PA6 31 1500 1850 150 L 40 40 1 1 B -X PE10 41 -1500 -250 150 R 40 40 1 1 B -X SPI2_NSS/_I2C2_SMBA/TIM1_BKIN/USART3_CK/PB12 51 1500 -450 150 L 40 40 1 1 B -X PD14 61 -1500 -2350 150 R 40 40 1 1 B -X USART1_RTS/TIM1_ETR/PA12 71 1500 1250 150 L 40 40 1 1 B -X PD0 81 -1500 -950 150 R 40 40 1 1 B -X I2C1_SMBA/TIM16_BKIN/PB5 91 1500 250 150 L 40 40 1 1 B -X OSC_IN 12 -1500 2000 150 R 40 40 1 1 I -X VDDA 22 300 2900 150 D 40 40 1 1 W -X SPI1_MOSI/ADC1_IN7/TIM3_CH2/PA7 32 1500 1750 150 L 40 40 1 1 B -X PE11 42 -1500 -350 150 R 40 40 1 1 B -X SPI2_SCK/TIM1_CH1N/USART3_CTS/PB13 52 1500 -550 150 L 40 40 1 1 B -X PD15 62 -1500 -2450 150 R 40 40 1 1 B -X JTMS/SWDIO/PA13 72 1500 1150 150 L 40 40 1 1 B -X PD1 82 -1500 -1050 150 R 40 40 1 1 B -X I2C1_SCL/TIM4_CH1/TIM16_CH1N/PB6 92 1500 150 150 L 40 40 1 1 B -X OSC_OUT 13 -1500 1750 150 R 40 40 1 1 O -X WKUP/USART2_CTS/ADC1_IN0/TIM2_CH1_ETR/PA0 23 1500 2450 150 L 40 40 1 1 B -X ADC1_IN14/PC4 33 1500 -1350 150 L 40 40 1 1 B -X PE12 43 -1500 -450 150 R 40 40 1 1 B -X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 53 1500 -650 150 L 40 40 1 1 B -X PC6 63 1500 -1550 150 L 40 40 1 1 B -X PD2/TIM3_ETR 83 -1500 -1150 150 R 40 40 1 1 B -X I2C1_SDA/TIM4_CH2/TIM17_CH1N/PB7 93 1500 50 150 L 40 40 1 1 B -X ~NRST 14 -1500 2450 150 R 40 40 1 1 I -X USART2_RTS/ADC1_IN1/TIM2_CH2/PA1 24 1500 2350 150 L 40 40 1 1 B -X ADC1_IN15/PC5 34 1500 -1450 150 L 40 40 1 1 B -X PE13 44 -1500 -550 150 R 40 40 1 1 B -X SPI2_MOSI/TIM1_CH3N/TIM15_CH1N/PB15 54 1500 -750 150 L 40 40 1 1 B -X PC7 64 1500 -1650 150 L 40 40 1 1 B -X VSS 74 -100 -2900 150 U 40 40 1 1 W -X PD3 84 -1500 -1250 150 R 40 40 1 1 B -X BOOT0 94 -1500 2250 150 R 40 40 1 1 I -X ADC1_IN10/PC0 15 1500 -950 150 L 40 40 1 1 B -X USART2_TX/ADC1_IN2/TIM2_CH3/TIM15_CH1/PA2 25 1500 2250 150 L 40 40 1 1 B -X ADC1_IN8/TIM3_CH3/PB0 35 1500 750 150 L 40 40 1 1 B -X PE14 45 -1500 -650 150 R 40 40 1 1 B -X PD8 55 -1500 -1750 150 R 40 40 1 1 B -X PC8 65 1500 -1750 150 L 40 40 1 1 B -X VDD 75 -100 2900 150 D 40 40 1 1 W -X PD4 85 -1500 -1350 150 R 40 40 1 1 B -X TIM4_CH3/TIM16_CH1/CEC/PB8 95 1500 -50 150 L 40 40 1 1 B -X ADC1_IN11/PC1 16 1500 -1050 150 L 40 40 1 1 B -X USART2_RX/ADC1_IN3/TIM2_CH4/TIM15_CH2/PA3 26 1500 2150 150 L 40 40 1 1 B -X ADC1_IN9/TIM3_CH4/PB1 36 1500 650 150 L 40 40 1 1 B -X PE15 46 -1500 -750 150 R 40 40 1 1 B -X PD9 56 -1500 -1850 150 R 40 40 1 1 B -X PC9 66 1500 -1850 150 L 40 40 1 1 B -X JTCK/SWCLK/PA14 76 1500 1050 150 L 40 40 1 1 B -X PD5 86 -1500 -1450 150 R 40 40 1 1 B -X TIM4_CH4/TIM17_CH1/PB9 96 1500 -150 150 L 40 40 1 1 B -X ADC1_IN12/PC2 17 1500 -1150 150 L 40 40 1 1 B -X VSS 27 -300 -2900 150 U 40 40 1 1 W -X BOOT1/PB2 37 1500 550 150 L 40 40 1 1 B -X I2C2_SCL/USART3_TX/PB10 47 1500 -250 150 L 40 40 1 1 B -X PD10 57 -1500 -1950 150 R 40 40 1 1 B -X USART1_CK/MCO/TIM1_CH1/PA8 67 1500 1650 150 L 40 40 1 1 B -X JTDI/PA15 77 1500 950 150 L 40 40 1 1 B -X PD6 87 -1500 -1550 150 R 40 40 1 1 B -X PE0/TIM4_ETR 97 -1500 750 150 R 40 40 1 1 B -X ADC1_IN13/PC3 18 1500 -1250 150 L 40 40 1 1 B -X VDD 28 -300 2900 150 D 40 40 1 1 W -X PE7 38 -1500 50 150 R 40 40 1 1 B -X I2C2_SDA/USART3_RX/PB11 48 1500 -350 150 L 40 40 1 1 B -X PD11 58 -1500 -2050 150 R 40 40 1 1 B -X USART1_TX/TIM1_CH2/TIM15_BKIN/PA9 68 1500 1550 150 L 40 40 1 1 B -X PC10 78 1500 -1950 150 L 40 40 1 1 B -X PD7 88 -1500 -1650 150 R 40 40 1 1 B -X PE1 98 -1500 650 150 R 40 40 1 1 B -X VSSA 19 300 -2900 150 U 40 40 1 1 W -X SPI1_NSS/ADC1_IN4/USART2_CK/DAC1_OUT/PA4 29 1500 2050 150 L 40 40 1 1 B -X PE8 39 -1500 -50 150 R 40 40 1 1 B -X VSS 49 -200 -2900 150 U 40 40 1 1 w -X PD12 59 -1500 -2150 150 R 40 40 1 1 B -X USART1_RX/TIM1_CH3/TIM17_BKIN/PA10 69 1500 1450 150 L 40 40 1 1 B -X PC11 79 1500 -2050 150 L 40 40 1 1 B -X JTDO/PB3 89 1500 450 150 L 40 40 1 1 B -X VSS 99 0 -2900 150 U 40 40 1 1 W -X VDD 100 0 2900 150 D 40 40 1 1 W ENDDRAW ENDDEF # @@ -545,58 +545,58 @@ DEF STM32F103C4 U 0 40 Y Y 1 F N F0 "U" -1300 1650 50 H V C CNN F1 "STM32F103C4" 1050 -1650 50 H V C CNN F2 "LQFP48" 0 0 50 H V C CNN -F3 "~" 0 0 60 H V C CNN +F3 "" 0 0 50 H V C CNN ALIAS STM32F103C6 DRAW +X VBAT 1 -1500 700 150 R 50 50 1 1 W +X PC13/TAMPER_RTC 2 -1500 500 150 R 50 50 1 1 B +X PC14/OSC32_IN 3 -1500 400 150 R 50 50 1 1 B +X PC15/OSC32_OUT 4 -1500 300 150 R 50 50 1 1 B +X PD0/OSC_IN 5 -1500 1000 150 R 50 50 1 1 B +X PD1/OSC_OUT 6 -1500 900 150 R 50 50 1 1 B +X ~NRST 7 -1500 1400 150 R 50 50 1 1 I +X VSSA 8 300 -1700 100 U 50 50 1 1 W +X VDDA 9 300 1700 100 D 50 50 1 1 W +X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/PA0 10 1500 1300 150 L 50 50 1 1 B +X PB2/BOOT1 20 -1500 -100 150 R 50 50 1 1 B +X USART1_TX/TIM1_CH2/PA9 30 1500 400 150 L 50 50 1 1 B +X PB4/NJTRST 40 -1500 -300 150 R 50 50 1 1 B +X USART2_RTS/ADC12_IN1/TIM2_CH2/PA1 11 1500 1200 150 L 50 50 1 1 B +X PB10 21 -1500 -900 150 R 50 50 1 1 B +X USART1_RX/TIM1_CH3/PA10 31 1500 300 150 L 50 50 1 1 B +X PB5/I2C1_SMBA 41 -1500 -400 150 R 50 50 1 1 B +X USART2_TX/ADC12_IN2/TIM2_CH3/PA2 12 1500 1100 150 L 50 50 1 1 B +X PB11 22 -1500 -1000 150 R 50 50 1 1 B +X USART1_CTS/CAN_RX/TIM1_CH4/USBDM/PA11 32 1500 200 150 L 50 50 1 1 B +X PB6/I2C1_SCL 42 -1500 -500 150 R 50 50 1 1 B +X USART2_RX/ADC12_IN3/TIM2_CH4/PA3 13 1500 1000 150 L 50 50 1 1 B +X VSS 23 -300 -1700 100 U 50 50 1 1 W +X USART1_RTS/CAN_TX/TIM1_ETR/USBDP/PA12 33 1500 100 150 L 50 50 1 1 B +X PB7/I2C1_SDA 43 -1500 -600 150 R 50 50 1 1 B +X SPI1_NSS/USART2_CK/ADC12_IN4/PA4 14 1500 900 150 L 50 50 1 1 B +X VDD 24 -300 1700 100 D 50 50 1 1 W +X JTMS/SWDIO/PA13 34 1500 0 150 L 50 50 1 1 B +X BOOT0 44 -1500 1200 150 R 50 50 1 1 I +X SPI1_SCK/ADC12_IN5/PA5 15 1500 800 150 L 50 50 1 1 B +X PB12/TIM1_BKIN 25 -1500 -1100 150 R 50 50 1 1 B +X VSS 35 -200 -1700 100 U 50 50 1 1 W +X PB8 45 -1500 -700 150 R 50 50 1 1 B +X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 16 1500 700 150 L 50 50 1 1 B +X PB13/TIM1_CH1N 26 -1500 -1200 150 R 50 50 1 1 B +X VDD 36 -200 1700 100 D 50 50 1 1 W +X PB9 46 -1500 -800 150 R 50 50 1 1 B +X SPI1_MOSI/ADC12_IN7/TIM3_CH2/PA7 17 1500 600 150 L 50 50 1 1 B +X PB14/TIM1_CH2N 27 -1500 -1300 150 R 50 50 1 1 B +X JTCK/SWCLK/PA14 37 1500 -100 150 L 50 50 1 1 B +X VSS 47 0 -1700 100 U 50 50 1 1 W +X PB0/ADC12_IN8/TIM3_CH3 18 -1500 100 150 R 50 50 1 1 B +X PB15/TIM1_CH3N 28 -1500 -1400 150 R 50 50 1 1 B +X JTDI/PA15 38 1500 -200 150 L 50 50 1 1 B +X VDD 48 0 1700 100 D 50 50 1 1 W +X PB1/ADC12_IN9/TIM3_CH4 19 -1500 0 150 R 50 50 1 1 B +X USART1_CK/TIM1_CH1/MCO/PA8 29 1500 500 150 L 50 50 1 1 B +X PB3/JTDO 39 -1500 -200 150 R 50 50 1 1 B S -1350 1600 1350 -1600 0 1 10 f -X VBAT 1 -1500 700 150 R 40 40 1 1 W -X PC13/TAMPER_RTC 2 -1500 500 150 R 40 40 1 1 B -X PC14/OSC32_IN 3 -1500 400 150 R 40 40 1 1 B -X PC15/OSC32_OUT 4 -1500 300 150 R 40 40 1 1 B -X PD0/OSC_IN 5 -1500 1050 150 R 40 40 1 1 B -X PD1/OSC_OUT 6 -1500 900 150 R 40 40 1 1 B -X ~NRST 7 -1500 1400 150 R 40 40 1 1 I -X VSSA 8 300 -1750 150 U 40 40 1 1 W -X VDDA 9 300 1750 150 D 40 40 1 1 W -X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/PA0 10 1500 1300 150 L 40 40 1 1 B -X PB2/BOOT1 20 -1500 -50 150 R 40 40 1 1 B -X USART1_TX/TIM1_CH2/PA9 30 1500 400 150 L 40 40 1 1 B -X PB4/NJTRST 40 -1500 -250 150 R 40 40 1 1 B -X USART2_RTS/ADC12_IN1/TIM2_CH2/PA1 11 1500 1200 150 L 40 40 1 1 B -X PB10 21 -1500 -850 150 R 40 40 1 1 B -X USART1_RX/TIM1_CH3/PA10 31 1500 300 150 L 40 40 1 1 B -X PB5/I2C1_SMBA 41 -1500 -350 150 R 40 40 1 1 B -X USART2_TX/ADC12_IN2/TIM2_CH3/PA2 12 1500 1100 150 L 40 40 1 1 B -X PB11 22 -1500 -950 150 R 40 40 1 1 B -X USART1_CTS/CAN_RX/TIM1_CH4/USBDM/PA11 32 1500 200 150 L 40 40 1 1 B -X PB6/I2C1_SCL 42 -1500 -450 150 R 40 40 1 1 B -X USART2_RX/ADC12_IN3/TIM2_CH4/PA3 13 1500 1000 150 L 40 40 1 1 B -X VSS 23 -300 -1750 150 U 40 40 1 1 W -X USART1_RTS/CAN_TX/TIM1_ETR/USBDP/PA12 33 1500 100 150 L 40 40 1 1 B -X PB7/I2C1_SDA 43 -1500 -550 150 R 40 40 1 1 B -X SPI1_NSS/USART2_CK/ADC12_IN4/PA4 14 1500 900 150 L 40 40 1 1 B -X VDD 24 -300 1750 150 D 40 40 1 1 W -X JTMS/SWDIO/PA13 34 1500 0 150 L 40 40 1 1 B -X BOOT0 44 -1500 1250 150 R 40 40 1 1 I -X SPI1_SCK/ADC12_IN5/PA5 15 1500 800 150 L 40 40 1 1 B -X PB12/TIM1_BKIN 25 -1500 -1050 150 R 40 40 1 1 B -X VSS 35 -150 -1750 150 U 40 40 1 1 W -X PB8 45 -1500 -650 150 R 40 40 1 1 B -X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 16 1500 700 150 L 40 40 1 1 B -X PB13/TIM1_CH1N 26 -1500 -1150 150 R 40 40 1 1 B -X VDD 36 -150 1750 150 D 40 40 1 1 W -X PB9 46 -1500 -750 150 R 40 40 1 1 B -X SPI1_MOSI/ADC12_IN7/TIM3_CH2/PA7 17 1500 600 150 L 40 40 1 1 B -X PB14/TIM1_CH2N 27 -1500 -1250 150 R 40 40 1 1 B -X JTCK/SWCLK/PA14 37 1500 -100 150 L 40 40 1 1 B -X VSS 47 0 -1750 150 U 40 40 1 1 W -X PB0/ADC12_IN8/TIM3_CH3 18 -1500 150 150 R 40 40 1 1 B -X PB15/TIM1_CH3N 28 -1500 -1350 150 R 40 40 1 1 B -X JTDI/PA15 38 1500 -200 150 L 40 40 1 1 B -X VDD 48 0 1750 150 D 40 40 1 1 W -X PB1/ADC12_IN9/TIM3_CH4 19 -1500 50 150 R 40 40 1 1 B -X USART1_CK/TIM1_CH1/MCO/PA8 29 1500 500 150 L 40 40 1 1 B -X PB3/JTDO 39 -1500 -150 150 R 40 40 1 1 B ENDDRAW ENDDEF # @@ -606,58 +606,58 @@ DEF STM32F103C8 U 0 40 Y Y 1 F N F0 "U" -1300 1650 50 H V C CNN F1 "STM32F103C8" 1050 -1650 50 H V C CNN F2 "LQFP48" 0 0 50 H V C CNN -F3 "~" 0 0 60 H V C CNN +F3 "" 0 0 50 H V C CNN ALIAS STM32F103CB DRAW +X VBAT 1 -1500 700 150 R 50 50 1 1 W +X PC13/TAMPER_RTC 2 -1500 500 150 R 50 50 1 1 B +X PC14/OSC32_IN 3 -1500 400 150 R 50 50 1 1 B +X PC15/OSC32_OUT 4 -1500 300 150 R 50 50 1 1 B +X PD0/OSC_IN 5 -1500 1000 150 R 50 50 1 1 B +X PD1/OSC_OUT 6 -1500 900 150 R 50 50 1 1 B +X ~NRST 7 -1500 1400 150 R 50 50 1 1 I +X VSSA 8 300 -1700 100 U 50 50 1 1 W +X VDDA 9 300 1700 100 D 50 50 1 1 W +X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/PA0 10 1500 1300 150 L 50 50 1 1 B +X PB2/BOOT1 20 -1500 -100 150 R 50 50 1 1 B +X USART1_TX/TIM1_CH2/PA9 30 1500 400 150 L 50 50 1 1 B +X PB4/NJTRST 40 -1500 -300 150 R 50 50 1 1 B +X USART2_RTS/ADC12_IN1/TIM2_CH2/PA1 11 1500 1200 150 L 50 50 1 1 B +X PB10/I2C2_SCL/USART3_TX 21 -1500 -900 150 R 50 50 1 1 B +X USART1_RX/TIM1_CH3/PA10 31 1500 300 150 L 50 50 1 1 B +X PB5/I2C1_SMBA 41 -1500 -400 150 R 50 50 1 1 B +X USART2_TX/ADC12_IN2/TIM2_CH3/PA2 12 1500 1100 150 L 50 50 1 1 B +X PB11/I2C2_SDA/USART3_RX 22 -1500 -1000 150 R 50 50 1 1 B +X USART1_CTS/CANRX/USBDM/TIM1_CH4/PA11 32 1500 200 150 L 50 50 1 1 B +X PB6/I2C1_SCL/TIM4_CH1 42 -1500 -500 150 R 50 50 1 1 B +X USART2_RX/ADC12_IN3/TIM2_CH4/PA3 13 1500 1000 150 L 50 50 1 1 B +X VSS 23 -300 -1700 100 U 50 50 1 1 W +X USART1_RTS/CANTX/USBDP/TIM1_ETR/PA12 33 1500 100 150 L 50 50 1 1 B +X PB7/I2C1_SDA/TIM4_CH2 43 -1500 -600 150 R 50 50 1 1 B +X SPI1_NSS/USART2_CK/ADC12_IN4/PA4 14 1500 900 150 L 50 50 1 1 B +X VDD 24 -300 1700 100 D 50 50 1 1 W +X JTMS/SWDIO/PA13 34 1500 0 150 L 50 50 1 1 B +X BOOT0 44 -1500 1200 150 R 50 50 1 1 I +X SPI1_SCK/ADC12_IN5/PA5 15 1500 800 150 L 50 50 1 1 B +X PB12/SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN 25 -1500 -1100 150 R 50 50 1 1 B +X VSS 35 -200 -1700 100 U 50 50 1 1 W +X PB8/TIM4_CH3 45 -1500 -700 150 R 50 50 1 1 B +X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 16 1500 700 150 L 50 50 1 1 B +X PB13/SPI2_SCK/USART3_CTS/TIM1_CH1N 26 -1500 -1200 150 R 50 50 1 1 B +X VDD 36 -200 1700 100 D 50 50 1 1 W +X PB9/TIM4_CH4 46 -1500 -800 150 R 50 50 1 1 B +X SPI1_MOSI/ADC12_IN7/TIM3_CH2/PA7 17 1500 600 150 L 50 50 1 1 B +X PB14/SPI2_MISO/USART3_RTS/TIM1_CH2N 27 -1500 -1300 150 R 50 50 1 1 B +X JTCK/SWCLK/PA14 37 1500 -100 150 L 50 50 1 1 B +X VSS 47 0 -1700 100 U 50 50 1 1 W +X PB0/ADC12_IN8/TIM3_CH3 18 -1500 100 150 R 50 50 1 1 B +X PB15/SPI2_MOSI/TIM1_CH3N 28 -1500 -1400 150 R 50 50 1 1 B +X JTDI/PA15 38 1500 -200 150 L 50 50 1 1 B +X VDD 48 0 1700 100 D 50 50 1 1 W +X PB1/ADC12_IN9/TIM3_CH4 19 -1500 0 150 R 50 50 1 1 B +X USART1_CK/TIM1_CH1/MCO/PA8 29 1500 500 150 L 50 50 1 1 B +X PB3/JTDO 39 -1500 -200 150 R 50 50 1 1 B S -1350 1600 1350 -1600 0 1 10 f -X VBAT 1 -1500 700 150 R 40 40 1 1 W -X PC13/TAMPER_RTC 2 -1500 500 150 R 40 40 1 1 B -X PC14/OSC32_IN 3 -1500 400 150 R 40 40 1 1 B -X PC15/OSC32_OUT 4 -1500 300 150 R 40 40 1 1 B -X PD0/OSC_IN 5 -1500 1050 150 R 40 40 1 1 B -X PD1/OSC_OUT 6 -1500 900 150 R 40 40 1 1 B -X ~NRST 7 -1500 1400 150 R 40 40 1 1 I -X VSSA 8 300 -1750 150 U 40 40 1 1 W -X VDDA 9 300 1750 150 D 40 40 1 1 W -X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/PA0 10 1500 1300 150 L 40 40 1 1 B -X PB2/BOOT1 20 -1500 -50 150 R 40 40 1 1 B -X USART1_TX/TIM1_CH2/PA9 30 1500 400 150 L 40 40 1 1 B -X PB4/NJTRST 40 -1500 -250 150 R 40 40 1 1 B -X USART2_RTS/ADC12_IN1/TIM2_CH2/PA1 11 1500 1200 150 L 40 40 1 1 B -X PB10/I2C2_SCL/USART3_TX 21 -1500 -850 150 R 40 40 1 1 B -X USART1_RX/TIM1_CH3/PA10 31 1500 300 150 L 40 40 1 1 B -X PB5/I2C1_SMBA 41 -1500 -350 150 R 40 40 1 1 B -X USART2_TX/ADC12_IN2/TIM2_CH3/PA2 12 1500 1100 150 L 40 40 1 1 B -X PB11/I2C2_SDA/USART3_RX 22 -1500 -950 150 R 40 40 1 1 B -X USART1_CTS/CANRX/USBDM/TIM1_CH4/PA11 32 1500 200 150 L 40 40 1 1 B -X PB6/I2C1_SCL/TIM4_CH1 42 -1500 -450 150 R 40 40 1 1 B -X USART2_RX/ADC12_IN3/TIM2_CH4/PA3 13 1500 1000 150 L 40 40 1 1 B -X VSS 23 -300 -1750 150 U 40 40 1 1 W -X USART1_RTS/CANTX/USBDP/TIM1_ETR/PA12 33 1500 100 150 L 40 40 1 1 B -X PB7/I2C1_SDA/TIM4_CH2 43 -1500 -550 150 R 40 40 1 1 B -X SPI1_NSS/USART2_CK/ADC12_IN4/PA4 14 1500 900 150 L 40 40 1 1 B -X VDD 24 -300 1750 150 D 40 40 1 1 W -X JTMS/SWDIO/PA13 34 1500 0 150 L 40 40 1 1 B -X BOOT0 44 -1500 1250 150 R 40 40 1 1 I -X SPI1_SCK/ADC12_IN5/PA5 15 1500 800 150 L 40 40 1 1 B -X PB12/SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN 25 -1500 -1050 150 R 40 40 1 1 B -X VSS 35 -150 -1750 150 U 40 40 1 1 W -X PB8/TIM4_CH3 45 -1500 -650 150 R 40 40 1 1 B -X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 16 1500 700 150 L 40 40 1 1 B -X PB13/SPI2_SCK/USART3_CTS/TIM1_CH1N 26 -1500 -1150 150 R 40 40 1 1 B -X VDD 36 -150 1750 150 D 40 40 1 1 W -X PB9/TIM4_CH4 46 -1500 -750 150 R 40 40 1 1 B -X SPI1_MOSI/ADC12_IN7/TIM3_CH2/PA7 17 1500 600 150 L 40 40 1 1 B -X PB14/SPI2_MISO/USART3_RTS/TIM1_CH2N 27 -1500 -1250 150 R 40 40 1 1 B -X JTCK/SWCLK/PA14 37 1500 -100 150 L 40 40 1 1 B -X VSS 47 0 -1750 150 U 40 40 1 1 W -X PB0/ADC12_IN8/TIM3_CH3 18 -1500 150 150 R 40 40 1 1 B -X PB15/SPI2_MOSI/TIM1_CH3N 28 -1500 -1350 150 R 40 40 1 1 B -X JTDI/PA15 38 1500 -200 150 L 40 40 1 1 B -X VDD 48 0 1750 150 D 40 40 1 1 W -X PB1/ADC12_IN9/TIM3_CH4 19 -1500 50 150 R 40 40 1 1 B -X USART1_CK/TIM1_CH1/MCO/PA8 29 1500 500 150 L 40 40 1 1 B -X PB3/JTDO 39 -1500 -150 150 R 40 40 1 1 B ENDDRAW ENDDEF # @@ -667,74 +667,74 @@ DEF STM32F103R4 U 0 40 Y Y 1 F N F0 "U" -1350 1950 50 H V C CNN F1 "STM32F103R4" 1150 -1950 50 H V C CNN F2 "LQFP64" 0 0 50 H V C CNN -F3 "~" 0 300 60 H V C CNN +F3 "" 0 300 50 H V C CNN ALIAS STM32F103R6 DRAW +X VBAT 1 -1500 1000 100 R 50 50 1 1 W +X PC13/TAMPER_RTC 2 -1500 300 100 R 50 50 1 1 B +X PC14/OSC32_IN 3 -1500 200 100 R 50 50 1 1 B +X PC15/OSC32_OUT 4 -1500 100 100 R 50 50 1 1 B +X PD0/OSC_IN 5 -1500 1300 100 R 50 50 1 1 B +X PD1/OSC_OUT 6 -1500 1200 100 R 50 50 1 1 B +X ~NRST 7 -1500 1700 100 R 50 50 1 1 I +X PC0/ADC12_IN10 8 -1500 -100 100 R 50 50 1 1 B +X PC1/ADC12_IN11 9 -1500 -200 100 R 50 50 1 1 B +X PC2/ADC12_IN12 10 -1500 -300 100 R 50 50 1 1 B +X SPI1_NSS/USART2_CK/ADC12_IN4/PA4 20 1500 1200 100 L 50 50 1 1 B +X PB11 30 1500 -1200 100 L 50 50 1 1 B +X PC9 40 -1500 -1000 100 R 50 50 1 1 B +X JTDI/PA15 50 1500 100 100 L 50 50 1 1 B +X BOOT0 60 -1500 1500 100 R 50 50 1 1 I +X PC3/ADC12_IN13 11 -1500 -400 100 R 50 50 1 1 B +X SPI1_SCK/ADC12_IN5/PA5 21 1500 1100 100 L 50 50 1 1 B +X VSS 31 -300 -2000 100 U 50 50 1 1 W +X USART1_CK/TIM1_CH1/MCO/PA8 41 1500 800 100 L 50 50 1 1 B +X PC10 51 -1500 -1100 100 R 50 50 1 1 B +X PB8 61 1500 -900 100 L 50 50 1 1 B +X VSSA 12 300 -2000 100 U 50 50 1 1 W +X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 22 1500 1000 100 L 50 50 1 1 B +X VDD 32 -300 2000 100 D 50 50 1 1 W +X USART1_TX/TIM1_CH2/PA9 42 1500 700 100 L 50 50 1 1 B +X PC11 52 -1500 -1200 100 R 50 50 1 1 B +X PB9 62 1500 -1000 100 L 50 50 1 1 B +X VDDA 13 300 2000 100 D 50 50 1 1 W +X SPI1_MOSI/ADC12_IN7/TIM3_CH2/PA7 23 1500 900 100 L 50 50 1 1 B +X TIM1_BKIN/PB12 33 1500 -1300 100 L 50 50 1 1 B +X USART1_RX/TIM1_CH3/PA10 43 1500 600 100 L 50 50 1 1 B +X PC12 53 -1500 -1300 100 R 50 50 1 1 B +X VSS 63 0 -2000 100 U 50 50 1 1 W +X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/PA0 14 1500 1600 100 L 50 50 1 1 B +X PC4/ADC12_IN14 24 -1500 -500 100 R 50 50 1 1 B +X TIM1_CH1N/PB13 34 1500 -1400 100 L 50 50 1 1 B +X USART1_CTS/CAN_RX/TIM1_CH4/USBDM/PA11 44 1500 500 100 L 50 50 1 1 B +X PD2/TIM3_ETR 54 -1500 500 100 R 50 50 1 1 B +X VDD 64 0 2000 100 D 50 50 1 1 W +X USART2_RTS/ADC12_IN1/TIM2_CH2/PA1 15 1500 1500 100 L 50 50 1 1 B +X PC5/ADC12_IN15 25 -1500 -600 100 R 50 50 1 1 B +X TIM1_CH2N/PB14 35 1500 -1500 100 L 50 50 1 1 B +X USART1_RTS/CAN_TX/TIM1_ETR/USBDP/PA12 45 1500 400 100 L 50 50 1 1 B +X JTDO/PB3 55 1500 -400 100 L 50 50 1 1 B +X USART2_TX/ADC12_IN2/TIM2_CH3/PA2 16 1500 1400 100 L 50 50 1 1 B +X ADC12_IN8/TIM3_CH3/PB0 26 1500 -100 100 L 50 50 1 1 B +X TIM1_CH3N/PB15 36 1500 -1600 100 L 50 50 1 1 B +X JTMS/SWDIO/PA13 46 1500 300 100 L 50 50 1 1 B +X NJTRST/PB4 56 1500 -500 100 L 50 50 1 1 B +X USART2_RX/ADC12_IN3/TIM2_CH4/PA3 17 1500 1300 100 L 50 50 1 1 B +X ADC12_IN9/TIM3_CH4/PB1 27 1500 -200 100 L 50 50 1 1 B +X PC6 37 -1500 -700 100 R 50 50 1 1 B +X VSS 47 -200 -2000 100 U 50 50 1 1 W +X I2C1_SMBA/PB5 57 1500 -600 100 L 50 50 1 1 B +X VSS 18 -500 -2000 100 U 50 50 1 1 W +X BOOT1/PB2 28 1500 -300 100 L 50 50 1 1 B +X PC7 38 -1500 -800 100 R 50 50 1 1 B +X VDD 48 -200 2000 100 D 50 50 1 1 W +X I2C1_SCL/PB6 58 1500 -700 100 L 50 50 1 1 B +X VDD 19 -500 2000 100 D 50 50 1 1 W +X PB10 29 1500 -1100 100 L 50 50 1 1 B +X PC8 39 -1500 -900 100 R 50 50 1 1 B +X JTCK/SWCLK/PA14 49 1500 200 100 L 50 50 1 1 B +X I2C1_SDA/PB7 59 1500 -800 100 L 50 50 1 1 B S -1400 1900 1400 -1900 0 1 10 f -X VBAT 1 -1550 1000 150 R 40 40 1 1 W -X PC13/TAMPER_RTC 2 -1550 300 150 R 40 40 1 1 B -X PC14/OSC32_IN 3 -1550 200 150 R 40 40 1 1 B -X PC15/OSC32_OUT 4 -1550 100 150 R 40 40 1 1 B -X PD0/OSC_IN 5 -1550 1350 150 R 40 40 1 1 B -X PD1/OSC_OUT 6 -1550 1200 150 R 40 40 1 1 B -X ~NRST 7 -1550 1700 150 R 40 40 1 1 I -X PC0/ADC12_IN10 8 -1550 -100 150 R 40 40 1 1 B -X PC1/ADC12_IN11 9 -1550 -200 150 R 40 40 1 1 B -X PC2/ADC12_IN12 10 -1550 -300 150 R 40 40 1 1 B -X SPI1_NSS/USART2_CK/ADC12_IN4/PA4 20 1550 1200 150 L 40 40 1 1 B -X PB11 30 1550 -1200 150 L 40 40 1 1 B -X PC9 40 -1550 -1000 150 R 40 40 1 1 B -X JTDI/PA15 50 1550 100 150 L 40 40 1 1 B -X BOOT0 60 -1550 1550 150 R 40 40 1 1 I -X PC3/ADC12_IN13 11 -1550 -400 150 R 40 40 1 1 B -X SPI1_SCK/ADC12_IN5/PA5 21 1550 1100 150 L 40 40 1 1 B -X VSS 31 -300 -2050 150 U 40 40 1 1 W -X USART1_CK/TIM1_CH1/MCO/PA8 41 1550 800 150 L 40 40 1 1 B -X PC10 51 -1550 -1100 150 R 40 40 1 1 B -X PB8 61 1550 -900 150 L 40 40 1 1 B -X VSSA 12 300 -2050 150 U 40 40 1 1 W -X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 22 1550 1000 150 L 40 40 1 1 B -X VDD 32 -300 2050 150 D 40 40 1 1 W -X USART1_TX/TIM1_CH2/PA9 42 1550 700 150 L 40 40 1 1 B -X PC11 52 -1550 -1200 150 R 40 40 1 1 B -X PB9 62 1550 -1000 150 L 40 40 1 1 B -X VDDA 13 300 2050 150 D 40 40 1 1 W -X SPI1_MOSI/ADC12_IN7/TIM3_CH2/PA7 23 1550 900 150 L 40 40 1 1 B -X TIM1_BKIN/PB12 33 1550 -1300 150 L 40 40 1 1 B -X USART1_RX/TIM1_CH3/PA10 43 1550 600 150 L 40 40 1 1 B -X PC12 53 -1550 -1300 150 R 40 40 1 1 B -X VSS 63 0 -2050 150 U 40 40 1 1 W -X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/PA0 14 1550 1600 150 L 40 40 1 1 B -X PC4/ADC12_IN14 24 -1550 -500 150 R 40 40 1 1 B -X TIM1_CH1N/PB13 34 1550 -1400 150 L 40 40 1 1 B -X USART1_CTS/CAN_RX/TIM1_CH4/USBDM/PA11 44 1550 500 150 L 40 40 1 1 B -X PD2/TIM3_ETR 54 -1550 500 150 R 40 40 1 1 B -X VDD 64 0 2050 150 D 40 40 1 1 W -X USART2_RTS/ADC12_IN1/TIM2_CH2/PA1 15 1550 1500 150 L 40 40 1 1 B -X PC5/ADC12_IN15 25 -1550 -600 150 R 40 40 1 1 B -X TIM1_CH2N/PB14 35 1550 -1500 150 L 40 40 1 1 B -X USART1_RTS/CAN_TX/TIM1_ETR/USBDP/PA12 45 1550 400 150 L 40 40 1 1 B -X JTDO/PB3 55 1550 -400 150 L 40 40 1 1 B -X USART2_TX/ADC12_IN2/TIM2_CH3/PA2 16 1550 1400 150 L 40 40 1 1 B -X ADC12_IN8/TIM3_CH3/PB0 26 1550 -100 150 L 40 40 1 1 B -X TIM1_CH3N/PB15 36 1550 -1600 150 L 40 40 1 1 B -X JTMS/SWDIO/PA13 46 1550 300 150 L 40 40 1 1 B -X NJTRST/PB4 56 1550 -500 150 L 40 40 1 1 B -X USART2_RX/ADC12_IN3/TIM2_CH4/PA3 17 1550 1300 150 L 40 40 1 1 B -X ADC12_IN9/TIM3_CH4/PB1 27 1550 -200 150 L 40 40 1 1 B -X PC6 37 -1550 -700 150 R 40 40 1 1 B -X VSS 47 -150 -2050 150 U 40 40 1 1 W -X I2C1_SMBA/PB5 57 1550 -600 150 L 40 40 1 1 B -X VSS 18 -450 -2050 150 U 40 40 1 1 W -X BOOT1/PB2 28 1550 -300 150 L 40 40 1 1 B -X PC7 38 -1550 -800 150 R 40 40 1 1 B -X VDD 48 -150 2050 150 D 40 40 1 1 W -X I2C1_SCL/PB6 58 1550 -700 150 L 40 40 1 1 B -X VDD 19 -450 2050 150 D 40 40 1 1 W -X PB10 29 1550 -1100 150 L 40 40 1 1 B -X PC8 39 -1550 -900 150 R 40 40 1 1 B -X JTCK/SWCLK/PA14 49 1550 200 150 L 40 40 1 1 B -X I2C1_SDA/PB7 59 1550 -800 150 L 40 40 1 1 B ENDDRAW ENDDEF # @@ -744,74 +744,74 @@ DEF STM32F103R8 U 0 40 Y Y 1 F N F0 "U" -1350 1950 50 H V C CNN F1 "STM32F103R8" 1150 -1950 50 H V C CNN F2 "LQFP64" 0 0 50 H V C CNN -F3 "~" 0 300 60 H V C CNN +F3 "" 0 300 50 H V C CNN ALIAS STM32F103RB DRAW +X VBAT 1 -1500 1000 100 R 50 50 1 1 W +X PC13/TAMPER_RTC 2 -1500 300 100 R 50 50 1 1 B +X PC14/OSC32_IN 3 -1500 200 100 R 50 50 1 1 B +X PC15/OSC32_OUT 4 -1500 100 100 R 50 50 1 1 B +X PD0/OSC_IN 5 -1500 1300 100 R 50 50 1 1 B +X PD1/OSC_OUT 6 -1500 1200 100 R 50 50 1 1 B +X ~NRST 7 -1500 1700 100 R 50 50 1 1 I +X PC0/ADC12_IN10 8 -1500 -100 100 R 50 50 1 1 B +X PC1/ADC12_IN11 9 -1500 -200 100 R 50 50 1 1 B +X PC2/ADC12_IN12 10 -1500 -300 100 R 50 50 1 1 B +X SPI1_NSS/USART2_CK/ADC12_IN4/PA4 20 1500 1200 100 L 50 50 1 1 B +X I2C2_SDA/USART3_RX/PB11 30 1500 -1200 100 L 50 50 1 1 B +X PC9 40 -1500 -1000 100 R 50 50 1 1 B +X JTDI/PA15 50 1500 100 100 L 50 50 1 1 B +X BOOT0 60 -1500 1500 100 R 50 50 1 1 I +X PC3/ADC12_IN13 11 -1500 -400 100 R 50 50 1 1 B +X SPI1_SCK/ADC12_IN5/PA5 21 1500 1100 100 L 50 50 1 1 B +X VSS 31 -300 -2000 100 U 50 50 1 1 W +X USART1_CK/TIM1_CH1/MCO/PA8 41 1500 800 100 L 50 50 1 1 B +X PC10 51 -1500 -1100 100 R 50 50 1 1 B +X TIM4_CH3/PB8 61 1500 -900 100 L 50 50 1 1 B +X VSSA 12 300 -2000 100 U 50 50 1 1 W +X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 22 1500 1000 100 L 50 50 1 1 B +X VDD 32 -300 2000 100 D 50 50 1 1 W +X USART1_TX/TIM1_CH2/PA9 42 1500 700 100 L 50 50 1 1 B +X PC11 52 -1500 -1200 100 R 50 50 1 1 B +X TIM4_CH4/PB9 62 1500 -1000 100 L 50 50 1 1 B +X VDDA 13 300 2000 100 D 50 50 1 1 W +X SPI1_MOSI/ADC12_IN7/TIM3_CH2/PA7 23 1500 900 100 L 50 50 1 1 B +X SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN/PB12 33 1500 -1300 100 L 50 50 1 1 B +X USART1_RX/TIM1_CH3/PA10 43 1500 600 100 L 50 50 1 1 B +X PC12 53 -1500 -1300 100 R 50 50 1 1 B +X VSS 63 0 -2000 100 U 50 50 1 1 W +X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/PA0 14 1500 1600 100 L 50 50 1 1 B +X PC4/ADC12_IN14 24 -1500 -500 100 R 50 50 1 1 B +X SPI2_SCK/USART3_CTS/TIM1_CH1N/PB13 34 1500 -1400 100 L 50 50 1 1 B +X USART1_CTS/CANRX/USBDM/TIM1_CH4/PA11 44 1500 500 100 L 50 50 1 1 B +X PD2/TIM3_ETR 54 -1500 500 100 R 50 50 1 1 B +X VDD 64 0 2000 100 D 50 50 1 1 W +X USART2_RTS/ADC12_IN1/TIM2_CH2/PA1 15 1500 1500 100 L 50 50 1 1 B +X PC5/ADC12_IN15 25 -1500 -600 100 R 50 50 1 1 B +X SPI2_MISO/USART3_RTS/TIM1_CH2N/PB14 35 1500 -1500 100 L 50 50 1 1 B +X USART1_RTS/CANTX/USBDP/TIM1_ETR/PA12 45 1500 400 100 L 50 50 1 1 B +X JTDO/PB3 55 1500 -400 100 L 50 50 1 1 B +X USART2_TX/ADC12_IN2/TIM2_CH3/PA2 16 1500 1400 100 L 50 50 1 1 B +X ADC12_IN8/TIM3_CH3/PB0 26 1500 -100 100 L 50 50 1 1 B +X SPI2_MOSI/TIM1_CH3N/PB15 36 1500 -1600 100 L 50 50 1 1 B +X JTMS/SWDIO/PA13 46 1500 300 100 L 50 50 1 1 B +X NJTRST/PB4 56 1500 -500 100 L 50 50 1 1 B +X USART2_RX/ADC12_IN3/TIM2_CH4/PA3 17 1500 1300 100 L 50 50 1 1 B +X ADC12_IN9/TIM3_CH4/PB1 27 1500 -200 100 L 50 50 1 1 B +X PC6 37 -1500 -700 100 R 50 50 1 1 B +X VSS 47 -200 -2000 100 U 50 50 1 1 W +X I2C1_SMBA/PB5 57 1500 -600 100 L 50 50 1 1 B +X VSS 18 -500 -2000 100 U 50 50 1 1 W +X BOOT1/PB2 28 1500 -300 100 L 50 50 1 1 B +X PC7 38 -1500 -800 100 R 50 50 1 1 B +X VDD 48 -200 2000 100 D 50 50 1 1 W +X I2C1_SCL/TIM4_CH1/PB6 58 1500 -700 100 L 50 50 1 1 B +X VDD 19 -500 2000 100 D 50 50 1 1 W +X I2C2_SCL/USART3_TX/PB10 29 1500 -1100 100 L 50 50 1 1 B +X PC8 39 -1500 -900 100 R 50 50 1 1 B +X JTCK/SWCLK/PA14 49 1500 200 100 L 50 50 1 1 B +X I2C1_SDA/TIM4_CH2/PB7 59 1500 -800 100 L 50 50 1 1 B S -1400 1900 1400 -1900 0 1 10 f -X VBAT 1 -1550 1000 150 R 40 40 1 1 W -X PC13/TAMPER_RTC 2 -1550 300 150 R 40 40 1 1 B -X PC14/OSC32_IN 3 -1550 200 150 R 40 40 1 1 B -X PC15/OSC32_OUT 4 -1550 100 150 R 40 40 1 1 B -X PD0/OSC_IN 5 -1550 1350 150 R 40 40 1 1 B -X PD1/OSC_OUT 6 -1550 1200 150 R 40 40 1 1 B -X ~NRST 7 -1550 1700 150 R 40 40 1 1 I -X PC0/ADC12_IN10 8 -1550 -100 150 R 40 40 1 1 B -X PC1/ADC12_IN11 9 -1550 -200 150 R 40 40 1 1 B -X PC2/ADC12_IN12 10 -1550 -300 150 R 40 40 1 1 B -X SPI1_NSS/USART2_CK/ADC12_IN4/PA4 20 1550 1200 150 L 40 40 1 1 B -X I2C2_SDA/USART3_RX/PB11 30 1550 -1200 150 L 40 40 1 1 B -X PC9 40 -1550 -1000 150 R 40 40 1 1 B -X JTDI/PA15 50 1550 100 150 L 40 40 1 1 B -X BOOT0 60 -1550 1550 150 R 40 40 1 1 I -X PC3/ADC12_IN13 11 -1550 -400 150 R 40 40 1 1 B -X SPI1_SCK/ADC12_IN5/PA5 21 1550 1100 150 L 40 40 1 1 B -X VSS 31 -300 -2050 150 U 40 40 1 1 W -X USART1_CK/TIM1_CH1/MCO/PA8 41 1550 800 150 L 40 40 1 1 B -X PC10 51 -1550 -1100 150 R 40 40 1 1 B -X TIM4_CH3/PB8 61 1550 -900 150 L 40 40 1 1 B -X VSSA 12 300 -2050 150 U 40 40 1 1 W -X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 22 1550 1000 150 L 40 40 1 1 B -X VDD 32 -300 2050 150 D 40 40 1 1 W -X USART1_TX/TIM1_CH2/PA9 42 1550 700 150 L 40 40 1 1 B -X PC11 52 -1550 -1200 150 R 40 40 1 1 B -X TIM4_CH4/PB9 62 1550 -1000 150 L 40 40 1 1 B -X VDDA 13 300 2050 150 D 40 40 1 1 W -X SPI1_MOSI/ADC12_IN7/TIM3_CH2/PA7 23 1550 900 150 L 40 40 1 1 B -X SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN/PB12 33 1550 -1300 150 L 40 40 1 1 B -X USART1_RX/TIM1_CH3/PA10 43 1550 600 150 L 40 40 1 1 B -X PC12 53 -1550 -1300 150 R 40 40 1 1 B -X VSS 63 0 -2050 150 U 40 40 1 1 W -X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/PA0 14 1550 1600 150 L 40 40 1 1 B -X PC4/ADC12_IN14 24 -1550 -500 150 R 40 40 1 1 B -X SPI2_SCK/USART3_CTS/TIM1_CH1N/PB13 34 1550 -1400 150 L 40 40 1 1 B -X USART1_CTS/CANRX/USBDM/TIM1_CH4/PA11 44 1550 500 150 L 40 40 1 1 B -X PD2/TIM3_ETR 54 -1550 500 150 R 40 40 1 1 B -X VDD 64 0 2050 150 D 40 40 1 1 W -X USART2_RTS/ADC12_IN1/TIM2_CH2/PA1 15 1550 1500 150 L 40 40 1 1 B -X PC5/ADC12_IN15 25 -1550 -600 150 R 40 40 1 1 B -X SPI2_MISO/USART3_RTS/TIM1_CH2N/PB14 35 1550 -1500 150 L 40 40 1 1 B -X USART1_RTS/CANTX/USBDP/TIM1_ETR/PA12 45 1550 400 150 L 40 40 1 1 B -X JTDO/PB3 55 1550 -400 150 L 40 40 1 1 B -X USART2_TX/ADC12_IN2/TIM2_CH3/PA2 16 1550 1400 150 L 40 40 1 1 B -X ADC12_IN8/TIM3_CH3/PB0 26 1550 -100 150 L 40 40 1 1 B -X SPI2_MOSI/TIM1_CH3N/PB15 36 1550 -1600 150 L 40 40 1 1 B -X JTMS/SWDIO/PA13 46 1550 300 150 L 40 40 1 1 B -X NJTRST/PB4 56 1550 -500 150 L 40 40 1 1 B -X USART2_RX/ADC12_IN3/TIM2_CH4/PA3 17 1550 1300 150 L 40 40 1 1 B -X ADC12_IN9/TIM3_CH4/PB1 27 1550 -200 150 L 40 40 1 1 B -X PC6 37 -1550 -700 150 R 40 40 1 1 B -X VSS 47 -150 -2050 150 U 40 40 1 1 W -X I2C1_SMBA/PB5 57 1550 -600 150 L 40 40 1 1 B -X VSS 18 -450 -2050 150 U 40 40 1 1 W -X BOOT1/PB2 28 1550 -300 150 L 40 40 1 1 B -X PC7 38 -1550 -800 150 R 40 40 1 1 B -X VDD 48 -150 2050 150 D 40 40 1 1 W -X I2C1_SCL/TIM4_CH1/PB6 58 1550 -700 150 L 40 40 1 1 B -X VDD 19 -450 2050 150 D 40 40 1 1 W -X I2C2_SCL/USART3_TX/PB10 29 1550 -1100 150 L 40 40 1 1 B -X PC8 39 -1550 -900 150 R 40 40 1 1 B -X JTCK/SWCLK/PA14 49 1550 200 150 L 40 40 1 1 B -X I2C1_SDA/TIM4_CH2/PB7 59 1550 -800 150 L 40 40 1 1 B ENDDRAW ENDDEF # @@ -821,74 +821,74 @@ DEF STM32F103RC U 0 40 Y Y 1 F N F0 "U" -1350 1950 50 H V C CNN F1 "STM32F103RC" 1150 -1950 50 H V C CNN F2 "LQFP64" 0 0 50 H V C CNN -F3 "~" 0 300 60 H V C CNN +F3 "" 0 300 50 H V C CNN ALIAS STM32F103RD STM32F103RE DRAW +X VBAT 1 -1500 1000 100 R 50 50 1 1 W +X PC13/TAMPER_RTC 2 -1500 300 100 R 50 50 1 1 B +X PC14/OSC32_IN 3 -1500 200 100 R 50 50 1 1 B +X PC15/OSC32_OUT 4 -1500 100 100 R 50 50 1 1 B +X PD0/OSC_IN 5 -1500 1300 100 R 50 50 1 1 B +X PD1/OSC_OUT 6 -1500 1200 100 R 50 50 1 1 B +X ~NRST 7 -1500 1700 100 R 50 50 1 1 I +X PC0/ADC123_IN10 8 -1500 -100 100 R 50 50 1 1 B +X PC1/ADC123_IN11 9 -1500 -200 100 R 50 50 1 1 B +X PC2/ADC123_IN12 10 -1500 -300 100 R 50 50 1 1 B +X SPI1_NSS/USART2_CK/DAC_OUT1/ADC12_IN4/PA4 20 1500 1200 100 L 50 50 1 1 B +X I2C2_SDA/USART3_RX/PB11 30 1500 -1200 100 L 50 50 1 1 B +X PC9/TIM8_CH4/SDIO_D1 40 -1500 -1000 100 R 50 50 1 1 B +X JTDI/SPI3_NSS/I2S3_WS/PA15 50 1500 100 100 L 50 50 1 1 B +X BOOT0 60 -1500 1500 100 R 50 50 1 1 I +X PC3/ADC123_IN13 11 -1500 -400 100 R 50 50 1 1 B +X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 21 1500 1100 100 L 50 50 1 1 B +X VSS 31 -300 -2000 100 U 50 50 1 1 W +X USART1_CK/TIM1_CH1/MCO/PA8 41 1500 800 100 L 50 50 1 1 B +X PC10/UART4_TX/SDIO_D2 51 -1500 -1100 100 R 50 50 1 1 B +X TIM4_CH3/SDIO_D4/PB8 61 1500 -900 100 L 50 50 1 1 B +X VSSA 12 300 -2000 100 U 50 50 1 1 W +X SPI1_MISO/TIM8_BKIN/ADC12_IN6/TIM3_CH1/PA6 22 1500 1000 100 L 50 50 1 1 B +X VDD 32 -300 2000 100 D 50 50 1 1 W +X USART1_TX/TIM1_CH2/PA9 42 1500 700 100 L 50 50 1 1 B +X PC11/UART4_RX/SDIO_D3 52 -1500 -1200 100 R 50 50 1 1 B +X TIM4_CH4/SDIO_D5/PB9 62 1500 -1000 100 L 50 50 1 1 B +X VDDA 13 300 2000 100 D 50 50 1 1 W +X SPI1_MOSI/TIM8_CH1N/ADC12_IN7/TIM3_CH2/PA7 23 1500 900 100 L 50 50 1 1 B +X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/PB12 33 1500 -1300 100 L 50 50 1 1 B +X USART1_RX/TIM1_CH3/PA10 43 1500 600 100 L 50 50 1 1 B +X PC12/UART5_TX/SDIO_CK 53 -1500 -1300 100 R 50 50 1 1 B +X VSS 63 0 -2000 100 U 50 50 1 1 W +X WKUP/USART2_CTS/ADC123_IN0/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/PA0 14 1500 1600 100 L 50 50 1 1 B +X PC4/ADC12_IN14 24 -1500 -500 100 R 50 50 1 1 B +X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/PB13 34 1500 -1400 100 L 50 50 1 1 B +X USART1_CTS/USBDM/CAN_RX/TIM1_CH4/PA11 44 1500 500 100 L 50 50 1 1 B +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 54 -1500 500 100 R 50 50 1 1 B +X VDD 64 0 2000 100 D 50 50 1 1 W +X USART2_RTS/ADC123_IN1/TIM5_CH2/TIM2_CH2/PA1 15 1500 1500 100 L 50 50 1 1 B +X PC5/ADC12_IN15 25 -1500 -600 100 R 50 50 1 1 B +X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 35 1500 -1500 100 L 50 50 1 1 B +X USART1_RTS/USBDP/CAN_TX/TIM1_ETR/PA11 45 1500 400 100 L 50 50 1 1 B +X JTDO/SPI3_SCK/I2S3_CK/PB3 55 1500 -400 100 L 50 50 1 1 B +X USART2_TX/TIM5_CH3/ADC123_IN2/TIM2_CH3/PA2 16 1500 1400 100 L 50 50 1 1 B +X ADC12_IN8/TIM3_CH3/TIM8_CH2N/PB0 26 1500 -100 100 L 50 50 1 1 B +X SPI2_MOSI/I2S2_SD/TIM1_CH3N/PB15 36 1500 -1600 100 L 50 50 1 1 B +X JTMS/SWDIO/PA13 46 1500 300 100 L 50 50 1 1 B +X NJTRST/SPI3_MISO/PB4 56 1500 -500 100 L 50 50 1 1 B +X USART2_RX/TIM5_CH4/ADC123_IN3/TIM2_CH4/PA3 17 1500 1300 100 L 50 50 1 1 B +X ADC12_IN9/TIM3_CH4/TIM8_CH3N/PB1 27 1500 -200 100 L 50 50 1 1 B +X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6 37 -1500 -700 100 R 50 50 1 1 B +X VSS 47 -200 -2000 100 U 50 50 1 1 W +X I2C1_SMBA/SPI3_MOSI/I2S3_CD/PB5 57 1500 -600 100 L 50 50 1 1 B +X VSS 18 -500 -2000 100 U 50 50 1 1 W +X BOOT1/PB2 28 1500 -300 100 L 50 50 1 1 B +X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7 38 -1500 -800 100 R 50 50 1 1 B +X VDD 48 -200 2000 100 D 50 50 1 1 W +X I2C1_SCL/TIM4_CH1/PB6 58 1500 -700 100 L 50 50 1 1 B +X VDD 19 -500 2000 100 D 50 50 1 1 W +X I2C2_SCL/USART3_TX/PB10 29 1500 -1100 100 L 50 50 1 1 B +X PC8/TIM8_CH3/SDIO_D0 39 -1500 -900 100 R 50 50 1 1 B +X JTCK/SWCLK/PA14 49 1500 200 100 L 50 50 1 1 B +X I2C1_SDA/TIM4_CH2/PB7 59 1500 -800 100 L 50 50 1 1 B S -1400 1900 1400 -1900 0 1 10 f -X VBAT 1 -1550 1000 150 R 40 40 1 1 W -X PC13/TAMPER_RTC 2 -1550 300 150 R 40 40 1 1 B -X PC14/OSC32_IN 3 -1550 200 150 R 40 40 1 1 B -X PC15/OSC32_OUT 4 -1550 100 150 R 40 40 1 1 B -X PD0/OSC_IN 5 -1550 1350 150 R 40 40 1 1 B -X PD1/OSC_OUT 6 -1550 1200 150 R 40 40 1 1 B -X ~NRST 7 -1550 1700 150 R 40 40 1 1 I -X PC0/ADC123_IN10 8 -1550 -100 150 R 40 40 1 1 B -X PC1/ADC123_IN11 9 -1550 -200 150 R 40 40 1 1 B -X PC2/ADC123_IN12 10 -1550 -300 150 R 40 40 1 1 B -X SPI1_NSS/USART2_CK/DAC_OUT1/ADC12_IN4/PA4 20 1550 1200 150 L 40 40 1 1 B -X I2C2_SDA/USART3_RX/PB11 30 1550 -1200 150 L 40 40 1 1 B -X PC9/TIM8_CH4/SDIO_D1 40 -1550 -1000 150 R 40 40 1 1 B -X JTDI/SPI3_NSS/I2S3_WS/PA15 50 1550 100 150 L 40 40 1 1 B -X BOOT0 60 -1550 1550 150 R 40 40 1 1 I -X PC3/ADC123_IN13 11 -1550 -400 150 R 40 40 1 1 B -X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 21 1550 1100 150 L 40 40 1 1 B -X VSS 31 -300 -2050 150 U 40 40 1 1 W -X USART1_CK/TIM1_CH1/MCO/PA8 41 1550 800 150 L 40 40 1 1 B -X PC10/UART4_TX/SDIO_D2 51 -1550 -1100 150 R 40 40 1 1 B -X TIM4_CH3/SDIO_D4/PB8 61 1550 -900 150 L 40 40 1 1 B -X VSSA 12 300 -2050 150 U 40 40 1 1 W -X SPI1_MISO/TIM8_BKIN/ADC12_IN6/TIM3_CH1/PA6 22 1550 1000 150 L 40 40 1 1 B -X VDD 32 -300 2050 150 D 40 40 1 1 W -X USART1_TX/TIM1_CH2/PA9 42 1550 700 150 L 40 40 1 1 B -X PC11/UART4_RX/SDIO_D3 52 -1550 -1200 150 R 40 40 1 1 B -X TIM4_CH4/SDIO_D5/PB9 62 1550 -1000 150 L 40 40 1 1 B -X VDDA 13 300 2050 150 D 40 40 1 1 W -X SPI1_MOSI/TIM8_CH1N/ADC12_IN7/TIM3_CH2/PA7 23 1550 900 150 L 40 40 1 1 B -X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/PB12 33 1550 -1300 150 L 40 40 1 1 B -X USART1_RX/TIM1_CH3/PA10 43 1550 600 150 L 40 40 1 1 B -X PC12/UART5_TX/SDIO_CK 53 -1550 -1300 150 R 40 40 1 1 B -X VSS 63 0 -2050 150 U 40 40 1 1 W -X WKUP/USART2_CTS/ADC123_IN0/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/PA0 14 1550 1600 150 L 40 40 1 1 B -X PC4/ADC12_IN14 24 -1550 -500 150 R 40 40 1 1 B -X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/PB13 34 1550 -1400 150 L 40 40 1 1 B -X USART1_CTS/USBDM/CAN_RX/TIM1_CH4/PA11 44 1550 500 150 L 40 40 1 1 B -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 54 -1550 500 150 R 40 40 1 1 B -X VDD 64 0 2050 150 D 40 40 1 1 W -X USART2_RTS/ADC123_IN1/TIM5_CH2/TIM2_CH2/PA1 15 1550 1500 150 L 40 40 1 1 B -X PC5/ADC12_IN15 25 -1550 -600 150 R 40 40 1 1 B -X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 35 1550 -1500 150 L 40 40 1 1 B -X USART1_RTS/USBDP/CAN_TX/TIM1_ETR/PA11 45 1550 400 150 L 40 40 1 1 B -X JTDO/SPI3_SCK/I2S3_CK/PB3 55 1550 -400 150 L 40 40 1 1 B -X USART2_TX/TIM5_CH3/ADC123_IN2/TIM2_CH3/PA2 16 1550 1400 150 L 40 40 1 1 B -X ADC12_IN8/TIM3_CH3/TIM8_CH2N/PB0 26 1550 -100 150 L 40 40 1 1 B -X SPI2_MOSI/I2S2_SD/TIM1_CH3N/PB15 36 1550 -1600 150 L 40 40 1 1 B -X JTMS/SWDIO/PA13 46 1550 300 150 L 40 40 1 1 B -X NJTRST/SPI3_MISO/PB4 56 1550 -500 150 L 40 40 1 1 B -X USART2_RX/TIM5_CH4/ADC123_IN3/TIM2_CH4/PA3 17 1550 1300 150 L 40 40 1 1 B -X ADC12_IN9/TIM3_CH4/TIM8_CH3N/PB1 27 1550 -200 150 L 40 40 1 1 B -X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6 37 -1550 -700 150 R 40 40 1 1 B -X VSS 47 -150 -2050 150 U 40 40 1 1 W -X I2C1_SMBA/SPI3_MOSI/I2S3_CD/PB5 57 1550 -600 150 L 40 40 1 1 B -X VSS 18 -450 -2050 150 U 40 40 1 1 W -X BOOT1/PB2 28 1550 -300 150 L 40 40 1 1 B -X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7 38 -1550 -800 150 R 40 40 1 1 B -X VDD 48 -150 2050 150 D 40 40 1 1 W -X I2C1_SCL/TIM4_CH1/PB6 58 1550 -700 150 L 40 40 1 1 B -X VDD 19 -450 2050 150 D 40 40 1 1 W -X I2C2_SCL/USART3_TX/PB10 29 1550 -1100 150 L 40 40 1 1 B -X PC8/TIM8_CH3/SDIO_D0 39 -1550 -900 150 R 40 40 1 1 B -X JTCK/SWCLK/PA14 49 1550 200 150 L 40 40 1 1 B -X I2C1_SDA/TIM4_CH2/PB7 59 1550 -800 150 L 40 40 1 1 B ENDDRAW ENDDEF # @@ -898,74 +898,74 @@ DEF STM32F103RF U 0 40 Y Y 1 F N F0 "U" -1350 1950 50 H V C CNN F1 "STM32F103RF" 1150 -1950 50 H V C CNN F2 "LQFP64" 0 0 50 H V C CNN -F3 "~" 0 300 60 H V C CNN +F3 "" 0 300 50 H V C CNN ALIAS STM32F103RG DRAW +X VBAT 1 -1500 1000 100 R 50 50 1 1 W +X PC13/TAMPER_RTC 2 -1500 300 100 R 50 50 1 1 B +X PC14/OSC32_IN 3 -1500 200 100 R 50 50 1 1 B +X PC15/OSC32_OUT 4 -1500 100 100 R 50 50 1 1 B +X PD0/OSC_IN 5 -1500 1300 100 R 50 50 1 1 B +X PD1/OSC_OUT 6 -1500 1200 100 R 50 50 1 1 B +X ~NRST 7 -1500 1700 100 R 50 50 1 1 I +X PC0/ADC123_IN10 8 -1500 -100 100 R 50 50 1 1 B +X PC1/ADC123_IN11 9 -1500 -200 100 R 50 50 1 1 B +X PC2/ADC123_IN12 10 -1500 -300 100 R 50 50 1 1 B +X SPI1_NSS/USART2_CK/DAC_OUT1/ADC12_IN4/PA4 20 1500 1200 100 L 50 50 1 1 B +X I2C2_SDA/USART3_RX/PB11 30 1500 -1200 100 L 50 50 1 1 B +X PC9/TIM8_CH4/SDIO_D1 40 -1500 -1000 100 R 50 50 1 1 B +X JTDI/SPI3_NSS/I2S3_WS/PA15 50 1500 100 100 L 50 50 1 1 B +X BOOT0 60 -1500 1500 100 R 50 50 1 1 I +X PC3/ADC123_IN13 11 -1500 -400 100 R 50 50 1 1 B +X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 21 1500 1100 100 L 50 50 1 1 B +X VSS 31 -300 -2000 100 U 50 50 1 1 W +X USART1_CK/TIM1_CH1/MCO/PA8 41 1500 800 100 L 50 50 1 1 B +X PC10/UART4_TX/SDIO_D2 51 -1500 -1100 100 R 50 50 1 1 B +X TIM4_CH3/SDIO_D4/TIM10_CH1/PB8 61 1500 -900 100 L 50 50 1 1 B +X VSSA 12 300 -2000 100 U 50 50 1 1 W +X SPI1_MISO/TIM8_BKIN/ADC12_IN6/TIM3_CH1/TIM13_CH1/PA6 22 1500 1000 100 L 50 50 1 1 B +X VDD 32 -300 2000 100 D 50 50 1 1 W +X USART1_TX/TIM1_CH2/PA9 42 1500 700 100 L 50 50 1 1 B +X PC11/UART4_RX/SDIO_D3 52 -1500 -1200 100 R 50 50 1 1 B +X TIM4_CH4/SDIO_D5/TIM11_CH1/PB9 62 1500 -1000 100 L 50 50 1 1 B +X VDDA 13 300 2000 100 D 50 50 1 1 W +X SPI1_MOSI/TIM8_CH1N/ADC12_IN7/TIM3_CH2/TIM14_CH1/PA7 23 1500 900 100 L 50 50 1 1 B +X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/PB12 33 1500 -1300 100 L 50 50 1 1 B +X USART1_RX/TIM1_CH3/PA10 43 1500 600 100 L 50 50 1 1 B +X PC12/UART5_TX/SDIO_CK 53 -1500 -1300 100 R 50 50 1 1 B +X VSS 63 0 -2000 100 U 50 50 1 1 W +X WKUP/USART2_CTS/ADC123_IN0/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/PA0 14 1500 1600 100 L 50 50 1 1 B +X PC4/ADC12_IN14 24 -1500 -500 100 R 50 50 1 1 B +X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/PB13 34 1500 -1400 100 L 50 50 1 1 B +X USART1_CTS/USBDM/CAN_RX/TIM1_CH4/PA11 44 1500 500 100 L 50 50 1 1 B +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 54 -1500 500 100 R 50 50 1 1 B +X VDD 64 0 2000 100 D 50 50 1 1 W +X USART2_RTS/ADC123_IN1/TIM5_CH2/TIM2_CH2/PA1 15 1500 1500 100 L 50 50 1 1 B +X PC5/ADC12_IN15 25 -1500 -600 100 R 50 50 1 1 B +X SPI2_MISO/TIM1_CH2N/USART3_RTS/TIM12_CH1/PB14 35 1500 -1500 100 L 50 50 1 1 B +X USART1_RTS/USBDP/CAN_TX/TIM1_ETR/PA11 45 1500 400 100 L 50 50 1 1 B +X JTDO/SPI3_SCK/I2S3_CK/PB3 55 1500 -400 100 L 50 50 1 1 B +X USART2_TX/TIM5_CH3/ADC123_IN2/TIM2_CH3/TIM9_CH1/PA2 16 1500 1400 100 L 50 50 1 1 B +X ADC12_IN8/TIM3_CH3/TIM8_CH2N/PB0 26 1500 -100 100 L 50 50 1 1 B +X SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM12_CH2/PB15 36 1500 -1600 100 L 50 50 1 1 B +X JTMS/SWDIO/PA13 46 1500 300 100 L 50 50 1 1 B +X NJTRST/SPI3_MISO/PB4 56 1500 -500 100 L 50 50 1 1 B +X USART2_RX/TIM5_CH4/ADC123_IN3/TIM2_CH4/TIM9_CH2/PA3 17 1500 1300 100 L 50 50 1 1 B +X ADC12_IN9/TIM3_CH4/TIM8_CH3N/PB1 27 1500 -200 100 L 50 50 1 1 B +X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6 37 -1500 -700 100 R 50 50 1 1 B +X VSS 47 -200 -2000 100 U 50 50 1 1 W +X I2C1_SMBA/SPI3_MOSI/I2S3_CD/PB5 57 1500 -600 100 L 50 50 1 1 B +X VSS 18 -500 -2000 100 U 50 50 1 1 W +X BOOT1/PB2 28 1500 -300 100 L 50 50 1 1 B +X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7 38 -1500 -800 100 R 50 50 1 1 B +X VDD 48 -200 2000 100 D 50 50 1 1 W +X I2C1_SCL/TIM4_CH1/PB6 58 1500 -700 100 L 50 50 1 1 B +X VDD 19 -500 2000 100 D 50 50 1 1 W +X I2C2_SCL/USART3_TX/PB10 29 1500 -1100 100 L 50 50 1 1 B +X PC8/TIM8_CH3/SDIO_D0 39 -1500 -900 100 R 50 50 1 1 B +X JTCK/SWCLK/PA14 49 1500 200 100 L 50 50 1 1 B +X I2C1_SDA/TIM4_CH2/PB7 59 1500 -800 100 L 50 50 1 1 B S -1400 1900 1400 -1900 0 1 10 f -X VBAT 1 -1550 1000 150 R 40 40 1 1 W -X PC13/TAMPER_RTC 2 -1550 300 150 R 40 40 1 1 B -X PC14/OSC32_IN 3 -1550 200 150 R 40 40 1 1 B -X PC15/OSC32_OUT 4 -1550 100 150 R 40 40 1 1 B -X PD0/OSC_IN 5 -1550 1350 150 R 40 40 1 1 B -X PD1/OSC_OUT 6 -1550 1200 150 R 40 40 1 1 B -X ~NRST 7 -1550 1700 150 R 40 40 1 1 I -X PC0/ADC123_IN10 8 -1550 -100 150 R 40 40 1 1 B -X PC1/ADC123_IN11 9 -1550 -200 150 R 40 40 1 1 B -X PC2/ADC123_IN12 10 -1550 -300 150 R 40 40 1 1 B -X SPI1_NSS/USART2_CK/DAC_OUT1/ADC12_IN4/PA4 20 1550 1200 150 L 40 40 1 1 B -X I2C2_SDA/USART3_RX/PB11 30 1550 -1200 150 L 40 40 1 1 B -X PC9/TIM8_CH4/SDIO_D1 40 -1550 -1000 150 R 40 40 1 1 B -X JTDI/SPI3_NSS/I2S3_WS/PA15 50 1550 100 150 L 40 40 1 1 B -X BOOT0 60 -1550 1550 150 R 40 40 1 1 I -X PC3/ADC123_IN13 11 -1550 -400 150 R 40 40 1 1 B -X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 21 1550 1100 150 L 40 40 1 1 B -X VSS 31 -300 -2050 150 U 40 40 1 1 W -X USART1_CK/TIM1_CH1/MCO/PA8 41 1550 800 150 L 40 40 1 1 B -X PC10/UART4_TX/SDIO_D2 51 -1550 -1100 150 R 40 40 1 1 B -X TIM4_CH3/SDIO_D4/TIM10_CH1/PB8 61 1550 -900 150 L 40 40 1 1 B -X VSSA 12 300 -2050 150 U 40 40 1 1 W -X SPI1_MISO/TIM8_BKIN/ADC12_IN6/TIM3_CH1/TIM13_CH1/PA6 22 1550 1000 150 L 40 40 1 1 B -X VDD 32 -300 2050 150 D 40 40 1 1 W -X USART1_TX/TIM1_CH2/PA9 42 1550 700 150 L 40 40 1 1 B -X PC11/UART4_RX/SDIO_D3 52 -1550 -1200 150 R 40 40 1 1 B -X TIM4_CH4/SDIO_D5/TIM11_CH1/PB9 62 1550 -1000 150 L 40 40 1 1 B -X VDDA 13 300 2050 150 D 40 40 1 1 W -X SPI1_MOSI/TIM8_CH1N/ADC12_IN7/TIM3_CH2/TIM14_CH1/PA7 23 1550 900 150 L 40 40 1 1 B -X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/PB12 33 1550 -1300 150 L 40 40 1 1 B -X USART1_RX/TIM1_CH3/PA10 43 1550 600 150 L 40 40 1 1 B -X PC12/UART5_TX/SDIO_CK 53 -1550 -1300 150 R 40 40 1 1 B -X VSS 63 0 -2050 150 U 40 40 1 1 W -X WKUP/USART2_CTS/ADC123_IN0/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/PA0 14 1550 1600 150 L 40 40 1 1 B -X PC4/ADC12_IN14 24 -1550 -500 150 R 40 40 1 1 B -X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/PB13 34 1550 -1400 150 L 40 40 1 1 B -X USART1_CTS/USBDM/CAN_RX/TIM1_CH4/PA11 44 1550 500 150 L 40 40 1 1 B -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 54 -1550 500 150 R 40 40 1 1 B -X VDD 64 0 2050 150 D 40 40 1 1 W -X USART2_RTS/ADC123_IN1/TIM5_CH2/TIM2_CH2/PA1 15 1550 1500 150 L 40 40 1 1 B -X PC5/ADC12_IN15 25 -1550 -600 150 R 40 40 1 1 B -X SPI2_MISO/TIM1_CH2N/USART3_RTS/TIM12_CH1/PB14 35 1550 -1500 150 L 40 40 1 1 B -X USART1_RTS/USBDP/CAN_TX/TIM1_ETR/PA11 45 1550 400 150 L 40 40 1 1 B -X JTDO/SPI3_SCK/I2S3_CK/PB3 55 1550 -400 150 L 40 40 1 1 B -X USART2_TX/TIM5_CH3/ADC123_IN2/TIM2_CH3/TIM9_CH1/PA2 16 1550 1400 150 L 40 40 1 1 B -X ADC12_IN8/TIM3_CH3/TIM8_CH2N/PB0 26 1550 -100 150 L 40 40 1 1 B -X SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM12_CH2/PB15 36 1550 -1600 150 L 40 40 1 1 B -X JTMS/SWDIO/PA13 46 1550 300 150 L 40 40 1 1 B -X NJTRST/SPI3_MISO/PB4 56 1550 -500 150 L 40 40 1 1 B -X USART2_RX/TIM5_CH4/ADC123_IN3/TIM2_CH4/TIM9_CH2/PA3 17 1550 1300 150 L 40 40 1 1 B -X ADC12_IN9/TIM3_CH4/TIM8_CH3N/PB1 27 1550 -200 150 L 40 40 1 1 B -X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6 37 -1550 -700 150 R 40 40 1 1 B -X VSS 47 -150 -2050 150 U 40 40 1 1 W -X I2C1_SMBA/SPI3_MOSI/I2S3_CD/PB5 57 1550 -600 150 L 40 40 1 1 B -X VSS 18 -450 -2050 150 U 40 40 1 1 W -X BOOT1/PB2 28 1550 -300 150 L 40 40 1 1 B -X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7 38 -1550 -800 150 R 40 40 1 1 B -X VDD 48 -150 2050 150 D 40 40 1 1 W -X I2C1_SCL/TIM4_CH1/PB6 58 1550 -700 150 L 40 40 1 1 B -X VDD 19 -450 2050 150 D 40 40 1 1 W -X I2C2_SCL/USART3_TX/PB10 29 1550 -1100 150 L 40 40 1 1 B -X PC8/TIM8_CH3/SDIO_D0 39 -1550 -900 150 R 40 40 1 1 B -X JTCK/SWCLK/PA14 49 1550 200 150 L 40 40 1 1 B -X I2C1_SDA/TIM4_CH2/PB7 59 1550 -800 150 L 40 40 1 1 B ENDDRAW ENDDEF # @@ -975,109 +975,109 @@ DEF STM32F103V8 U 0 40 Y Y 1 F N F0 "U" -1350 2800 50 H V C CNN F1 "STM32F103V8" 1150 -2800 50 H V C CNN F2 "LQFP100" 0 0 50 H V C CNN -F3 "~" 0 1150 60 H V C CNN +F3 "" 0 1150 50 H V C CNN ALIAS STM32F103VB DRAW +X PE2/TRACECK 1 -1500 500 100 R 50 50 1 1 B +X PE3/TRACED0 2 -1500 400 100 R 50 50 1 1 B +X PE4/TRACED1 3 -1500 300 100 R 50 50 1 1 B +X PE5/TRACED2 4 -1500 200 100 R 50 50 1 1 B +X PE6/TRACED3 5 -1500 100 100 R 50 50 1 1 B +X VBAT 6 -1500 1600 100 R 50 50 1 1 W +X TAMPER_RTC/PC13 7 1500 -2300 100 L 50 50 1 1 B +X OSC32_IN/PC14 8 1500 -2400 100 L 50 50 1 1 B +X OSC32_OUT/PC15 9 1500 -2500 100 L 50 50 1 1 B +X VSS 10 -500 -2900 150 U 50 50 1 1 W +X VREF- 20 -1500 1200 100 R 50 50 1 1 I +X SPI1_SCK/ADC12_IN5/PA5 30 1500 1900 100 L 50 50 1 1 B +X PE9 40 -1500 -200 100 R 50 50 1 1 B +X VDD 50 -200 2900 150 D 50 50 1 1 W +X PD13 60 -1500 -2300 100 R 50 50 1 1 B +X USART1_CTS/CAN_RX/USBDM/TIM1_CH4/PA11 70 1500 1300 100 L 50 50 1 1 B +X PC12 80 1500 -2200 100 L 50 50 1 1 B +X NJTRST/PB4 90 1500 300 100 L 50 50 1 1 B +X VDD 11 -500 2900 150 D 50 50 1 1 W +X VREF+ 21 -1500 1300 100 R 50 50 1 1 I +X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 31 1500 1800 100 L 50 50 1 1 B +X PE10 41 -1500 -300 100 R 50 50 1 1 B +X SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN/PB12 51 1500 -500 100 L 50 50 1 1 B +X PD14 61 -1500 -2400 100 R 50 50 1 1 B +X USART1_RTS/CAN_TX/USBDP/TIM1_ETR/PA11 71 1500 1200 100 L 50 50 1 1 B +X PD0 81 -1500 -1000 100 R 50 50 1 1 B +X I2C1_SMBA/PB5 91 1500 200 100 L 50 50 1 1 B +X OSC_IN 12 -1500 2100 100 R 50 50 1 1 I +X VDDA 22 400 2900 150 D 50 50 1 1 W +X SPI1_MOSIADC12_IN7/TIM3_CH2/PA7 32 1500 1700 100 L 50 50 1 1 B +X PE11 42 -1500 -400 100 R 50 50 1 1 B +X SPI2_SCK/USART3_CTS/TIM1_CH1N/PB13 52 1500 -600 100 L 50 50 1 1 B +X PD15 62 -1500 -2500 100 R 50 50 1 1 B +X JTMS/SWDIO/PA13 72 1500 1100 100 L 50 50 1 1 B +X PD1 82 -1500 -1100 100 R 50 50 1 1 B +X I2C1_SCL/TIM4_CH1/PB6 92 1500 100 100 L 50 50 1 1 B +X OSC_OUT 13 -1500 1900 100 R 50 50 1 1 O +X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/PA0 23 1500 2400 100 L 50 50 1 1 B +X ADC12_IN14/PC4 33 1500 -1400 100 L 50 50 1 1 B +X PE12 43 -1500 -500 100 R 50 50 1 1 B +X SPI2_MISO/USART3_RTS/TIM1_CH2N/PB14 53 1500 -700 100 L 50 50 1 1 B +X PC6 63 1500 -1600 100 L 50 50 1 1 B +X PD2/TIM3_ETR 83 -1500 -1200 100 R 50 50 1 1 B +X I2C1_SDA/TIM4_CH2/PB7 93 1500 0 100 L 50 50 1 1 B +X ~NRST 14 -1500 2500 100 R 50 50 1 1 I +X USART2_RTS/ADC12_IN1/TIM2_CH2/PA1 24 1500 2300 100 L 50 50 1 1 B +X ADC12_IN15/PC5 34 1500 -1500 100 L 50 50 1 1 B +X PE13 44 -1500 -600 100 R 50 50 1 1 B +X SPI2_MOSI/TIM1_CH3N/PB15 54 1500 -800 100 L 50 50 1 1 B +X PC7 64 1500 -1700 100 L 50 50 1 1 B +X VSS 74 0 -2900 150 U 50 50 1 1 W +X PD3 84 -1500 -1300 100 R 50 50 1 1 B +X BOOT0 94 -1500 2400 100 R 50 50 1 1 I +X ADC12_IN10/PC0 15 1500 -1000 100 L 50 50 1 1 B +X USART2_TX/ADC12_IN2/TIM2_CH3/PA2 25 1500 2200 100 L 50 50 1 1 B +X ADC12_IN8/TIM3_CH3/PB0 35 1500 700 100 L 50 50 1 1 B +X PE14 45 -1500 -700 100 R 50 50 1 1 B +X PD8 55 -1500 -1800 100 R 50 50 1 1 B +X PC8 65 1500 -1800 100 L 50 50 1 1 B +X VDD 75 0 2900 150 D 50 50 1 1 W +X PD4 85 -1500 -1400 100 R 50 50 1 1 B +X TIM4_CH3/PB8 95 1500 -100 100 L 50 50 1 1 B +X ADC12_IN11/PC1 16 1500 -1100 100 L 50 50 1 1 B +X USART2_RX/ADC12_IN3/TIM2_CH4/PA3 26 1500 2100 100 L 50 50 1 1 B +X ADC12_IN9/TIM3_CH4/PB1 36 1500 600 100 L 50 50 1 1 B +X PE15 46 -1500 -800 100 R 50 50 1 1 B +X PD9 56 -1500 -1900 100 R 50 50 1 1 B +X PC9 66 1500 -1900 100 L 50 50 1 1 B +X JTCK/SWCLK/PA14 76 1500 1000 100 L 50 50 1 1 B +X PD5 86 -1500 -1500 100 R 50 50 1 1 B +X TIM4_CH4/PB9 96 1500 -200 100 L 50 50 1 1 B +X ADC12_IN12/PC2 17 1500 -1200 100 L 50 50 1 1 B +X VSS 27 -300 -2900 150 U 50 50 1 1 W +X BOOT1/PB2 37 1500 500 100 L 50 50 1 1 B +X I2C2_SCL/USART3_TX/PB10 47 1500 -300 100 L 50 50 1 1 B +X PD10 57 -1500 -2000 100 R 50 50 1 1 B +X USART1_CK/TIM1_CH1/MCO/PA8 67 1500 1600 100 L 50 50 1 1 B +X JTDI/PA15 77 1500 900 100 L 50 50 1 1 B +X PD6 87 -1500 -1600 100 R 50 50 1 1 B +X PE0/TIM4_ETR 97 -1500 700 100 R 50 50 1 1 B +X ADC12_IN13/PC3 18 1500 -1300 100 L 50 50 1 1 B +X VDD 28 -300 2900 150 D 50 50 1 1 W +X PE7 38 -1500 0 100 R 50 50 1 1 B +X I2C2_SDA/USART3_RX/PB11 48 1500 -400 100 L 50 50 1 1 B +X PD11 58 -1500 -2100 100 R 50 50 1 1 B +X USART1_TX/TIM1_CH2/PA9 68 1500 1500 100 L 50 50 1 1 B +X PC10 78 1500 -2000 100 L 50 50 1 1 B +X PD7 88 -1500 -1700 100 R 50 50 1 1 B +X PE1 98 -1500 600 100 R 50 50 1 1 B +X VSSA 19 400 -2900 150 U 50 50 1 1 W +X SPI1_NSS/USART2_CK/ADC12_IN4/PA4 29 1500 2000 100 L 50 50 1 1 B +X PE8 39 -1500 -100 100 R 50 50 1 1 B +X VSS 49 -200 -2900 150 U 50 50 1 1 W +X PD12 59 -1500 -2200 100 R 50 50 1 1 B +X USART1_RX/TIM1_CH3/PA10 69 1500 1400 100 L 50 50 1 1 B +X PC11 79 1500 -2100 100 L 50 50 1 1 B +X JTDO/PB3 89 1500 400 100 L 50 50 1 1 B +X VSS 99 100 -2900 150 U 50 50 1 1 W +X VDD 100 100 2900 150 D 50 50 1 1 W S -1400 2750 1400 -2750 0 1 10 f -X PE2/TRACECK 1 -1550 550 150 R 40 40 1 1 B -X PE3/TRACED0 2 -1550 450 150 R 40 40 1 1 B -X PE4/TRACED1 3 -1550 350 150 R 40 40 1 1 B -X PE5/TRACED2 4 -1550 250 150 R 40 40 1 1 B -X PE6/TRACED3 5 -1550 150 150 R 40 40 1 1 B -X VBAT 6 -1550 1650 150 R 40 40 1 1 W -X TAMPER_RTC/PC13 7 1550 -2250 150 L 40 40 1 1 B -X OSC32_IN/PC14 8 1550 -2350 150 L 40 40 1 1 B -X OSC32_OUT/PC15 9 1550 -2450 150 L 40 40 1 1 B -X VSS 10 -450 -2900 150 U 40 40 1 1 W -X VREF- 20 -1550 1200 150 R 40 40 1 1 I -X SPI1_SCK/ADC12_IN5/PA5 30 1550 1950 150 L 40 40 1 1 B -X PE9 40 -1550 -150 150 R 40 40 1 1 B -X VDD 50 -150 2900 150 D 40 40 1 1 W -X PD13 60 -1550 -2250 150 R 40 40 1 1 B -X USART1_CTS/CAN_RX/USBDM/TIM1_CH4/PA11 70 1550 1350 150 L 40 40 1 1 B -X PC12 80 1550 -2150 150 L 40 40 1 1 B -X NJTRST/PB4 90 1550 350 150 L 40 40 1 1 B -X VDD 11 -450 2900 150 D 40 40 1 1 W -X VREF+ 21 -1550 1350 150 R 40 40 1 1 I -X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 31 1550 1850 150 L 40 40 1 1 B -X PE10 41 -1550 -250 150 R 40 40 1 1 B -X SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN/PB12 51 1550 -450 150 L 40 40 1 1 B -X PD14 61 -1550 -2350 150 R 40 40 1 1 B -X USART1_RTS/CAN_TX/USBDP/TIM1_ETR/PA11 71 1550 1250 150 L 40 40 1 1 B -X PD0 81 -1550 -950 150 R 40 40 1 1 B -X I2C1_SMBA/PB5 91 1550 250 150 L 40 40 1 1 B -X OSC_IN 12 -1550 2100 150 R 40 40 1 1 I -X VDDA 22 450 2900 150 D 40 40 1 1 W -X SPI1_MOSIADC12_IN7/TIM3_CH2/PA7 32 1550 1750 150 L 40 40 1 1 B -X PE11 42 -1550 -350 150 R 40 40 1 1 B -X SPI2_SCK/USART3_CTS/TIM1_CH1N/PB13 52 1550 -550 150 L 40 40 1 1 B -X PD15 62 -1550 -2450 150 R 40 40 1 1 B -X JTMS/SWDIO/PA13 72 1550 1150 150 L 40 40 1 1 B -X PD1 82 -1550 -1050 150 R 40 40 1 1 B -X I2C1_SCL/TIM4_CH1/PB6 92 1550 150 150 L 40 40 1 1 B -X OSC_OUT 13 -1550 1950 150 R 40 40 1 1 O -X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/PA0 23 1550 2450 150 L 40 40 1 1 B -X ADC12_IN14/PC4 33 1550 -1350 150 L 40 40 1 1 B -X PE12 43 -1550 -450 150 R 40 40 1 1 B -X SPI2_MISO/USART3_RTS/TIM1_CH2N/PB14 53 1550 -650 150 L 40 40 1 1 B -X PC6 63 1550 -1550 150 L 40 40 1 1 B -X PD2/TIM3_ETR 83 -1550 -1150 150 R 40 40 1 1 B -X I2C1_SDA/TIM4_CH2/PB7 93 1550 50 150 L 40 40 1 1 B -X ~NRST 14 -1550 2550 150 R 40 40 1 1 I -X USART2_RTS/ADC12_IN1/TIM2_CH2/PA1 24 1550 2350 150 L 40 40 1 1 B -X ADC12_IN15/PC5 34 1550 -1450 150 L 40 40 1 1 B -X PE13 44 -1550 -550 150 R 40 40 1 1 B -X SPI2_MOSI/TIM1_CH3N/PB15 54 1550 -750 150 L 40 40 1 1 B -X PC7 64 1550 -1650 150 L 40 40 1 1 B -X VSS 74 0 -2900 150 U 40 40 1 1 W -X PD3 84 -1550 -1250 150 R 40 40 1 1 B -X BOOT0 94 -1550 2400 150 R 40 40 1 1 I -X ADC12_IN10/PC0 15 1550 -950 150 L 40 40 1 1 B -X USART2_TX/ADC12_IN2/TIM2_CH3/PA2 25 1550 2250 150 L 40 40 1 1 B -X ADC12_IN8/TIM3_CH3/PB0 35 1550 750 150 L 40 40 1 1 B -X PE14 45 -1550 -650 150 R 40 40 1 1 B -X PD8 55 -1550 -1750 150 R 40 40 1 1 B -X PC8 65 1550 -1750 150 L 40 40 1 1 B -X VDD 75 0 2900 150 D 40 40 1 1 W -X PD4 85 -1550 -1350 150 R 40 40 1 1 B -X TIM4_CH3/PB8 95 1550 -50 150 L 40 40 1 1 B -X ADC12_IN11/PC1 16 1550 -1050 150 L 40 40 1 1 B -X USART2_RX/ADC12_IN3/TIM2_CH4/PA3 26 1550 2150 150 L 40 40 1 1 B -X ADC12_IN9/TIM3_CH4/PB1 36 1550 650 150 L 40 40 1 1 B -X PE15 46 -1550 -750 150 R 40 40 1 1 B -X PD9 56 -1550 -1850 150 R 40 40 1 1 B -X PC9 66 1550 -1850 150 L 40 40 1 1 B -X JTCK/SWCLK/PA14 76 1550 1050 150 L 40 40 1 1 B -X PD5 86 -1550 -1450 150 R 40 40 1 1 B -X TIM4_CH4/PB9 96 1550 -150 150 L 40 40 1 1 B -X ADC12_IN12/PC2 17 1550 -1150 150 L 40 40 1 1 B -X VSS 27 -300 -2900 150 U 40 40 1 1 W -X BOOT1/PB2 37 1550 550 150 L 40 40 1 1 B -X I2C2_SCL/USART3_TX/PB10 47 1550 -250 150 L 40 40 1 1 B -X PD10 57 -1550 -1950 150 R 40 40 1 1 B -X USART1_CK/TIM1_CH1/MCO/PA8 67 1550 1650 150 L 40 40 1 1 B -X JTDI/PA15 77 1550 950 150 L 40 40 1 1 B -X PD6 87 -1550 -1550 150 R 40 40 1 1 B -X PE0/TIM4_ETR 97 -1550 750 150 R 40 40 1 1 B -X ADC12_IN13/PC3 18 1550 -1250 150 L 40 40 1 1 B -X VDD 28 -300 2900 150 D 40 40 1 1 W -X PE7 38 -1550 50 150 R 40 40 1 1 B -X I2C2_SDA/USART3_RX/PB11 48 1550 -350 150 L 40 40 1 1 B -X PD11 58 -1550 -2050 150 R 40 40 1 1 B -X USART1_TX/TIM1_CH2/PA9 68 1550 1550 150 L 40 40 1 1 B -X PC10 78 1550 -1950 150 L 40 40 1 1 B -X PD7 88 -1550 -1650 150 R 40 40 1 1 B -X PE1 98 -1550 650 150 R 40 40 1 1 B -X VSSA 19 450 -2900 150 U 40 40 1 1 W -X SPI1_NSS/USART2_CK/ADC12_IN4/PA4 29 1550 2050 150 L 40 40 1 1 B -X PE8 39 -1550 -50 150 R 40 40 1 1 B -X VSS 49 -150 -2900 150 U 40 40 1 1 W -X PD12 59 -1550 -2150 150 R 40 40 1 1 B -X USART1_RX/TIM1_CH3/PA10 69 1550 1450 150 L 40 40 1 1 B -X PC11 79 1550 -2050 150 L 40 40 1 1 B -X JTDO/PB3 89 1550 450 150 L 40 40 1 1 B -X VSS 99 150 -2900 150 U 40 40 1 1 W -X VDD 100 150 2900 150 D 40 40 1 1 W ENDDRAW ENDDEF # @@ -1087,109 +1087,109 @@ DEF STM32F103VC U 0 40 Y Y 1 F N F0 "U" -1350 2800 50 H V C CNN F1 "STM32F103VC" 1150 -2800 50 H V C CNN F2 "LQFP100" 0 0 50 H V C CNN -F3 "~" 0 1150 60 H V C CNN +F3 "" 0 1150 50 H V C CNN ALIAS STM32F103VD STM32F103VE DRAW +X PE2/TRACECK/FSMC_A23 1 -1500 500 100 R 50 50 1 1 B +X PE3/TRACED0/FSMC_A19 2 -1500 400 100 R 50 50 1 1 B +X PE4/TRACED1/FSMC_A20 3 -1500 300 100 R 50 50 1 1 B +X PE5/TRACED2/FSMC_A21 4 -1500 200 100 R 50 50 1 1 B +X PE6/TRACED3/FSMC_A22 5 -1500 100 100 R 50 50 1 1 B +X VBAT 6 -1500 1600 100 R 50 50 1 1 W +X TAMPER_RTC/PC13 7 1500 -2300 100 L 50 50 1 1 B +X OSC32_IN/PC14 8 1500 -2400 100 L 50 50 1 1 B +X OSC32_OUT/PC15 9 1500 -2500 100 L 50 50 1 1 B +X VSS 10 -500 -2900 150 U 50 50 1 1 W +X VREF- 20 -1500 1200 100 R 50 50 1 1 I +X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 30 1500 1900 100 L 50 50 1 1 B +X PE9/FSMC_D6 40 -1500 -200 100 R 50 50 1 1 B +X VDD 50 -200 2900 150 D 50 50 1 1 W +X PD13/FSMC_A18 60 -1500 -2300 100 R 50 50 1 1 B +X USART1_CTS/USBDM/CAN_RX/TIM1_CH4/PA11 70 1500 1300 100 L 50 50 1 1 B +X UART5_TX/SDIO_CK/PC12 80 1500 -2200 100 L 50 50 1 1 B +X NJTRST/SPI3_MISO/PB4 90 1500 300 100 L 50 50 1 1 B +X VDD 11 -500 2900 150 D 50 50 1 1 W +X VREF+ 21 -1500 1300 100 R 50 50 1 1 I +X SPI1_MISO/TIM8_BKIN/ADC12_IN6/TIM3_CH1/PA6 31 1500 1800 100 L 50 50 1 1 B +X PE10/FSMC_D7 41 -1500 -300 100 R 50 50 1 1 B +X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/PB12 51 1500 -500 100 L 50 50 1 1 B +X PD14/FSMC_D0 61 -1500 -2400 100 R 50 50 1 1 B +X USART1_RTS/USBDP/CAN_TX/TIM1_ETR/PA11 71 1500 1200 100 L 50 50 1 1 B +X PD0/FSMC_D2 81 -1500 -1000 100 R 50 50 1 1 B +X I2C1_SMBA/SPI3_MOSI/I2S3_CD/PB5 91 1500 200 100 L 50 50 1 1 B +X OSC_IN 12 -1500 2100 100 R 50 50 1 1 I +X VDDA 22 400 2900 150 D 50 50 1 1 W +X SPI1_MOSI/TIM8_CH1N/ADC12_IN7/TIM3_CH2/PA7 32 1500 1700 100 L 50 50 1 1 B +X PE11/FSMC_D8 42 -1500 -400 100 R 50 50 1 1 B +X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/PB13 52 1500 -600 100 L 50 50 1 1 B +X PD15/FSMC_D1 62 -1500 -2500 100 R 50 50 1 1 B +X JTMS/SWDIO/PA13 72 1500 1100 100 L 50 50 1 1 B +X PD1/FSMC_D3 82 -1500 -1100 100 R 50 50 1 1 B +X I2C1_SCL/TIM4_CH1/PB6 92 1500 100 100 L 50 50 1 1 B +X OSC_OUT 13 -1500 1900 100 R 50 50 1 1 O +X WKUP/USART2_CTS/ADC123_IN0/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/PA0 23 1500 2400 100 L 50 50 1 1 B +X ADC12_IN14/PC4 33 1500 -1400 100 L 50 50 1 1 B +X PE12/FSMC_D9 43 -1500 -500 100 R 50 50 1 1 B +X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 53 1500 -700 100 L 50 50 1 1 B +X I2S2_MCK/TIM8_CH1/SDIO_D6/PC6 63 1500 -1600 100 L 50 50 1 1 B +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 83 -1500 -1200 100 R 50 50 1 1 B +X I2C1_SDA/FSMC_NADV/TIM4_CH2/PB7 93 1500 0 100 L 50 50 1 1 B +X ~NRST 14 -1500 2500 100 R 50 50 1 1 I +X USART2_RTS/ADC123_IN1/TIM5_CH2/TIM2_CH2/PA1 24 1500 2300 100 L 50 50 1 1 B +X ADC12_IN15/PC5 34 1500 -1500 100 L 50 50 1 1 B +X PE13/FSMC_D10 44 -1500 -600 100 R 50 50 1 1 B +X SPI2_MOSI/I2S2_SD/TIM1_CH3N/PB15 54 1500 -800 100 L 50 50 1 1 B +X I2S3_MCK/TIM8_CH2/SDIO_D7/PC7 64 1500 -1700 100 L 50 50 1 1 B +X VSS 74 0 -2900 150 U 50 50 1 1 W +X PD3/FSMC_CLK 84 -1500 -1300 100 R 50 50 1 1 B +X BOOT0 94 -1500 2400 100 R 50 50 1 1 I +X ADC123_IN10/PC0 15 1500 -1000 100 L 50 50 1 1 B +X USART2_TX/TIM5_CH3/ADC123_IN2/TIM2_CH3/PA2 25 1500 2200 100 L 50 50 1 1 B +X ADC12_IN8/TIM3_CH3/TIM8_CH2N/PB0 35 1500 700 100 L 50 50 1 1 B +X PE14/FSMC_D11 45 -1500 -700 100 R 50 50 1 1 B +X PD8/FSMC_D13 55 -1500 -1800 100 R 50 50 1 1 B +X TIM8_CH3/SDIO_D0/PC8 65 1500 -1800 100 L 50 50 1 1 B +X VDD 75 0 2900 150 D 50 50 1 1 W +X PD4/FSMC_NOE 85 -1500 -1400 100 R 50 50 1 1 B +X TIM4_CH3/SDIO_D4/PB8 95 1500 -100 100 L 50 50 1 1 B +X ADC123_IN11/PC1 16 1500 -1100 100 L 50 50 1 1 B +X USART2_RX/TIM5_CH4/ADC123_IN3/TIM2_CH4/PA3 26 1500 2100 100 L 50 50 1 1 B +X ADC12_IN9/TIM3_CH4/TIM8_CH3N/PB1 36 1500 600 100 L 50 50 1 1 B +X PE15/FSMC_D12 46 -1500 -800 100 R 50 50 1 1 B +X PD9/FSMC_D14 56 -1500 -1900 100 R 50 50 1 1 B +X TIM8_CH4/SDIO_D1/PC9 66 1500 -1900 100 L 50 50 1 1 B +X JTCK/SWCLK/PA14 76 1500 1000 100 L 50 50 1 1 B +X PD5/FSMC_NWE 86 -1500 -1500 100 R 50 50 1 1 B +X TIM4_CH4/SDIO_D5/PB9 96 1500 -200 100 L 50 50 1 1 B +X ADC123_IN12/PC2 17 1500 -1200 100 L 50 50 1 1 B +X VSS 27 -300 -2900 150 U 50 50 1 1 W +X BOOT1/PB2 37 1500 500 100 L 50 50 1 1 B +X I2C2_SCL/USART3_TX/PB10 47 1500 -300 100 L 50 50 1 1 B +X PD10/FSMC_D15 57 -1500 -2000 100 R 50 50 1 1 B +X USART1_CK/TIM1_CH1/MCO/PA8 67 1500 1600 100 L 50 50 1 1 B +X JTDI/SPI3_NSS/I2S3_WS/PA15 77 1500 900 100 L 50 50 1 1 B +X PD6/FSMC_NWAIT 87 -1500 -1600 100 R 50 50 1 1 B +X PE0/TIM4_ETR/FSMC_NBL0 97 -1500 700 100 R 50 50 1 1 B +X ADC123_IN13/PC3 18 1500 -1300 100 L 50 50 1 1 B +X VDD 28 -300 2900 150 D 50 50 1 1 W +X PE7/FSMC_D4 38 -1500 0 100 R 50 50 1 1 B +X I2C2_SDA/USART3_RX/PB11 48 1500 -400 100 L 50 50 1 1 B +X PD11/FSMC_A16 58 -1500 -2100 100 R 50 50 1 1 B +X USART1_TX/TIM1_CH2/PA9 68 1500 1500 100 L 50 50 1 1 B +X UART4_TX/SDIO_D2/PC10 78 1500 -2000 100 L 50 50 1 1 B +X PD7/FSMC_NE1/FSMC_NCE2 88 -1500 -1700 100 R 50 50 1 1 B +X PE1/FSMC_NBL1 98 -1500 600 100 R 50 50 1 1 B +X VSSA 19 400 -2900 150 U 50 50 1 1 W +X SPI1_NSS/USART2_CK/DAC_OUT1/ADC12_IN4/PA4 29 1500 2000 100 L 50 50 1 1 B +X PE8/FSMC_D5 39 -1500 -100 100 R 50 50 1 1 B +X VSS 49 -200 -2900 150 U 50 50 1 1 W +X PD12/FSMC_A17 59 -1500 -2200 100 R 50 50 1 1 B +X USART1_RX/TIM1_CH3/PA10 69 1500 1400 100 L 50 50 1 1 B +X UART4_RX/SDIO_D3/PC11 79 1500 -2100 100 L 50 50 1 1 B +X JTDO/SPI3_SCK/I2S3_CK/PB3 89 1500 400 100 L 50 50 1 1 B +X VSS 99 100 -2900 150 U 50 50 1 1 W +X VDD 100 100 2900 150 D 50 50 1 1 W S -1400 2750 1400 -2750 0 1 10 f -X PE2/TRACECK/FSMC_A23 1 -1550 550 150 R 40 40 1 1 B -X PE3/TRACED0/FSMC_A19 2 -1550 450 150 R 40 40 1 1 B -X PE4/TRACED1/FSMC_A20 3 -1550 350 150 R 40 40 1 1 B -X PE5/TRACED2/FSMC_A21 4 -1550 250 150 R 40 40 1 1 B -X PE6/TRACED3/FSMC_A22 5 -1550 150 150 R 40 40 1 1 B -X VBAT 6 -1550 1650 150 R 40 40 1 1 W -X TAMPER_RTC/PC13 7 1550 -2250 150 L 40 40 1 1 B -X OSC32_IN/PC14 8 1550 -2350 150 L 40 40 1 1 B -X OSC32_OUT/PC15 9 1550 -2450 150 L 40 40 1 1 B -X VSS 10 -450 -2900 150 U 40 40 1 1 W -X VREF- 20 -1550 1200 150 R 40 40 1 1 I -X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 30 1550 1950 150 L 40 40 1 1 B -X PE9/FSMC_D6 40 -1550 -150 150 R 40 40 1 1 B -X VDD 50 -150 2900 150 D 40 40 1 1 W -X PD13/FSMC_A18 60 -1550 -2250 150 R 40 40 1 1 B -X USART1_CTS/USBDM/CAN_RX/TIM1_CH4/PA11 70 1550 1350 150 L 40 40 1 1 B -X UART5_TX/SDIO_CK/PC12 80 1550 -2150 150 L 40 40 1 1 B -X NJTRST/SPI3_MISO/PB4 90 1550 350 150 L 40 40 1 1 B -X VDD 11 -450 2900 150 D 40 40 1 1 W -X VREF+ 21 -1550 1350 150 R 40 40 1 1 I -X SPI1_MISO/TIM8_BKIN/ADC12_IN6/TIM3_CH1/PA6 31 1550 1850 150 L 40 40 1 1 B -X PE10/FSMC_D7 41 -1550 -250 150 R 40 40 1 1 B -X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/PB12 51 1550 -450 150 L 40 40 1 1 B -X PD14/FSMC_D0 61 -1550 -2350 150 R 40 40 1 1 B -X USART1_RTS/USBDP/CAN_TX/TIM1_ETR/PA11 71 1550 1250 150 L 40 40 1 1 B -X PD0/FSMC_D2 81 -1550 -950 150 R 40 40 1 1 B -X I2C1_SMBA/SPI3_MOSI/I2S3_CD/PB5 91 1550 250 150 L 40 40 1 1 B -X OSC_IN 12 -1550 2100 150 R 40 40 1 1 I -X VDDA 22 450 2900 150 D 40 40 1 1 W -X SPI1_MOSI/TIM8_CH1N/ADC12_IN7/TIM3_CH2/PA7 32 1550 1750 150 L 40 40 1 1 B -X PE11/FSMC_D8 42 -1550 -350 150 R 40 40 1 1 B -X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/PB13 52 1550 -550 150 L 40 40 1 1 B -X PD15/FSMC_D1 62 -1550 -2450 150 R 40 40 1 1 B -X JTMS/SWDIO/PA13 72 1550 1150 150 L 40 40 1 1 B -X PD1/FSMC_D3 82 -1550 -1050 150 R 40 40 1 1 B -X I2C1_SCL/TIM4_CH1/PB6 92 1550 150 150 L 40 40 1 1 B -X OSC_OUT 13 -1550 1950 150 R 40 40 1 1 O -X WKUP/USART2_CTS/ADC123_IN0/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/PA0 23 1550 2450 150 L 40 40 1 1 B -X ADC12_IN14/PC4 33 1550 -1350 150 L 40 40 1 1 B -X PE12/FSMC_D9 43 -1550 -450 150 R 40 40 1 1 B -X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 53 1550 -650 150 L 40 40 1 1 B -X I2S2_MCK/TIM8_CH1/SDIO_D6/PC6 63 1550 -1550 150 L 40 40 1 1 B -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 83 -1550 -1150 150 R 40 40 1 1 B -X I2C1_SDA/FSMC_NADV/TIM4_CH2/PB7 93 1550 50 150 L 40 40 1 1 B -X ~NRST 14 -1550 2550 150 R 40 40 1 1 I -X USART2_RTS/ADC123_IN1/TIM5_CH2/TIM2_CH2/PA1 24 1550 2350 150 L 40 40 1 1 B -X ADC12_IN15/PC5 34 1550 -1450 150 L 40 40 1 1 B -X PE13/FSMC_D10 44 -1550 -550 150 R 40 40 1 1 B -X SPI2_MOSI/I2S2_SD/TIM1_CH3N/PB15 54 1550 -750 150 L 40 40 1 1 B -X I2S3_MCK/TIM8_CH2/SDIO_D7/PC7 64 1550 -1650 150 L 40 40 1 1 B -X VSS 74 0 -2900 150 U 40 40 1 1 W -X PD3/FSMC_CLK 84 -1550 -1250 150 R 40 40 1 1 B -X BOOT0 94 -1550 2400 150 R 40 40 1 1 I -X ADC123_IN10/PC0 15 1550 -950 150 L 40 40 1 1 B -X USART2_TX/TIM5_CH3/ADC123_IN2/TIM2_CH3/PA2 25 1550 2250 150 L 40 40 1 1 B -X ADC12_IN8/TIM3_CH3/TIM8_CH2N/PB0 35 1550 750 150 L 40 40 1 1 B -X PE14/FSMC_D11 45 -1550 -650 150 R 40 40 1 1 B -X PD8/FSMC_D13 55 -1550 -1750 150 R 40 40 1 1 B -X TIM8_CH3/SDIO_D0/PC8 65 1550 -1750 150 L 40 40 1 1 B -X VDD 75 0 2900 150 D 40 40 1 1 W -X PD4/FSMC_NOE 85 -1550 -1350 150 R 40 40 1 1 B -X TIM4_CH3/SDIO_D4/PB8 95 1550 -50 150 L 40 40 1 1 B -X ADC123_IN11/PC1 16 1550 -1050 150 L 40 40 1 1 B -X USART2_RX/TIM5_CH4/ADC123_IN3/TIM2_CH4/PA3 26 1550 2150 150 L 40 40 1 1 B -X ADC12_IN9/TIM3_CH4/TIM8_CH3N/PB1 36 1550 650 150 L 40 40 1 1 B -X PE15/FSMC_D12 46 -1550 -750 150 R 40 40 1 1 B -X PD9/FSMC_D14 56 -1550 -1850 150 R 40 40 1 1 B -X TIM8_CH4/SDIO_D1/PC9 66 1550 -1850 150 L 40 40 1 1 B -X JTCK/SWCLK/PA14 76 1550 1050 150 L 40 40 1 1 B -X PD5/FSMC_NWE 86 -1550 -1450 150 R 40 40 1 1 B -X TIM4_CH4/SDIO_D5/PB9 96 1550 -150 150 L 40 40 1 1 B -X ADC123_IN12/PC2 17 1550 -1150 150 L 40 40 1 1 B -X VSS 27 -300 -2900 150 U 40 40 1 1 W -X BOOT1/PB2 37 1550 550 150 L 40 40 1 1 B -X I2C2_SCL/USART3_TX/PB10 47 1550 -250 150 L 40 40 1 1 B -X PD10/FSMC_D15 57 -1550 -1950 150 R 40 40 1 1 B -X USART1_CK/TIM1_CH1/MCO/PA8 67 1550 1650 150 L 40 40 1 1 B -X JTDI/SPI3_NSS/I2S3_WS/PA15 77 1550 950 150 L 40 40 1 1 B -X PD6/FSMC_NWAIT 87 -1550 -1550 150 R 40 40 1 1 B -X PE0/TIM4_ETR/FSMC_NBL0 97 -1550 750 150 R 40 40 1 1 B -X ADC123_IN13/PC3 18 1550 -1250 150 L 40 40 1 1 B -X VDD 28 -300 2900 150 D 40 40 1 1 W -X PE7/FSMC_D4 38 -1550 50 150 R 40 40 1 1 B -X I2C2_SDA/USART3_RX/PB11 48 1550 -350 150 L 40 40 1 1 B -X PD11/FSMC_A16 58 -1550 -2050 150 R 40 40 1 1 B -X USART1_TX/TIM1_CH2/PA9 68 1550 1550 150 L 40 40 1 1 B -X UART4_TX/SDIO_D2/PC10 78 1550 -1950 150 L 40 40 1 1 B -X PD7/FSMC_NE1/FSMC_NCE2 88 -1550 -1650 150 R 40 40 1 1 B -X PE1/FSMC_NBL1 98 -1550 650 150 R 40 40 1 1 B -X VSSA 19 450 -2900 150 U 40 40 1 1 W -X SPI1_NSS/USART2_CK/DAC_OUT1/ADC12_IN4/PA4 29 1550 2050 150 L 40 40 1 1 B -X PE8/FSMC_D5 39 -1550 -50 150 R 40 40 1 1 B -X VSS 49 -150 -2900 150 U 40 40 1 1 W -X PD12/FSMC_A17 59 -1550 -2150 150 R 40 40 1 1 B -X USART1_RX/TIM1_CH3/PA10 69 1550 1450 150 L 40 40 1 1 B -X UART4_RX/SDIO_D3/PC11 79 1550 -2050 150 L 40 40 1 1 B -X JTDO/SPI3_SCK/I2S3_CK/PB3 89 1550 450 150 L 40 40 1 1 B -X VSS 99 150 -2900 150 U 40 40 1 1 W -X VDD 100 150 2900 150 D 40 40 1 1 W ENDDRAW ENDDEF # @@ -1199,552 +1199,551 @@ DEF STM32F103VF U 0 40 Y Y 1 F N F0 "U" -1350 2800 50 H V C CNN F1 "STM32F103VF" 1150 -2800 50 H V C CNN F2 "LQFP100" 0 0 50 H V C CNN -F3 "~" 0 1150 60 H V C CNN +F3 "" 0 1150 50 H V C CNN ALIAS STM32F103VG DRAW +X PE2/TRACECK/FSMC_A23 1 -1500 500 100 R 50 50 1 1 B +X PE3/TRACED0/FSMC_A19 2 -1500 400 100 R 50 50 1 1 B +X PE4/TRACED1/FSMC_A20 3 -1500 300 100 R 50 50 1 1 B +X PE5/TRACED2/FSMC_A21 4 -1500 200 100 R 50 50 1 1 B +X PE6/TRACED3/FSMC_A22 5 -1500 100 100 R 50 50 1 1 B +X VBAT 6 -1500 1600 100 R 50 50 1 1 W +X TAMPER_RTC/PC13 7 1500 -2300 100 L 50 50 1 1 B +X OSC32_IN/PC14 8 1500 -2400 100 L 50 50 1 1 B +X OSC32_OUT/PC15 9 1500 -2500 100 L 50 50 1 1 B +X VSS 10 -500 -2900 150 U 50 50 1 1 W +X VREF- 20 -1500 1200 100 R 50 50 1 1 I +X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 30 1500 1900 100 L 50 50 1 1 B +X PE9/FSMC_D6 40 -1500 -200 100 R 50 50 1 1 B +X VDD 50 -200 2900 150 D 50 50 1 1 W +X PD13/FSMC_A18 60 -1500 -2300 100 R 50 50 1 1 B +X USART1_CTS/USBDM/CAN_RX/TIM1_CH4/PA11 70 1500 1300 100 L 50 50 1 1 B +X PC12/UART5_TX/SDIO_CK/PC12 80 1500 -2200 100 L 50 50 1 1 B +X NJTRST/SPI3_MISO/PB4 90 1500 300 100 L 50 50 1 1 B +X VDD 11 -500 2900 150 D 50 50 1 1 W +X VREF+ 21 -1500 1300 100 R 50 50 1 1 I +X SPI1_MISO/TIM8_BKIN/ADC12_IN6/TIM3_CH1/TIM13_CH1/PA6 31 1500 1800 100 L 50 50 1 1 B +X PE10/FSMC_D7 41 -1500 -300 100 R 50 50 1 1 B +X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/PB12 51 1500 -500 100 L 50 50 1 1 B +X PD14/FSMC_D0 61 -1500 -2400 100 R 50 50 1 1 B +X USART1_RTS/USBDP/CAN_TX/TIM1_ETR/PA11 71 1500 1200 100 L 50 50 1 1 B +X PD0/FSMC_D2 81 -1500 -1000 100 R 50 50 1 1 B +X I2C1_SMBA/SPI3_MOSI/I2S3_CD/PB5 91 1500 200 100 L 50 50 1 1 B +X OSC_IN 12 -1500 2100 100 R 50 50 1 1 I +X VDDA 22 400 2900 150 D 50 50 1 1 W +X SPI1_MOSI/TIM8_CH1N/ADC12_IN7/TIM3_CH2/TIM14_CH1/PA7 32 1500 1700 100 L 50 50 1 1 B +X PE11/FSMC_D8 42 -1500 -400 100 R 50 50 1 1 B +X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/PB13 52 1500 -600 100 L 50 50 1 1 B +X PD15/FSMC_D1 62 -1500 -2500 100 R 50 50 1 1 B +X JTMS/SWDIO/PA13 72 1500 1100 100 L 50 50 1 1 B +X PD1/FSMC_D3 82 -1500 -1100 100 R 50 50 1 1 B +X I2C1_SCL/TIM4_CH1/PB6 92 1500 100 100 L 50 50 1 1 B +X OSC_OUT 13 -1500 1900 100 R 50 50 1 1 O +X WKUP/USART2_CTS/ADC123_IN0/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/PA0 23 1500 2400 100 L 50 50 1 1 B +X ADC12_IN14/PC4 33 1500 -1400 100 L 50 50 1 1 B +X PE12/FSMC_D9 43 -1500 -500 100 R 50 50 1 1 B +X SPI2_MISO/TIM1_CH2N/USART3_RTS/TIM12_CH1/PB14 53 1500 -700 100 L 50 50 1 1 B +X I2S2_MCK/TIM8_CH1/SDIO_D6/PC6 63 1500 -1600 100 L 50 50 1 1 B +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 83 -1500 -1200 100 R 50 50 1 1 B +X I2C1_SDA/FSMC_NADV/TIM4_CH2/PB7 93 1500 0 100 L 50 50 1 1 B +X ~NRST 14 -1500 2500 100 R 50 50 1 1 I +X USART2_RTS/ADC123_IN1/TIM5_CH2/TIM2_CH2/PA1 24 1500 2300 100 L 50 50 1 1 B +X ADC12_IN15/PC5 34 1500 -1500 100 L 50 50 1 1 B +X PE13/FSMC_D10 44 -1500 -600 100 R 50 50 1 1 B +X SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM12_CH2/PB15 54 1500 -800 100 L 50 50 1 1 B +X I2S3_MCK/TIM8_CH2/SDIO_D7/PC7 64 1500 -1700 100 L 50 50 1 1 B +X VSS 74 0 -2900 150 U 50 50 1 1 W +X PD3/FSMC_CLK 84 -1500 -1300 100 R 50 50 1 1 B +X BOOT0 94 -1500 2400 100 R 50 50 1 1 I +X ADC123_IN10/PC0 15 1500 -1000 100 L 50 50 1 1 B +X USART2_TX/TIM5_CH3/ADC123_IN2/TIM2_CH3/TIM9_CH1/PA2 25 1500 2200 100 L 50 50 1 1 B +X ADC12_IN8/TIM3_CH3/TIM8_CH2N/PB0 35 1500 700 100 L 50 50 1 1 B +X PE14/FSMC_D11 45 -1500 -700 100 R 50 50 1 1 B +X PD8/FSMC_D13 55 -1500 -1800 100 R 50 50 1 1 B +X TIM8_CH3/SDIO_D0/PC8 65 1500 -1800 100 L 50 50 1 1 B +X VDD 75 0 2900 150 D 50 50 1 1 W +X PD4/FSMC_NOE 85 -1500 -1400 100 R 50 50 1 1 B +X TIM4_CH3/SDIO_D4/TIM10_CH1/PB8 95 1500 -100 100 L 50 50 1 1 B +X ADC123_IN11/PC1 16 1500 -1100 100 L 50 50 1 1 B +X USART2_RX/TIM5_CH4/ADC123_IN3/TIM2_CH4/TIM9_CH2/PA3 26 1500 2100 100 L 50 50 1 1 B +X ADC12_IN9/TIM3_CH4/TIM8_CH3N/PB1 36 1500 600 100 L 50 50 1 1 B +X PE15/FSMC_D12 46 -1500 -800 100 R 50 50 1 1 B +X PD9/FSMC_D14 56 -1500 -1900 100 R 50 50 1 1 B +X TIM8_CH4/SDIO_D1/PC9 66 1500 -1900 100 L 50 50 1 1 B +X JTCK/SWCLK/PA14 76 1500 1000 100 L 50 50 1 1 B +X PD5/FSMC_NWE 86 -1500 -1500 100 R 50 50 1 1 B +X TIM4_CH4/SDIO_D5/TIM11_CH1/PB9 96 1500 -200 100 L 50 50 1 1 B +X ADC123_IN12/PC2 17 1500 -1200 100 L 50 50 1 1 B +X VSS 27 -300 -2900 150 U 50 50 1 1 W +X BOOT1/PB2 37 1500 500 100 L 50 50 1 1 B +X I2C2_SCL/USART3_TX/PB10 47 1500 -300 100 L 50 50 1 1 B +X PD10/FSMC_D15 57 -1500 -2000 100 R 50 50 1 1 B +X USART1_CK/TIM1_CH1/MCO/PA8 67 1500 1600 100 L 50 50 1 1 B +X JTDI/SPI3_NSS/I2S3_WS/PA15 77 1500 900 100 L 50 50 1 1 B +X PD6/FSMC_NWAIT 87 -1500 -1600 100 R 50 50 1 1 B +X PE0/TIM4_ETR/FSMC_NBL0 97 -1500 700 100 R 50 50 1 1 B +X ADC123_IN13/PC3 18 1500 -1300 100 L 50 50 1 1 B +X VDD 28 -300 2900 150 D 50 50 1 1 W +X PE7/FSMC_D4 38 -1500 0 100 R 50 50 1 1 B +X I2C2_SDA/USART3_RX/PB11 48 1500 -400 100 L 50 50 1 1 B +X PD11/FSMC_A16 58 -1500 -2100 100 R 50 50 1 1 B +X USART1_TX/TIM1_CH2/PA9 68 1500 1500 100 L 50 50 1 1 B +X UART4_TX/SDIO_D2/PC10 78 1500 -2000 100 L 50 50 1 1 B +X PD7/FSMC_NE1/FSMC_NCE2 88 -1500 -1700 100 R 50 50 1 1 B +X PE1/FSMC_NBL1 98 -1500 600 100 R 50 50 1 1 B +X VSSA 19 400 -2900 150 U 50 50 1 1 W +X SPI1_NSS/USART2_CK/DAC_OUT1/ADC12_IN4/PA4 29 1500 2000 100 L 50 50 1 1 B +X PE8/FSMC_D5 39 -1500 -100 100 R 50 50 1 1 B +X VSS 49 -200 -2900 150 U 50 50 1 1 W +X PD12/FSMC_A17 59 -1500 -2200 100 R 50 50 1 1 B +X USART1_RX/TIM1_CH3/PA10 69 1500 1400 100 L 50 50 1 1 B +X UART4_RX/SDIO_D3/PC11 79 1500 -2100 100 L 50 50 1 1 B +X JTDO/SPI3_SCK/I2S3_CK/PB3 89 1500 400 100 L 50 50 1 1 B +X VSS 99 100 -2900 150 U 50 50 1 1 W +X VDD 100 100 2900 150 D 50 50 1 1 W S -1400 2750 1400 -2750 0 1 10 f -X PE2/TRACECK/FSMC_A23 1 -1550 550 150 R 40 40 1 1 B -X PE3/TRACED0/FSMC_A19 2 -1550 450 150 R 40 40 1 1 B -X PE4/TRACED1/FSMC_A20 3 -1550 350 150 R 40 40 1 1 B -X PE5/TRACED2/FSMC_A21 4 -1550 250 150 R 40 40 1 1 B -X PE6/TRACED3/FSMC_A22 5 -1550 150 150 R 40 40 1 1 B -X VBAT 6 -1550 1650 150 R 40 40 1 1 W -X TAMPER_RTC/PC13 7 1550 -2250 150 L 40 40 1 1 B -X OSC32_IN/PC14 8 1550 -2350 150 L 40 40 1 1 B -X OSC32_OUT/PC15 9 1550 -2450 150 L 40 40 1 1 B -X VSS 10 -450 -2900 150 U 40 40 1 1 W -X VREF- 20 -1550 1200 150 R 40 40 1 1 I -X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 30 1550 1950 150 L 40 40 1 1 B -X PE9/FSMC_D6 40 -1550 -150 150 R 40 40 1 1 B -X VDD 50 -150 2900 150 D 40 40 1 1 W -X PD13/FSMC_A18 60 -1550 -2250 150 R 40 40 1 1 B -X USART1_CTS/USBDM/CAN_RX/TIM1_CH4/PA11 70 1550 1350 150 L 40 40 1 1 B -X PC12/UART5_TX/SDIO_CK/PC12 80 1550 -2150 150 L 40 40 1 1 B -X NJTRST/SPI3_MISO/PB4 90 1550 350 150 L 40 40 1 1 B -X VDD 11 -450 2900 150 D 40 40 1 1 W -X VREF+ 21 -1550 1350 150 R 40 40 1 1 I -X SPI1_MISO/TIM8_BKIN/ADC12_IN6/TIM3_CH1/TIM13_CH1/PA6 31 1550 1850 150 L 40 40 1 1 B -X PE10/FSMC_D7 41 -1550 -250 150 R 40 40 1 1 B -X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/PB12 51 1550 -450 150 L 40 40 1 1 B -X PD14/FSMC_D0 61 -1550 -2350 150 R 40 40 1 1 B -X USART1_RTS/USBDP/CAN_TX/TIM1_ETR/PA11 71 1550 1250 150 L 40 40 1 1 B -X PD0/FSMC_D2 81 -1550 -950 150 R 40 40 1 1 B -X I2C1_SMBA/SPI3_MOSI/I2S3_CD/PB5 91 1550 250 150 L 40 40 1 1 B -X OSC_IN 12 -1550 2100 150 R 40 40 1 1 I -X VDDA 22 450 2900 150 D 40 40 1 1 W -X SPI1_MOSI/TIM8_CH1N/ADC12_IN7/TIM3_CH2/TIM14_CH1/PA7 32 1550 1750 150 L 40 40 1 1 B -X PE11/FSMC_D8 42 -1550 -350 150 R 40 40 1 1 B -X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/PB13 52 1550 -550 150 L 40 40 1 1 B -X PD15/FSMC_D1 62 -1550 -2450 150 R 40 40 1 1 B -X JTMS/SWDIO/PA13 72 1550 1150 150 L 40 40 1 1 B -X PD1/FSMC_D3 82 -1550 -1050 150 R 40 40 1 1 B -X I2C1_SCL/TIM4_CH1/PB6 92 1550 150 150 L 40 40 1 1 B -X OSC_OUT 13 -1550 1950 150 R 40 40 1 1 O -X WKUP/USART2_CTS/ADC123_IN0/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/PA0 23 1550 2450 150 L 40 40 1 1 B -X ADC12_IN14/PC4 33 1550 -1350 150 L 40 40 1 1 B -X PE12/FSMC_D9 43 -1550 -450 150 R 40 40 1 1 B -X SPI2_MISO/TIM1_CH2N/USART3_RTS/TIM12_CH1/PB14 53 1550 -650 150 L 40 40 1 1 B -X I2S2_MCK/TIM8_CH1/SDIO_D6/PC6 63 1550 -1550 150 L 40 40 1 1 B -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 83 -1550 -1150 150 R 40 40 1 1 B -X I2C1_SDA/FSMC_NADV/TIM4_CH2/PB7 93 1550 50 150 L 40 40 1 1 B -X ~NRST 14 -1550 2550 150 R 40 40 1 1 I -X USART2_RTS/ADC123_IN1/TIM5_CH2/TIM2_CH2/PA1 24 1550 2350 150 L 40 40 1 1 B -X ADC12_IN15/PC5 34 1550 -1450 150 L 40 40 1 1 B -X PE13/FSMC_D10 44 -1550 -550 150 R 40 40 1 1 B -X SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM12_CH2/PB15 54 1550 -750 150 L 40 40 1 1 B -X I2S3_MCK/TIM8_CH2/SDIO_D7/PC7 64 1550 -1650 150 L 40 40 1 1 B -X VSS 74 0 -2900 150 U 40 40 1 1 W -X PD3/FSMC_CLK 84 -1550 -1250 150 R 40 40 1 1 B -X BOOT0 94 -1550 2400 150 R 40 40 1 1 I -X ADC123_IN10/PC0 15 1550 -950 150 L 40 40 1 1 B -X USART2_TX/TIM5_CH3/ADC123_IN2/TIM2_CH3/TIM9_CH1/PA2 25 1550 2250 150 L 40 40 1 1 B -X ADC12_IN8/TIM3_CH3/TIM8_CH2N/PB0 35 1550 750 150 L 40 40 1 1 B -X PE14/FSMC_D11 45 -1550 -650 150 R 40 40 1 1 B -X PD8/FSMC_D13 55 -1550 -1750 150 R 40 40 1 1 B -X TIM8_CH3/SDIO_D0/PC8 65 1550 -1750 150 L 40 40 1 1 B -X VDD 75 0 2900 150 D 40 40 1 1 W -X PD4/FSMC_NOE 85 -1550 -1350 150 R 40 40 1 1 B -X TIM4_CH3/SDIO_D4/TIM10_CH1/PB8 95 1550 -50 150 L 40 40 1 1 B -X ADC123_IN11/PC1 16 1550 -1050 150 L 40 40 1 1 B -X USART2_RX/TIM5_CH4/ADC123_IN3/TIM2_CH4/TIM9_CH2/PA3 26 1550 2150 150 L 40 40 1 1 B -X ADC12_IN9/TIM3_CH4/TIM8_CH3N/PB1 36 1550 650 150 L 40 40 1 1 B -X PE15/FSMC_D12 46 -1550 -750 150 R 40 40 1 1 B -X PD9/FSMC_D14 56 -1550 -1850 150 R 40 40 1 1 B -X TIM8_CH4/SDIO_D1/PC9 66 1550 -1850 150 L 40 40 1 1 B -X JTCK/SWCLK/PA14 76 1550 1050 150 L 40 40 1 1 B -X PD5/FSMC_NWE 86 -1550 -1450 150 R 40 40 1 1 B -X TIM4_CH4/SDIO_D5/TIM11_CH1/PB9 96 1550 -150 150 L 40 40 1 1 B -X ADC123_IN12/PC2 17 1550 -1150 150 L 40 40 1 1 B -X VSS 27 -300 -2900 150 U 40 40 1 1 W -X BOOT1/PB2 37 1550 550 150 L 40 40 1 1 B -X I2C2_SCL/USART3_TX/PB10 47 1550 -250 150 L 40 40 1 1 B -X PD10/FSMC_D15 57 -1550 -1950 150 R 40 40 1 1 B -X USART1_CK/TIM1_CH1/MCO/PA8 67 1550 1650 150 L 40 40 1 1 B -X JTDI/SPI3_NSS/I2S3_WS/PA15 77 1550 950 150 L 40 40 1 1 B -X PD6/FSMC_NWAIT 87 -1550 -1550 150 R 40 40 1 1 B -X PE0/TIM4_ETR/FSMC_NBL0 97 -1550 750 150 R 40 40 1 1 B -X ADC123_IN13/PC3 18 1550 -1250 150 L 40 40 1 1 B -X VDD 28 -300 2900 150 D 40 40 1 1 W -X PE7/FSMC_D4 38 -1550 50 150 R 40 40 1 1 B -X I2C2_SDA/USART3_RX/PB11 48 1550 -350 150 L 40 40 1 1 B -X PD11/FSMC_A16 58 -1550 -2050 150 R 40 40 1 1 B -X USART1_TX/TIM1_CH2/PA9 68 1550 1550 150 L 40 40 1 1 B -X UART4_TX/SDIO_D2/PC10 78 1550 -1950 150 L 40 40 1 1 B -X PD7/FSMC_NE1/FSMC_NCE2 88 -1550 -1650 150 R 40 40 1 1 B -X PE1/FSMC_NBL1 98 -1550 650 150 R 40 40 1 1 B -X VSSA 19 450 -2900 150 U 40 40 1 1 W -X SPI1_NSS/USART2_CK/DAC_OUT1/ADC12_IN4/PA4 29 1550 2050 150 L 40 40 1 1 B -X PE8/FSMC_D5 39 -1550 -50 150 R 40 40 1 1 B -X VSS 49 -150 -2900 150 U 40 40 1 1 W -X PD12/FSMC_A17 59 -1550 -2150 150 R 40 40 1 1 B -X USART1_RX/TIM1_CH3/PA10 69 1550 1450 150 L 40 40 1 1 B -X UART4_RX/SDIO_D3/PC11 79 1550 -2050 150 L 40 40 1 1 B -X JTDO/SPI3_SCK/I2S3_CK/PB3 89 1550 450 150 L 40 40 1 1 B -X VSS 99 150 -2900 150 U 40 40 1 1 W -X VDD 100 150 2900 150 D 40 40 1 1 W ENDDRAW ENDDEF # # STM32F105R8 # DEF STM32F105R8 U 0 40 Y Y 1 F N -F0 "U" -2000 1900 60 H V C CNN -F1 "STM32F105R8" 1750 -1900 60 H V C CNN +F0 "U" -2000 1900 50 H V C CNN +F1 "STM32F105R8" 1750 -1900 50 H V C CNN F2 "LQFP64" 50 0 50 H V C CIN -F3 "~" 0 0 60 H V C CNN +F3 "" 0 0 50 H V C CNN ALIAS STM32F105RB STM32F105RC DRAW +X VBAT 1 -2200 600 150 R 50 50 1 1 W +X PC13/TAMPER_RTC 2 -2200 -1400 150 R 50 50 1 1 B +X PC14/OSC32_IN 3 -2200 -1500 150 R 50 50 1 1 B +X PC15/OSC32_OUT 4 -2200 -1600 150 R 50 50 1 1 B +X OSC_IN 5 -2200 1100 150 R 50 50 1 1 I +X OSC_OUT 6 -2200 900 150 R 50 50 1 1 O +X ~NRST 7 -2200 1600 150 R 50 50 1 1 B +X PC0/ADC12_IN10 8 -2200 -100 150 R 50 50 1 1 B +X PC1/ADC12_IN11 9 -2200 -200 150 R 50 50 1 1 B +X PC2/ADC12_IN12 10 -2200 -300 150 R 50 50 1 1 B +X SPI1_NSS/DAC_OUT1/USART2_CK/ADC12_IN4/PA4 20 2200 1200 150 L 50 50 1 1 B +X I2C2_SDA/USART3_RX/PB11 30 2200 -1200 150 L 50 50 1 1 B +X PC9 40 -2200 -1000 150 R 50 50 1 1 B +X JTDI/SPI3_NSS/I2S3_WS/PA15 50 2200 100 150 L 50 50 1 1 B +X BOOT0 60 -2200 1400 150 R 50 50 1 1 B +X PC3/ADC12_IN13 11 -2200 -400 150 R 50 50 1 1 B +X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 21 2200 1100 150 L 50 50 1 1 B +X VSS 31 -400 -2000 150 U 50 50 1 1 W +X USART1_CK/OTG_FS_SOF/TIM1_CH1/MCO/PA8 41 2200 800 150 L 50 50 1 1 B +X PC10/UART4_TX 51 -2200 -1100 150 R 50 50 1 1 B +X TIM4_CH3/PB8 61 2200 -900 150 L 50 50 1 1 B +X VSSA 12 300 -2000 150 U 50 50 1 1 W +X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 22 2200 1000 150 L 50 50 1 1 B +X VDD 32 -400 2000 150 D 50 50 1 1 W +X USART1_TX/TIM1_CH2/OTG_FS_VBUS/PA9 42 2200 700 150 L 50 50 1 1 B +X PC11/UART4_RX 52 -2200 -1200 150 R 50 50 1 1 B +X TIM4_CH4/PB9 62 2200 -1000 150 L 50 50 1 1 B +X VDDA 13 300 2000 150 D 50 50 1 1 W +X SPI1_MOSI/ADC12_IN7/TIM3_CH2/PA7 23 2200 900 150 L 50 50 1 1 B +X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/PB12 33 2200 -1300 150 L 50 50 1 1 B +X USART1_RX/TIM1_CH3/OTG_FS_ID/PA10 43 2200 600 150 L 50 50 1 1 B +X PC12/UART5_TX 53 -2200 -1300 150 R 50 50 1 1 B +X VSS 63 -200 -2000 150 U 50 50 1 1 W +X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/TIM5_CH1/PA0 14 2200 1600 150 L 50 50 1 1 B +X PC4/ADC12_IN14 24 -2200 -500 150 R 50 50 1 1 B +X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/PB13 34 2200 -1400 150 L 50 50 1 1 B +X USART1_CTS/CAN1_RX/TIM1_CH4/OTG_FS_DM/PA11 44 2200 500 150 L 50 50 1 1 B +X PD2/TIM3_ETR/UART5_RX 54 -2200 100 150 R 50 50 1 1 B +X VDD 64 -100 2000 150 D 50 50 1 1 W +X USART2_RTS/ADC12_IN1/TIM5_CH2_/TIM2_CH2/PA1 15 2200 1500 150 L 50 50 1 1 B +X PC5/ADC12_IN15 25 -2200 -600 150 R 50 50 1 1 B +X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 35 2200 -1500 150 L 50 50 1 1 B +X USART1_RTS/OTG_FS_DP/CAN1_TX/TIM1_ETR/PA12 45 2200 400 150 L 50 50 1 1 B +X JTDO/SPI3_SCK/I2S3_CK/PB3 55 2200 -400 150 L 50 50 1 1 B +X USART2_TX/TIM5_CH3/ADC12_IN2/TIM2_CH3/PA2 16 2200 1400 150 L 50 50 1 1 B +X ADC12_IN8/TIM3_CH3/PB0 26 2200 -100 150 L 50 50 1 1 B +X SPI2_MOSI/I2S2_SD/TIM1_CH3N/PB15 36 2200 -1600 150 L 50 50 1 1 B +X JTMS/SWDIO/PA13 46 2200 300 150 L 50 50 1 1 B +X NJTRST/SPI3_MISO/PB4 56 2200 -500 150 L 50 50 1 1 B +X USART2_RX/TIM5_CH4/ADC12_IN3/TIM2_CH4/PA3 17 2200 1300 150 L 50 50 1 1 B +X ADC12_IN9/TIM3_CH4/PB1 27 2200 -200 150 L 50 50 1 1 B +X PC6/I2S2_MCK 37 -2200 -700 150 R 50 50 1 1 B +X VSS 47 -100 -2000 150 U 50 50 1 1 W +X I2C1_SMBA/SPI3_MOSI/I2S3_SD/PB5 57 2200 -600 150 L 50 50 1 1 B +X VSS 18 -500 -2000 150 U 50 50 1 1 W +X BOOT1/PB2 28 2200 -300 150 L 50 50 1 1 B +X PC7/I2S3_MCK 38 -2200 -800 150 R 50 50 1 1 B +X VDD 48 -200 2000 150 D 50 50 1 1 W +X I2C1_SCL/TIM4_CH1/PB6 58 2200 -700 150 L 50 50 1 1 B +X VDD 19 -500 2000 150 D 50 50 1 1 W +X I2C2_SCL/USART3_TX/PB10 29 2200 -1100 150 L 50 50 1 1 B +X PC8 39 -2200 -900 150 R 50 50 1 1 B +X JTCK/SWCLK/PA14 49 2200 200 150 L 50 50 1 1 B +X I2C1_SDA/TIM4_CH2/PB7 59 2200 -800 150 L 50 50 1 1 B S -2050 1850 2050 -1850 0 1 10 f -X VBAT 1 -2200 600 150 R 40 40 1 1 W -X PC13/TAMPER_RTC 2 -2200 -1400 150 R 40 40 1 1 B -X PC14/OSC32_IN 3 -2200 -1500 150 R 40 40 1 1 B -X PC15/OSC32_OUT 4 -2200 -1600 150 R 40 40 1 1 B -X OSC_IN 5 -2200 1100 150 R 40 40 1 1 I -X OSC_OUT 6 -2200 900 150 R 40 40 1 1 O -X ~NRST 7 -2200 1600 150 R 40 40 1 1 B -X PC0/ADC12_IN10 8 -2200 -100 150 R 40 40 1 1 B -X PC1/ADC12_IN11 9 -2200 -200 150 R 40 40 1 1 B -X PC2/ADC12_IN12 10 -2200 -300 150 R 40 40 1 1 B -X SPI1_NSS/DAC_OUT1/USART2_CK/ADC12_IN4/PA4 20 2200 1200 150 L 40 40 1 1 B -X I2C2_SDA/USART3_RX/PB11 30 2200 -1200 150 L 40 40 1 1 B -X PC9 40 -2200 -1000 150 R 40 40 1 1 B -X JTDI/SPI3_NSS/I2S3_WS/PA15 50 2200 100 150 L 40 40 1 1 B -X BOOT0 60 -2200 1400 150 R 40 40 1 1 B -X PC3/ADC12_IN13 11 -2200 -400 150 R 40 40 1 1 B -X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 21 2200 1100 150 L 40 40 1 1 B -X VSS 31 -350 -2000 150 U 40 40 1 1 W -X USART1_CK/OTG_FS_SOF/TIM1_CH1/MCO/PA8 41 2200 800 150 L 40 40 1 1 B -X PC10/UART4_TX 51 -2200 -1100 150 R 40 40 1 1 B -X TIM4_CH3/PB8 61 2200 -900 150 L 40 40 1 1 B -X VSSA 12 300 -2000 150 U 40 40 1 1 W -X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 22 2200 1000 150 L 40 40 1 1 B -X VDD 32 -350 2000 150 D 40 40 1 1 W -X USART1_TX/TIM1_CH2/OTG_FS_VBUS/PA9 42 2200 700 150 L 40 40 1 1 B -X PC11/UART4_RX 52 -2200 -1200 150 R 40 40 1 1 B -X TIM4_CH4/PB9 62 2200 -1000 150 L 40 40 1 1 B -X VDDA 13 300 2000 150 D 40 40 1 1 W -X SPI1_MOSI/ADC12_IN7/TIM3_CH2/PA7 23 2200 900 150 L 40 40 1 1 B -X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/PB12 33 2200 -1300 150 L 40 40 1 1 B -X USART1_RX/TIM1_CH3/OTG_FS_ID/PA10 43 2200 600 150 L 40 40 1 1 B -X PC12/UART5_TX 53 -2200 -1300 150 R 40 40 1 1 B -X VSS 63 -200 -2000 150 U 40 40 1 1 W -X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/TIM5_CH1/PA0 14 2200 1600 150 L 40 40 1 1 B -X PC4/ADC12_IN14 24 -2200 -500 150 R 40 40 1 1 B -X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/PB13 34 2200 -1400 150 L 40 40 1 1 B -X USART1_CTS/CAN1_RX/TIM1_CH4/OTG_FS_DM/PA11 44 2200 500 150 L 40 40 1 1 B -X PD2/TIM3_ETR/UART5_RX 54 -2200 100 150 R 40 40 1 1 B -X VDD 64 -50 2000 150 D 40 40 1 1 W -X USART2_RTS/ADC12_IN1/TIM5_CH2_/TIM2_CH2/PA1 15 2200 1500 150 L 40 40 1 1 B -X PC5/ADC12_IN15 25 -2200 -600 150 R 40 40 1 1 B -X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 35 2200 -1500 150 L 40 40 1 1 B -X USART1_RTS/OTG_FS_DP/CAN1_TX/TIM1_ETR/PA12 45 2200 400 150 L 40 40 1 1 B -X JTDO/SPI3_SCK/I2S3_CK/PB3 55 2200 -400 150 L 40 40 1 1 B -X USART2_TX/TIM5_CH3/ADC12_IN2/TIM2_CH3/PA2 16 2200 1400 150 L 40 40 1 1 B -X ADC12_IN8/TIM3_CH3/PB0 26 2200 -100 150 L 40 40 1 1 B -X SPI2_MOSI/I2S2_SD/TIM1_CH3N/PB15 36 2200 -1600 150 L 40 40 1 1 B -X JTMS/SWDIO/PA13 46 2200 300 150 L 40 40 1 1 B -X NJTRST/SPI3_MISO/PB4 56 2200 -500 150 L 40 40 1 1 B -X USART2_RX/TIM5_CH4/ADC12_IN3/TIM2_CH4/PA3 17 2200 1300 150 L 40 40 1 1 B -X ADC12_IN9/TIM3_CH4/PB1 27 2200 -200 150 L 40 40 1 1 B -X PC6/I2S2_MCK 37 -2200 -700 150 R 40 40 1 1 B -X VSS 47 -50 -2000 150 U 40 40 1 1 W -X I2C1_SMBA/SPI3_MOSI/I2S3_SD/PB5 57 2200 -600 150 L 40 40 1 1 B -X VSS 18 -500 -2000 150 U 40 40 1 1 W -X BOOT1/PB2 28 2200 -300 150 L 40 40 1 1 B -X PC7/I2S3_MCK 38 -2200 -800 150 R 40 40 1 1 B -X VDD 48 -200 2000 150 D 40 40 1 1 W -X I2C1_SCL/TIM4_CH1/PB6 58 2200 -700 150 L 40 40 1 1 B -X VDD 19 -500 2000 150 D 40 40 1 1 W -X I2C2_SCL/USART3_TX/PB10 29 2200 -1100 150 L 40 40 1 1 B -X PC8 39 -2200 -900 150 R 40 40 1 1 B -X JTCK/SWCLK/PA14 49 2200 200 150 L 40 40 1 1 B -X I2C1_SDA/TIM4_CH2/PB7 59 2200 -800 150 L 40 40 1 1 B ENDDRAW ENDDEF # # STM32F105V8 # DEF STM32F105V8 U 0 40 Y Y 1 F N -F0 "U" -2000 2750 60 H V C CNN -F1 "STM32F105V8" 1750 -2750 60 H V C CNN +F0 "U" -2000 2750 50 H V C CNN +F1 "STM32F105V8" 1750 -2750 50 H V C CNN F2 "LQFP100" -50 0 50 H V C CIN -F3 "~" 0 0 60 H V C CNN +F3 "" 0 0 50 H V C CNN ALIAS STM32F105VB STM32F105VC DRAW +X PE2/TRACECK 1 -2200 500 150 R 50 50 1 1 B +X PE3/TRACED0 2 -2200 400 150 R 50 50 1 1 B +X PE4/TRACED1 3 -2200 300 150 R 50 50 1 1 B +X PE5/TRACED2 4 -2200 200 150 R 50 50 1 1 B +X PE6/TRACED3 5 -2200 100 150 R 50 50 1 1 B +X VBAT 6 -2200 1600 150 R 50 50 1 1 W +X TAMPER_RTC/PC13 7 2200 -2300 150 L 50 50 1 1 B +X OSC32_IN/PC14 8 2200 -2400 150 L 50 50 1 1 B +X OSC32_OUT/PC15 9 2200 -2500 150 L 50 50 1 1 B +X VSS 10 -400 -2800 100 U 50 50 1 1 W +X VREF- 20 -2200 1100 150 R 50 50 1 1 I +X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 30 2200 1900 150 L 50 50 1 1 B +X PE9 40 -2200 -200 150 R 50 50 1 1 B +X VDD 50 -200 2800 100 D 50 50 1 1 W +X PD13 60 -2200 -2300 150 R 50 50 1 1 B +X USART1_CTS/CAN1_RX/TIM1_CH4/OTG_FS_DM/PA11 70 2200 1300 150 L 50 50 1 1 B +X UART5_TX/PC12 80 2200 -2200 150 L 50 50 1 1 B +X NJTRST/SPI3_MISO/PB4 90 2200 300 150 L 50 50 1 1 B +X VDD 11 -500 2800 100 D 50 50 1 1 W +X VREF+ 21 -2200 1300 150 R 50 50 1 1 I +X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 31 2200 1800 150 L 50 50 1 1 B +X PE10 41 -2200 -300 150 R 50 50 1 1 B +X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/PB12 51 2200 -500 150 L 50 50 1 1 B +X PD14 61 -2200 -2400 150 R 50 50 1 1 B +X USART1_RTS/OTG_FS_DP/CAN1_TX/TIM1_ETR/PA12 71 2200 1200 150 L 50 50 1 1 B +X PD0 81 -2200 -1000 150 R 50 50 1 1 B +X I2C1_SMBA/SPI3_MOSI/I2S3_SD/PB5 91 2200 200 150 L 50 50 1 1 B +X OSC_IN 12 -2200 2000 150 R 50 50 1 1 I +X VDDA 22 400 2800 100 D 50 50 1 1 W +X SPI1_MOSI/ADC12_IN7/TIM3_CH2/PA7 32 2200 1700 150 L 50 50 1 1 B +X PE11 42 -2200 -400 150 R 50 50 1 1 B +X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/PB13 52 2200 -600 150 L 50 50 1 1 B +X PD15 62 -2200 -2500 150 R 50 50 1 1 B +X JTMS/SWDIO/PA13 72 2200 1100 150 L 50 50 1 1 B +X PD1 82 -2200 -1100 150 R 50 50 1 1 B +X I2C1_SCL/TIM4_CH1/PB6 92 2200 100 150 L 50 50 1 1 B +X OSC_OUT 13 -2200 1800 150 R 50 50 1 1 O +X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/TIM5_CH1/PA0 23 2200 2400 150 L 50 50 1 1 B +X ADC12_IN14/PC4 33 2200 -1400 150 L 50 50 1 1 B +X PE12 43 -2200 -500 150 R 50 50 1 1 B +X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 53 2200 -700 150 L 50 50 1 1 B +X I2S2_MCK/PC6 63 2200 -1600 150 L 50 50 1 1 B +X PD2/TIM3_ETR/UART5_RX 83 -2200 -1200 150 R 50 50 1 1 B +X I2C1_SDA/TIM4_CH2/PB7 93 2200 0 150 L 50 50 1 1 B +X ~NRST 14 -2200 2400 150 R 50 50 1 1 B +X USART2_RTS/ADC12_IN1/TIM5_CH2_/TIM2_CH2/PA1 24 2200 2300 150 L 50 50 1 1 B +X ADC12_IN15/PC5 34 2200 -1500 150 L 50 50 1 1 B +X PE13 44 -2200 -600 150 R 50 50 1 1 B +X SPI2_MOSI/I2S2_SD/TIM1_CH3N/PB15 54 2200 -800 150 L 50 50 1 1 B +X I2S3_MCK/PC7 64 2200 -1700 150 L 50 50 1 1 B +X VSS 74 0 -2800 100 U 50 50 1 1 W +X PD3 84 -2200 -1300 150 R 50 50 1 1 B +X BOOT0 94 -2200 2300 150 R 50 50 1 1 B +X ADC12_IN10/PC0 15 2200 -1000 150 L 50 50 1 1 B +X USART2_TX/TIM5_CH3/ADC12_IN2/TIM2_CH3/PA2 25 2200 2200 150 L 50 50 1 1 B +X ADC12_IN8/TIM3_CH3/PB0 35 2200 700 150 L 50 50 1 1 B +X PE14 45 -2200 -700 150 R 50 50 1 1 B +X PD8 55 -2200 -1800 150 R 50 50 1 1 B +X PC8 65 2200 -1800 150 L 50 50 1 1 B +X VDD 75 -100 2800 100 D 50 50 1 1 W +X PD4 85 -2200 -1400 150 R 50 50 1 1 B +X TIM4_CH3/PB8 95 2200 -100 150 L 50 50 1 1 B +X ADC12_IN11/PC1 16 2200 -1100 150 L 50 50 1 1 B +X USART2_RX/TIM5_CH4/ADC12_IN3/TIM2_CH4/PA3 26 2200 2100 150 L 50 50 1 1 B +X ADC12_IN9/TIM3_CH4/PB1 36 2200 600 150 L 50 50 1 1 B +X PE15 46 -2200 -800 150 R 50 50 1 1 B +X PD9 56 -2200 -1900 150 R 50 50 1 1 B +X PC9 66 2200 -1900 150 L 50 50 1 1 B +X JTCK/SWCLK/PA14 76 2200 1000 150 L 50 50 1 1 B +X PD5 86 -2200 -1500 150 R 50 50 1 1 B +X TIM4_CH4/PB9 96 2200 -200 150 L 50 50 1 1 B +X ADC12_IN12/PC2 17 2200 -1200 150 L 50 50 1 1 B +X VSS 27 -300 -2800 100 U 50 50 1 1 W +X BOOT1/PB2 37 2200 500 150 L 50 50 1 1 B +X I2C2_SCL/USART3_TX/PB10 47 2200 -300 150 L 50 50 1 1 B +X PD10 57 -2200 -2000 150 R 50 50 1 1 B +X USART1_CK/OTG_FS_SOF/TIM1_CH1/MCO/PA8 67 2200 1600 150 L 50 50 1 1 B +X JTDI/SPI3_NSS/I2S3_WS/PA15 77 2200 900 150 L 50 50 1 1 B +X PD6 87 -2200 -1600 150 R 50 50 1 1 B +X PE0/TIM4_ETR 97 -2200 700 150 R 50 50 1 1 B +X ADC12_IN13/PC3 18 2200 -1300 150 L 50 50 1 1 B +X VDD 28 -400 2800 100 D 50 50 1 1 W +X PE7 38 -2200 0 150 R 50 50 1 1 B +X I2C2_SDA/USART3_RX/PB11 48 2200 -400 150 L 50 50 1 1 B +X PD11 58 -2200 -2100 150 R 50 50 1 1 B +X USART1_TX/TIM1_CH2/OTG_FS_VBUS/PA9 68 2200 1500 150 L 50 50 1 1 B +X UART4_TX/PC10 78 2200 -2000 150 L 50 50 1 1 B +X PD7 88 -2200 -1700 150 R 50 50 1 1 B +X PE1 98 -2200 600 150 R 50 50 1 1 B +X VSSA 19 500 -2800 100 U 50 50 1 1 W +X SPI1_NSS/DAC_OUT1/USART2_CK/ADC12_IN4/PA4 29 2200 2000 150 L 50 50 1 1 B +X PE8 39 -2200 -100 150 R 50 50 1 1 B +X VSS 49 -100 -2800 100 U 50 50 1 1 W +X PD12 59 -2200 -2200 150 R 50 50 1 1 B +X USART1_RX/TIM1_CH3/OTG_FS_ID/PA10 69 2200 1400 150 L 50 50 1 1 B +X UART4_RX/PC11 79 2200 -2100 150 L 50 50 1 1 B +X JTDO/SPI3_SCK/I2S3_CK/PB3 89 2200 400 150 L 50 50 1 1 B +X VSS 99 200 -2800 100 U 50 50 1 1 W +X VDD 100 100 2800 100 D 50 50 1 1 W S -2050 2700 2050 -2700 0 1 10 f -X PE2/TRACECK 1 -2200 550 150 R 40 40 1 1 B -X PE3/TRACED0 2 -2200 450 150 R 40 40 1 1 B -X PE4/TRACED1 3 -2200 350 150 R 40 40 1 1 B -X PE5/TRACED2 4 -2200 250 150 R 40 40 1 1 B -X PE6/TRACED3 5 -2200 150 150 R 40 40 1 1 B -X VBAT 6 -2200 1600 150 R 40 40 1 1 W -X TAMPER_RTC/PC13 7 2200 -2250 150 L 40 40 1 1 B -X OSC32_IN/PC14 8 2200 -2350 150 L 40 40 1 1 B -X OSC32_OUT/PC15 9 2200 -2450 150 L 40 40 1 1 B -X VSS 10 -400 -2850 150 U 40 40 1 1 W -X VREF- 20 -2200 1150 150 R 40 40 1 1 I -X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 30 2200 1950 150 L 40 40 1 1 B -X PE9 40 -2200 -150 150 R 40 40 1 1 B -X VDD 50 -200 2850 150 D 40 40 1 1 W -X PD13 60 -2200 -2250 150 R 40 40 1 1 B -X USART1_CTS/CAN1_RX/TIM1_CH4/OTG_FS_DM/PA11 70 2200 1350 150 L 40 40 1 1 B -X UART5_TX/PC12 80 2200 -2150 150 L 40 40 1 1 B -X NJTRST/SPI3_MISO/PB4 90 2200 350 150 L 40 40 1 1 B -X VDD 11 -500 2850 150 D 40 40 1 1 W -X VREF+ 21 -2200 1350 150 R 40 40 1 1 I -X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 31 2200 1850 150 L 40 40 1 1 B -X PE10 41 -2200 -250 150 R 40 40 1 1 B -X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/PB12 51 2200 -450 150 L 40 40 1 1 B -X PD14 61 -2200 -2350 150 R 40 40 1 1 B -X USART1_RTS/OTG_FS_DP/CAN1_TX/TIM1_ETR/PA12 71 2200 1250 150 L 40 40 1 1 B -X PD0 81 -2200 -950 150 R 40 40 1 1 B -X I2C1_SMBA/SPI3_MOSI/I2S3_SD/PB5 91 2200 250 150 L 40 40 1 1 B -X OSC_IN 12 -2200 2050 150 R 40 40 1 1 I -X VDDA 22 400 2850 150 D 40 40 1 1 W -X SPI1_MOSI/ADC12_IN7/TIM3_CH2/PA7 32 2200 1750 150 L 40 40 1 1 B -X PE11 42 -2200 -350 150 R 40 40 1 1 B -X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/PB13 52 2200 -550 150 L 40 40 1 1 B -X PD15 62 -2200 -2450 150 R 40 40 1 1 B -X JTMS/SWDIO/PA13 72 2200 1150 150 L 40 40 1 1 B -X PD1 82 -2200 -1050 150 R 40 40 1 1 B -X I2C1_SCL/TIM4_CH1/PB6 92 2200 150 150 L 40 40 1 1 B -X OSC_OUT 13 -2200 1850 150 R 40 40 1 1 O -X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/TIM5_CH1/PA0 23 2200 2450 150 L 40 40 1 1 B -X ADC12_IN14/PC4 33 2200 -1350 150 L 40 40 1 1 B -X PE12 43 -2200 -450 150 R 40 40 1 1 B -X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 53 2200 -650 150 L 40 40 1 1 B -X I2S2_MCK/PC6 63 2200 -1550 150 L 40 40 1 1 B -X PD2/TIM3_ETR/UART5_RX 83 -2200 -1150 150 R 40 40 1 1 B -X I2C1_SDA/TIM4_CH2/PB7 93 2200 50 150 L 40 40 1 1 B -X ~NRST 14 -2200 2450 150 R 40 40 1 1 B -X USART2_RTS/ADC12_IN1/TIM5_CH2_/TIM2_CH2/PA1 24 2200 2350 150 L 40 40 1 1 B -X ADC12_IN15/PC5 34 2200 -1450 150 L 40 40 1 1 B -X PE13 44 -2200 -550 150 R 40 40 1 1 B -X SPI2_MOSI/I2S2_SD/TIM1_CH3N/PB15 54 2200 -750 150 L 40 40 1 1 B -X I2S3_MCK/PC7 64 2200 -1650 150 L 40 40 1 1 B -X VSS 74 50 -2850 150 U 40 40 1 1 W -X PD3 84 -2200 -1250 150 R 40 40 1 1 B -X BOOT0 94 -2200 2300 150 R 40 40 1 1 B -X ADC12_IN10/PC0 15 2200 -950 150 L 40 40 1 1 B -X USART2_TX/TIM5_CH3/ADC12_IN2/TIM2_CH3/PA2 25 2200 2250 150 L 40 40 1 1 B -X ADC12_IN8/TIM3_CH3/PB0 35 2200 750 150 L 40 40 1 1 B -X PE14 45 -2200 -650 150 R 40 40 1 1 B -X PD8 55 -2200 -1750 150 R 40 40 1 1 B -X PC8 65 2200 -1750 150 L 40 40 1 1 B -X VDD 75 -50 2850 150 D 40 40 1 1 W -X PD4 85 -2200 -1350 150 R 40 40 1 1 B -X TIM4_CH3/PB8 95 2200 -50 150 L 40 40 1 1 B -X ADC12_IN11/PC1 16 2200 -1050 150 L 40 40 1 1 B -X USART2_RX/TIM5_CH4/ADC12_IN3/TIM2_CH4/PA3 26 2200 2150 150 L 40 40 1 1 B -X ADC12_IN9/TIM3_CH4/PB1 36 2200 650 150 L 40 40 1 1 B -X PE15 46 -2200 -750 150 R 40 40 1 1 B -X PD9 56 -2200 -1850 150 R 40 40 1 1 B -X PC9 66 2200 -1850 150 L 40 40 1 1 B -X JTCK/SWCLK/PA14 76 2200 1050 150 L 40 40 1 1 B -X PD5 86 -2200 -1450 150 R 40 40 1 1 B -X TIM4_CH4/PB9 96 2200 -150 150 L 40 40 1 1 B -X ADC12_IN12/PC2 17 2200 -1150 150 L 40 40 1 1 B -X VSS 27 -250 -2850 150 U 40 40 1 1 W -X BOOT1/PB2 37 2200 550 150 L 40 40 1 1 B -X I2C2_SCL/USART3_TX/PB10 47 2200 -250 150 L 40 40 1 1 B -X PD10 57 -2200 -1950 150 R 40 40 1 1 B -X USART1_CK/OTG_FS_SOF/TIM1_CH1/MCO/PA8 67 2200 1650 150 L 40 40 1 1 B -X JTDI/SPI3_NSS/I2S3_WS/PA15 77 2200 950 150 L 40 40 1 1 B -X PD6 87 -2200 -1550 150 R 40 40 1 1 B -X PE0/TIM4_ETR 97 -2200 750 150 R 40 40 1 1 B -X ADC12_IN13/PC3 18 2200 -1250 150 L 40 40 1 1 B -X VDD 28 -350 2850 150 D 40 40 1 1 W -X PE7 38 -2200 50 150 R 40 40 1 1 B -X I2C2_SDA/USART3_RX/PB11 48 2200 -350 150 L 40 40 1 1 B -X PD11 58 -2200 -2050 150 R 40 40 1 1 B -X USART1_TX/TIM1_CH2/OTG_FS_VBUS/PA9 68 2200 1550 150 L 40 40 1 1 B -X UART4_TX/PC10 78 2200 -1950 150 L 40 40 1 1 B -X PD7 88 -2200 -1650 150 R 40 40 1 1 B -X PE1 98 -2200 650 150 R 40 40 1 1 B -X VSSA 19 500 -2850 150 U 40 40 1 1 W -X SPI1_NSS/DAC_OUT1/USART2_CK/ADC12_IN4/PA4 29 2200 2050 150 L 40 40 1 1 B -X PE8 39 -2200 -50 150 R 40 40 1 1 B -X VSS 49 -100 -2850 150 U 40 40 1 1 W -X PD12 59 -2200 -2150 150 R 40 40 1 1 B -X USART1_RX/TIM1_CH3/OTG_FS_ID/PA10 69 2200 1450 150 L 40 40 1 1 B -X UART4_RX/PC11 79 2200 -2050 150 L 40 40 1 1 B -X JTDO/SPI3_SCK/I2S3_CK/PB3 89 2200 450 150 L 40 40 1 1 B -X VSS 99 200 -2850 150 U 40 40 1 1 W -X VDD 100 100 2850 150 D 40 40 1 1 W ENDDRAW ENDDEF # # STM32F107RB # DEF STM32F107RB U 0 40 Y Y 1 F N -F0 "U" -2000 1900 60 H V C CNN -F1 "STM32F107RB" 1750 -1900 60 H V C CNN +F0 "U" -2000 1900 50 H V C CNN +F1 "STM32F107RB" 1750 -1900 50 H V C CNN F2 "LQFP64" 50 0 50 H V C CIN -F3 "~" 0 0 60 H V C CNN +F3 "" 0 0 50 H V C CNN ALIAS STM32F107RC DRAW +X VBAT 1 -2200 600 150 R 50 50 1 1 W +X PC13/TAMPER_RTC 2 -2200 -1400 150 R 50 50 1 1 B +X PC14/OSC32_IN 3 -2200 -1500 150 R 50 50 1 1 B +X PC15/OSC32_OUT 4 -2200 -1600 150 R 50 50 1 1 B +X OSC_IN 5 -2200 1100 150 R 50 50 1 1 I +X OSC_OUT 6 -2200 900 150 R 50 50 1 1 O +X ~NRST 7 -2200 1600 150 R 50 50 1 1 B +X PC0/ADC12_IN10 8 -2200 -100 150 R 50 50 1 1 B +X PC1/ADC12_IN11/ETH_MII_MDC/ETH_RMII_MDC 9 -2200 -200 150 R 50 50 1 1 B +X PC2/ADC12_IN12/ETH_MII_TXD2 10 -2200 -300 150 R 50 50 1 1 B +X SPI1_NSS/DAC_OUT1/USART2_CK/ADC12_IN4/PA4 20 2200 1200 150 L 50 50 1 1 B +X I2C2_SDA/USART3_RX/ETH_MII_TX_EN/ETH_RMII_TX_EN/PB11 30 2200 -1200 150 L 50 50 1 1 B +X PC9 40 -2200 -1000 150 R 50 50 1 1 B +X JTDI/SPI3_NSS/I2S3_WS/PA15 50 2200 100 150 L 50 50 1 1 B +X BOOT0 60 -2200 1400 150 R 50 50 1 1 B +X PC3/ADC12_IN13/ETH_MII_TX_CLK 11 -2200 -400 150 R 50 50 1 1 B +X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 21 2200 1100 150 L 50 50 1 1 B +X VSS 31 -400 -2000 150 U 50 50 1 1 W +X USART1_CK/OTG_FS_SOF/TIM1_CH1/MCO/PA8 41 2200 800 150 L 50 50 1 1 B +X PC10/UART4_TX 51 -2200 -1100 150 R 50 50 1 1 B +X TIM4_CH3/ETH_MII_TXD3/PB8 61 2200 -900 150 L 50 50 1 1 B +X VSSA 12 300 -2000 150 U 50 50 1 1 W +X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 22 2200 1000 150 L 50 50 1 1 B +X VDD 32 -400 2000 150 D 50 50 1 1 W +X USART1_TX/TIM1_CH2/OTG_FS_VBUS/PA9 42 2200 700 150 L 50 50 1 1 B +X PC11/UART4_RX 52 -2200 -1200 150 R 50 50 1 1 B +X TIM4_CH4/PB9 62 2200 -1000 150 L 50 50 1 1 B +X VDDA 13 300 2000 150 D 50 50 1 1 W +X SPI1_MOSI/ADC12_IN7/TIM3_CH2/ETH_MII_RX_DV/ETH_RMII_CRS_DV/PA7 23 2200 900 150 L 50 50 1 1 B +X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/ETH_MII_TXD0/ETH_RMII_TXD0/PB12 33 2200 -1300 150 L 50 50 1 1 B +X USART1_RX/TIM1_CH3/OTG_FS_ID/PA10 43 2200 600 150 L 50 50 1 1 B +X PC12/UART5_TX 53 -2200 -1300 150 R 50 50 1 1 B +X VSS 63 -200 -2000 150 U 50 50 1 1 W +X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/TIM5_CH1/ETH_MII_CRS_WKUP/PA0 14 2200 1600 150 L 50 50 1 1 B +X PC4/ADC12_IN14/ETH_MII_RXD0/ETH_RMII_RXD0 24 -2200 -500 150 R 50 50 1 1 B +X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/ETH_MII_TXD1/ETH_RMII_TXD1/PB13 34 2200 -1400 150 L 50 50 1 1 B +X USART1_CTS/CAN1_RX/TIM1_CH4/OTG_FS_DM/PA11 44 2200 500 150 L 50 50 1 1 B +X PD2/TIM3_ETR/UART5_RX 54 -2200 100 150 R 50 50 1 1 B +X VDD 64 -100 2000 150 D 50 50 1 1 W +X USART2_RTS/ADC12_IN1/TIM5_CH2_/TIM2_CH2/ETH_MII_RX_CLK/ETH_RMII_REF_CLK/PA1 15 2200 1500 150 L 50 50 1 1 B +X PC5/ADC12_IN15/ETH_MII_RXD1/ETH_RMII_RXD1 25 -2200 -600 150 R 50 50 1 1 B +X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 35 2200 -1500 150 L 50 50 1 1 B +X USART1_RTS/OTG_FS_DP/CAN1_TX/TIM1_ETR/PA12 45 2200 400 150 L 50 50 1 1 B +X JTDO/SPI3_SCK/I2S3_CK/PB3 55 2200 -400 150 L 50 50 1 1 B +X USART2_TX/TIM5_CH3/ADC12_IN2/TIM2_CH3/ETH_MII_MDIO/ETH_RMII_MDIO/PA2 16 2200 1400 150 L 50 50 1 1 B +X ADC12_IN8/TIM3_CH3/ETH_MII_RXD2/PB0 26 2200 -100 150 L 50 50 1 1 B +X SPI2_MOSI/I2S2_SD/TIM1_CH3N/PB15 36 2200 -1600 150 L 50 50 1 1 B +X JTMS/SWDIO/PA13 46 2200 300 150 L 50 50 1 1 B +X NJTRST/SPI3_MISO/PB4 56 2200 -500 150 L 50 50 1 1 B +X USART2_RX/TIM5_CH4/ADC12_IN3/TIM2_CH4/ETH_MII_COL/PA3 17 2200 1300 150 L 50 50 1 1 B +X ADC12_IN9/TIM3_CH4/ETH_MII_RXD3/PB1 27 2200 -200 150 L 50 50 1 1 B +X PC6/I2S2_MCK 37 -2200 -700 150 R 50 50 1 1 B +X VSS 47 -100 -2000 150 U 50 50 1 1 W +X I2C1_SMBA/SPI3_MOSI/I2S3_SD/ETH_MII_PPS_OUT/ETH_RMII_PPS_OUT/PB5 57 2200 -600 150 L 50 50 1 1 B +X VSS 18 -500 -2000 150 U 50 50 1 1 W +X BOOT1/PB2 28 2200 -300 150 L 50 50 1 1 B +X PC7/I2S3_MCK 38 -2200 -800 150 R 50 50 1 1 B +X VDD 48 -200 2000 150 D 50 50 1 1 W +X I2C1_SCL/TIM4_CH1/PB6 58 2200 -700 150 L 50 50 1 1 B +X VDD 19 -500 2000 150 D 50 50 1 1 W +X I2C2_SCL/USART3_TX/ETH_MII_RX_ER/PB10 29 2200 -1100 150 L 50 50 1 1 B +X PC8 39 -2200 -900 150 R 50 50 1 1 B +X JTCK/SWCLK/PA14 49 2200 200 150 L 50 50 1 1 B +X I2C1_SDA/TIM4_CH2/PB7 59 2200 -800 150 L 50 50 1 1 B S -2050 1850 2050 -1850 0 1 10 f -X VBAT 1 -2200 600 150 R 40 40 1 1 W -X PC13/TAMPER_RTC 2 -2200 -1400 150 R 40 40 1 1 B -X PC14/OSC32_IN 3 -2200 -1500 150 R 40 40 1 1 B -X PC15/OSC32_OUT 4 -2200 -1600 150 R 40 40 1 1 B -X OSC_IN 5 -2200 1100 150 R 40 40 1 1 I -X OSC_OUT 6 -2200 900 150 R 40 40 1 1 O -X ~NRST 7 -2200 1600 150 R 40 40 1 1 B -X PC0/ADC12_IN10 8 -2200 -100 150 R 40 40 1 1 B -X PC1/ADC12_IN11/ETH_MII_MDC/ETH_RMII_MDC 9 -2200 -200 150 R 40 40 1 1 B -X PC2/ADC12_IN12/ETH_MII_TXD2 10 -2200 -300 150 R 40 40 1 1 B -X SPI1_NSS/DAC_OUT1/USART2_CK/ADC12_IN4/PA4 20 2200 1200 150 L 40 40 1 1 B -X I2C2_SDA/USART3_RX/ETH_MII_TX_EN/ETH_RMII_TX_EN/PB11 30 2200 -1200 150 L 40 40 1 1 B -X PC9 40 -2200 -1000 150 R 40 40 1 1 B -X JTDI/SPI3_NSS/I2S3_WS/PA15 50 2200 100 150 L 40 40 1 1 B -X BOOT0 60 -2200 1400 150 R 40 40 1 1 B -X PC3/ADC12_IN13/ETH_MII_TX_CLK 11 -2200 -400 150 R 40 40 1 1 B -X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 21 2200 1100 150 L 40 40 1 1 B -X VSS 31 -350 -2000 150 U 40 40 1 1 W -X USART1_CK/OTG_FS_SOF/TIM1_CH1/MCO/PA8 41 2200 800 150 L 40 40 1 1 B -X PC10/UART4_TX 51 -2200 -1100 150 R 40 40 1 1 B -X TIM4_CH3/ETH_MII_TXD3/PB8 61 2200 -900 150 L 40 40 1 1 B -X VSSA 12 300 -2000 150 U 40 40 1 1 W -X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 22 2200 1000 150 L 40 40 1 1 B -X VDD 32 -350 2000 150 D 40 40 1 1 W -X USART1_TX/TIM1_CH2/OTG_FS_VBUS/PA9 42 2200 700 150 L 40 40 1 1 B -X PC11/UART4_RX 52 -2200 -1200 150 R 40 40 1 1 B -X TIM4_CH4/PB9 62 2200 -1000 150 L 40 40 1 1 B -X VDDA 13 300 2000 150 D 40 40 1 1 W -X SPI1_MOSI/ADC12_IN7/TIM3_CH2/ETH_MII_RX_DV/ETH_RMII_CRS_DV/PA7 23 2200 900 150 L 40 40 1 1 B -X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/ETH_MII_TXD0/ETH_RMII_TXD0/PB12 33 2200 -1300 150 L 40 40 1 1 B -X USART1_RX/TIM1_CH3/OTG_FS_ID/PA10 43 2200 600 150 L 40 40 1 1 B -X PC12/UART5_TX 53 -2200 -1300 150 R 40 40 1 1 B -X VSS 63 -200 -2000 150 U 40 40 1 1 W -X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/TIM5_CH1/ETH_MII_CRS_WKUP/PA0 14 2200 1600 150 L 40 40 1 1 B -X PC4/ADC12_IN14/ETH_MII_RXD0/ETH_RMII_RXD0 24 -2200 -500 150 R 40 40 1 1 B -X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/ETH_MII_TXD1/ETH_RMII_TXD1/PB13 34 2200 -1400 150 L 40 40 1 1 B -X USART1_CTS/CAN1_RX/TIM1_CH4/OTG_FS_DM/PA11 44 2200 500 150 L 40 40 1 1 B -X PD2/TIM3_ETR/UART5_RX 54 -2200 100 150 R 40 40 1 1 B -X VDD 64 -50 2000 150 D 40 40 1 1 W -X USART2_RTS/ADC12_IN1/TIM5_CH2_/TIM2_CH2/ETH_MII_RX_CLK/ETH_RMII_REF_CLK/PA1 15 2200 1500 150 L 40 40 1 1 B -X PC5/ADC12_IN15/ETH_MII_RXD1/ETH_RMII_RXD1 25 -2200 -600 150 R 40 40 1 1 B -X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 35 2200 -1500 150 L 40 40 1 1 B -X USART1_RTS/OTG_FS_DP/CAN1_TX/TIM1_ETR/PA12 45 2200 400 150 L 40 40 1 1 B -X JTDO/SPI3_SCK/I2S3_CK/PB3 55 2200 -400 150 L 40 40 1 1 B -X USART2_TX/TIM5_CH3/ADC12_IN2/TIM2_CH3/ETH_MII_MDIO/ETH_RMII_MDIO/PA2 16 2200 1400 150 L 40 40 1 1 B -X ADC12_IN8/TIM3_CH3/ETH_MII_RXD2/PB0 26 2200 -100 150 L 40 40 1 1 B -X SPI2_MOSI/I2S2_SD/TIM1_CH3N/PB15 36 2200 -1600 150 L 40 40 1 1 B -X JTMS/SWDIO/PA13 46 2200 300 150 L 40 40 1 1 B -X NJTRST/SPI3_MISO/PB4 56 2200 -500 150 L 40 40 1 1 B -X USART2_RX/TIM5_CH4/ADC12_IN3/TIM2_CH4/ETH_MII_COL/PA3 17 2200 1300 150 L 40 40 1 1 B -X ADC12_IN9/TIM3_CH4/ETH_MII_RXD3/PB1 27 2200 -200 150 L 40 40 1 1 B -X PC6/I2S2_MCK 37 -2200 -700 150 R 40 40 1 1 B -X VSS 47 -50 -2000 150 U 40 40 1 1 W -X I2C1_SMBA/SPI3_MOSI/I2S3_SD/ETH_MII_PPS_OUT/ETH_RMII_PPS_OUT/PB5 57 2200 -600 150 L 40 40 1 1 B -X VSS 18 -500 -2000 150 U 40 40 1 1 W -X BOOT1/PB2 28 2200 -300 150 L 40 40 1 1 B -X PC7/I2S3_MCK 38 -2200 -800 150 R 40 40 1 1 B -X VDD 48 -200 2000 150 D 40 40 1 1 W -X I2C1_SCL/TIM4_CH1/PB6 58 2200 -700 150 L 40 40 1 1 B -X VDD 19 -500 2000 150 D 40 40 1 1 W -X I2C2_SCL/USART3_TX/ETH_MII_RX_ER/PB10 29 2200 -1100 150 L 40 40 1 1 B -X PC8 39 -2200 -900 150 R 40 40 1 1 B -X JTCK/SWCLK/PA14 49 2200 200 150 L 40 40 1 1 B -X I2C1_SDA/TIM4_CH2/PB7 59 2200 -800 150 L 40 40 1 1 B ENDDRAW ENDDEF # # STM32F107VB # DEF STM32F107VB U 0 40 Y Y 1 F N -F0 "U" -2000 2750 60 H V C CNN -F1 "STM32F107VB" 1750 -2750 60 H V C CNN +F0 "U" -2000 2750 50 H V C CNN +F1 "STM32F107VB" 1750 -2750 50 H V C CNN F2 "LQFP100" -50 0 50 H V C CIN -F3 "~" 0 0 60 H V C CNN +F3 "" 0 0 50 H V C CNN ALIAS STM32F107VC DRAW +X PE2/TRACECK 1 -2200 500 150 R 50 50 1 1 B +X PE3/TRACED0 2 -2200 400 150 R 50 50 1 1 B +X PE4/TRACED1 3 -2200 300 150 R 50 50 1 1 B +X PE5/TRACED2 4 -2200 200 150 R 50 50 1 1 B +X PE6/TRACED3 5 -2200 100 150 R 50 50 1 1 B +X VBAT 6 -2200 1600 150 R 50 50 1 1 W +X TAMPER_RTC/PC13 7 2200 -2300 150 L 50 50 1 1 B +X OSC32_IN/PC14 8 2200 -2400 150 L 50 50 1 1 B +X OSC32_OUT/PC15 9 2200 -2500 150 L 50 50 1 1 B +X VSS 10 -400 -2800 100 U 50 50 1 1 W +X VREF- 20 -2200 1100 150 R 50 50 1 1 I +X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 30 2200 1900 150 L 50 50 1 1 B +X PE9 40 -2200 -200 150 R 50 50 1 1 B +X VDD 50 -200 2800 100 D 50 50 1 1 W +X PD13 60 -2200 -2300 150 R 50 50 1 1 B +X USART1_CTS/CAN1_RX/TIM1_CH4/OTG_FS_DM/PA11 70 2200 1300 150 L 50 50 1 1 B +X UART5_TX/PC12 80 2200 -2200 150 L 50 50 1 1 B +X NJTRST/SPI3_MISO/PB4 90 2200 300 150 L 50 50 1 1 B +X VDD 11 -500 2800 100 D 50 50 1 1 W +X VREF+ 21 -2200 1300 150 R 50 50 1 1 I +X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 31 2200 1800 150 L 50 50 1 1 B +X PE10 41 -2200 -300 150 R 50 50 1 1 B +X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/ETH_MII_TXD0/ETH_RMII_TXD0/PB12 51 2200 -500 150 L 50 50 1 1 B +X PD14 61 -2200 -2400 150 R 50 50 1 1 B +X USART1_RTS/OTG_FS_DP/CAN1_TX/TIM1_ETR/PA12 71 2200 1200 150 L 50 50 1 1 B +X PD0 81 -2200 -1000 150 R 50 50 1 1 B +X I2C1_SMBA/SPI3_MOSI/I2S3_SD/ETH_RMII_PPS_OUT/PB5 91 2200 200 150 L 50 50 1 1 B +X OSC_IN 12 -2200 2000 150 R 50 50 1 1 I +X VDDA 22 400 2800 100 D 50 50 1 1 W +X SPI1_MOSI/ADC12_IN7/TIM3_CH2/ETH_MII_RX_DV/ETH_RMII_CRS_DV/PA7 32 2200 1700 150 L 50 50 1 1 B +X PE11 42 -2200 -400 150 R 50 50 1 1 B +X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/ETH_MII_TXD1/ETH_RMII_TXD1/PB13 52 2200 -600 150 L 50 50 1 1 B +X PD15 62 -2200 -2500 150 R 50 50 1 1 B +X JTMS/SWDIO/PA13 72 2200 1100 150 L 50 50 1 1 B +X PD1 82 -2200 -1100 150 R 50 50 1 1 B +X I2C1_SCL/TIM4_CH1/PB6 92 2200 100 150 L 50 50 1 1 B +X OSC_OUT 13 -2200 1800 150 R 50 50 1 1 O +X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/TIM5_CH1/ETH_MII_CRS_WKUP/PA0 23 2200 2400 150 L 50 50 1 1 B +X ETH_RMII_RXD0/ETH_MII_RXD0/ADC12_IN14/PC4 33 2200 -1400 150 L 50 50 1 1 B +X PE12 43 -2200 -500 150 R 50 50 1 1 B +X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 53 2200 -700 150 L 50 50 1 1 B +X I2S2_MCK/PC6 63 2200 -1600 150 L 50 50 1 1 B +X PD2/TIM3_ETR/UART5_RX 83 -2200 -1200 150 R 50 50 1 1 B +X I2C1_SDA/TIM4_CH2/PB7 93 2200 0 150 L 50 50 1 1 B +X ~NRST 14 -2200 2400 150 R 50 50 1 1 B +X USART2_RTS/ADC12_IN1/TIM5_CH2_/TIM2_CH2/ETH_MII_RX_CLK/ETH_RMII_REF_CLK/PA1 24 2200 2300 150 L 50 50 1 1 B +X ETH_RMII_RXD1/ETH_MII_RXD1/ADC12_IN15/PC5 34 2200 -1500 150 L 50 50 1 1 B +X PE13 44 -2200 -600 150 R 50 50 1 1 B +X SPI2_MOSI/I2S2_SD/TIM1_CH3N/PB15 54 2200 -800 150 L 50 50 1 1 B +X I2S3_MCK/PC7 64 2200 -1700 150 L 50 50 1 1 B +X VSS 74 0 -2800 100 U 50 50 1 1 W +X PD3 84 -2200 -1300 150 R 50 50 1 1 B +X BOOT0 94 -2200 2300 150 R 50 50 1 1 B +X ADC12_IN10/PC0 15 2200 -1000 150 L 50 50 1 1 B +X USART2_TX/TIM5_CH3/ADC12_IN2/TIM2_CH3/ETH_MII_MDIO/ETH_RMII_MDIO/PA2 25 2200 2200 150 L 50 50 1 1 B +X ADC12_IN8/TIM3_CH3/ETH_MII_RXD2/PB0 35 2200 700 150 L 50 50 1 1 B +X PE14 45 -2200 -700 150 R 50 50 1 1 B +X PD8 55 -2200 -1800 150 R 50 50 1 1 B +X PC8 65 2200 -1800 150 L 50 50 1 1 B +X VDD 75 -100 2800 100 D 50 50 1 1 W +X PD4 85 -2200 -1400 150 R 50 50 1 1 B +X TIM4_CH3/ETH_MII_TXD3/PB8 95 2200 -100 150 L 50 50 1 1 B +X ETH_RMII_MDC/ETH_MII_MDC/ADC12_IN11/PC1 16 2200 -1100 150 L 50 50 1 1 B +X USART2_RX/TIM5_CH4/ADC12_IN3/TIM2_CH4/ETH_MII_COL/PA3 26 2200 2100 150 L 50 50 1 1 B +X ADC12_IN9/TIM3_CH4/ETH_MII_RXD3/PB1 36 2200 600 150 L 50 50 1 1 B +X PE15 46 -2200 -800 150 R 50 50 1 1 B +X PD9 56 -2200 -1900 150 R 50 50 1 1 B +X PC9 66 2200 -1900 150 L 50 50 1 1 B +X JTCK/SWCLK/PA14 76 2200 1000 150 L 50 50 1 1 B +X PD5 86 -2200 -1500 150 R 50 50 1 1 B +X TIM4_CH4/PB9 96 2200 -200 150 L 50 50 1 1 B +X ETH_MII_TXD2/ADC12_IN12/PC2 17 2200 -1200 150 L 50 50 1 1 B +X VSS 27 -300 -2800 100 U 50 50 1 1 W +X BOOT1/PB2 37 2200 500 150 L 50 50 1 1 B +X I2C2_SCL/USART3_TX/ETH_MII_RX_ER/PB10 47 2200 -300 150 L 50 50 1 1 B +X PD10 57 -2200 -2000 150 R 50 50 1 1 B +X USART1_CK/OTG_FS_SOF/TIM1_CH1/MCO/PA8 67 2200 1600 150 L 50 50 1 1 B +X JTDI/SPI3_NSS/I2S3_WS/PA15 77 2200 900 150 L 50 50 1 1 B +X PD6 87 -2200 -1600 150 R 50 50 1 1 B +X PE0/TIM4_ETR 97 -2200 700 150 R 50 50 1 1 B +X ETH_MII_TX_CLK/ADC12_IN13/PC3 18 2200 -1300 150 L 50 50 1 1 B +X VDD 28 -400 2800 100 D 50 50 1 1 W +X PE7 38 -2200 0 150 R 50 50 1 1 B +X I2C2_SDA/USART3_RX/ETH_MII_TX_EN/ETH_RMII_TX_EN/PB11 48 2200 -400 150 L 50 50 1 1 B +X PD11 58 -2200 -2100 150 R 50 50 1 1 B +X USART1_TX/TIM1_CH2/OTG_FS_VBUS/PA9 68 2200 1500 150 L 50 50 1 1 B +X UART4_TX/PC10 78 2200 -2000 150 L 50 50 1 1 B +X PD7 88 -2200 -1700 150 R 50 50 1 1 B +X PE1 98 -2200 600 150 R 50 50 1 1 B +X VSSA 19 500 -2800 100 U 50 50 1 1 W +X SPI1_NSS/DAC_OUT1/USART2_CK/ADC12_IN4/PA4 29 2200 2000 150 L 50 50 1 1 B +X PE8 39 -2200 -100 150 R 50 50 1 1 B +X VSS 49 -100 -2800 100 U 50 50 1 1 W +X PD12 59 -2200 -2200 150 R 50 50 1 1 B +X USART1_RX/TIM1_CH3/OTG_FS_ID/PA10 69 2200 1400 150 L 50 50 1 1 B +X UART4_RX/PC11 79 2200 -2100 150 L 50 50 1 1 B +X JTDO/SPI3_SCK/I2S3_CK/PB3 89 2200 400 150 L 50 50 1 1 B +X VSS 99 200 -2800 100 U 50 50 1 1 W +X VDD 100 100 2800 100 D 50 50 1 1 W S -2050 2700 2050 -2700 0 1 10 f -X PE2/TRACECK 1 -2200 550 150 R 40 40 1 1 B -X PE3/TRACED0 2 -2200 450 150 R 40 40 1 1 B -X PE4/TRACED1 3 -2200 350 150 R 40 40 1 1 B -X PE5/TRACED2 4 -2200 250 150 R 40 40 1 1 B -X PE6/TRACED3 5 -2200 150 150 R 40 40 1 1 B -X VBAT 6 -2200 1600 150 R 40 40 1 1 W -X TAMPER_RTC/PC13 7 2200 -2250 150 L 40 40 1 1 B -X OSC32_IN/PC14 8 2200 -2350 150 L 40 40 1 1 B -X OSC32_OUT/PC15 9 2200 -2450 150 L 40 40 1 1 B -X VSS 10 -400 -2850 150 U 40 40 1 1 W -X VREF- 20 -2200 1150 150 R 40 40 1 1 I -X SPI1_SCK/DAC_OUT2/ADC12_IN5/PA5 30 2200 1950 150 L 40 40 1 1 B -X PE9 40 -2200 -150 150 R 40 40 1 1 B -X VDD 50 -200 2850 150 D 40 40 1 1 W -X PD13 60 -2200 -2250 150 R 40 40 1 1 B -X USART1_CTS/CAN1_RX/TIM1_CH4/OTG_FS_DM/PA11 70 2200 1350 150 L 40 40 1 1 B -X UART5_TX/PC12 80 2200 -2150 150 L 40 40 1 1 B -X NJTRST/SPI3_MISO/PB4 90 2200 350 150 L 40 40 1 1 B -X VDD 11 -500 2850 150 D 40 40 1 1 W -X VREF+ 21 -2200 1350 150 R 40 40 1 1 I -X SPI1_MISO/ADC12_IN6/TIM3_CH1/PA6 31 2200 1850 150 L 40 40 1 1 B -X PE10 41 -2200 -250 150 R 40 40 1 1 B -X SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/ETH_MII_TXD0/ETH_RMII_TXD0/PB12 51 2200 -450 150 L 40 40 1 1 B -X PD14 61 -2200 -2350 150 R 40 40 1 1 B -X USART1_RTS/OTG_FS_DP/CAN1_TX/TIM1_ETR/PA12 71 2200 1250 150 L 40 40 1 1 B -X PD0 81 -2200 -950 150 R 40 40 1 1 B -X I2C1_SMBA/SPI3_MOSI/I2S3_SD/ETH_RMII_PPS_OUT/PB5 91 2200 250 150 L 40 40 1 1 B -X OSC_IN 12 -2200 2050 150 R 40 40 1 1 I -X VDDA 22 400 2850 150 D 40 40 1 1 W -X SPI1_MOSI/ADC12_IN7/TIM3_CH2/ETH_MII_RX_DV/ETH_RMII_CRS_DV/PA7 32 2200 1750 150 L 40 40 1 1 B -X PE11 42 -2200 -350 150 R 40 40 1 1 B -X SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/ETH_MII_TXD1/ETH_RMII_TXD1/PB13 52 2200 -550 150 L 40 40 1 1 B -X PD15 62 -2200 -2450 150 R 40 40 1 1 B -X JTMS/SWDIO/PA13 72 2200 1150 150 L 40 40 1 1 B -X PD1 82 -2200 -1050 150 R 40 40 1 1 B -X I2C1_SCL/TIM4_CH1/PB6 92 2200 150 150 L 40 40 1 1 B -X OSC_OUT 13 -2200 1850 150 R 40 40 1 1 O -X WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/TIM5_CH1/ETH_MII_CRS_WKUP/PA0 23 2200 2450 150 L 40 40 1 1 B -X ETH_RMII_RXD0/ETH_MII_RXD0/ADC12_IN14/PC4 33 2200 -1350 150 L 40 40 1 1 B -X PE12 43 -2200 -450 150 R 40 40 1 1 B -X SPI2_MISO/TIM1_CH2N/USART3_RTS/PB14 53 2200 -650 150 L 40 40 1 1 B -X I2S2_MCK/PC6 63 2200 -1550 150 L 40 40 1 1 B -X PD2/TIM3_ETR/UART5_RX 83 -2200 -1150 150 R 40 40 1 1 B -X I2C1_SDA/TIM4_CH2/PB7 93 2200 50 150 L 40 40 1 1 B -X ~NRST 14 -2200 2450 150 R 40 40 1 1 B -X USART2_RTS/ADC12_IN1/TIM5_CH2_/TIM2_CH2/ETH_MII_RX_CLK/ETH_RMII_REF_CLK/PA1 24 2200 2350 150 L 40 40 1 1 B -X ETH_RMII_RXD1/ETH_MII_RXD1/ADC12_IN15/PC5 34 2200 -1450 150 L 40 40 1 1 B -X PE13 44 -2200 -550 150 R 40 40 1 1 B -X SPI2_MOSI/I2S2_SD/TIM1_CH3N/PB15 54 2200 -750 150 L 40 40 1 1 B -X I2S3_MCK/PC7 64 2200 -1650 150 L 40 40 1 1 B -X VSS 74 50 -2850 150 U 40 40 1 1 W -X PD3 84 -2200 -1250 150 R 40 40 1 1 B -X BOOT0 94 -2200 2300 150 R 40 40 1 1 B -X ADC12_IN10/PC0 15 2200 -950 150 L 40 40 1 1 B -X USART2_TX/TIM5_CH3/ADC12_IN2/TIM2_CH3/ETH_MII_MDIO/ETH_RMII_MDIO/PA2 25 2200 2250 150 L 40 40 1 1 B -X ADC12_IN8/TIM3_CH3/ETH_MII_RXD2/PB0 35 2200 750 150 L 40 40 1 1 B -X PE14 45 -2200 -650 150 R 40 40 1 1 B -X PD8 55 -2200 -1750 150 R 40 40 1 1 B -X PC8 65 2200 -1750 150 L 40 40 1 1 B -X VDD 75 -50 2850 150 D 40 40 1 1 W -X PD4 85 -2200 -1350 150 R 40 40 1 1 B -X TIM4_CH3/ETH_MII_TXD3/PB8 95 2200 -50 150 L 40 40 1 1 B -X ETH_RMII_MDC/ETH_MII_MDC/ADC12_IN11/PC1 16 2200 -1050 150 L 40 40 1 1 B -X USART2_RX/TIM5_CH4/ADC12_IN3/TIM2_CH4/ETH_MII_COL/PA3 26 2200 2150 150 L 40 40 1 1 B -X ADC12_IN9/TIM3_CH4/ETH_MII_RXD3/PB1 36 2200 650 150 L 40 40 1 1 B -X PE15 46 -2200 -750 150 R 40 40 1 1 B -X PD9 56 -2200 -1850 150 R 40 40 1 1 B -X PC9 66 2200 -1850 150 L 40 40 1 1 B -X JTCK/SWCLK/PA14 76 2200 1050 150 L 40 40 1 1 B -X PD5 86 -2200 -1450 150 R 40 40 1 1 B -X TIM4_CH4/PB9 96 2200 -150 150 L 40 40 1 1 B -X ETH_MII_TXD2/ADC12_IN12/PC2 17 2200 -1150 150 L 40 40 1 1 B -X VSS 27 -250 -2850 150 U 40 40 1 1 W -X BOOT1/PB2 37 2200 550 150 L 40 40 1 1 B -X I2C2_SCL/USART3_TX/ETH_MII_RX_ER/PB10 47 2200 -250 150 L 40 40 1 1 B -X PD10 57 -2200 -1950 150 R 40 40 1 1 B -X USART1_CK/OTG_FS_SOF/TIM1_CH1/MCO/PA8 67 2200 1650 150 L 40 40 1 1 B -X JTDI/SPI3_NSS/I2S3_WS/PA15 77 2200 950 150 L 40 40 1 1 B -X PD6 87 -2200 -1550 150 R 40 40 1 1 B -X PE0/TIM4_ETR 97 -2200 750 150 R 40 40 1 1 B -X ETH_MII_TX_CLK/ADC12_IN13/PC3 18 2200 -1250 150 L 40 40 1 1 B -X VDD 28 -350 2850 150 D 40 40 1 1 W -X PE7 38 -2200 50 150 R 40 40 1 1 B -X I2C2_SDA/USART3_RX/ETH_MII_TX_EN/ETH_RMII_TX_EN/PB11 48 2200 -350 150 L 40 40 1 1 B -X PD11 58 -2200 -2050 150 R 40 40 1 1 B -X USART1_TX/TIM1_CH2/OTG_FS_VBUS/PA9 68 2200 1550 150 L 40 40 1 1 B -X UART4_TX/PC10 78 2200 -1950 150 L 40 40 1 1 B -X PD7 88 -2200 -1650 150 R 40 40 1 1 B -X PE1 98 -2200 650 150 R 40 40 1 1 B -X VSSA 19 500 -2850 150 U 40 40 1 1 W -X SPI1_NSS/DAC_OUT1/USART2_CK/ADC12_IN4/PA4 29 2200 2050 150 L 40 40 1 1 B -X PE8 39 -2200 -50 150 R 40 40 1 1 B -X VSS 49 -100 -2850 150 U 40 40 1 1 W -X PD12 59 -2200 -2150 150 R 40 40 1 1 B -X USART1_RX/TIM1_CH3/OTG_FS_ID/PA10 69 2200 1450 150 L 40 40 1 1 B -X UART4_RX/PC11 79 2200 -2050 150 L 40 40 1 1 B -X JTDO/SPI3_SCK/I2S3_CK/PB3 89 2200 450 150 L 40 40 1 1 B -X VSS 99 200 -2850 150 U 40 40 1 1 W -X VDD 100 100 2850 150 D 40 40 1 1 W ENDDRAW ENDDEF # # STM32F405R # DEF STM32F405R U 0 40 Y Y 1 F N -F0 "U" 100 -550 60 H V C CNN -F1 "STM32F405R" 100 -450 60 H V C CNN -F2 "TQFP64" 100 -650 60 H V C CNN -F3 "~" 100 -550 60 H V C CNN +F0 "U" 100 -550 50 H V C CNN +F1 "STM32F405R" 100 -450 50 H V C CNN +F2 "TQFP64" 100 -650 50 H V C CNN +F3 "" 100 -550 50 H V C CNN $FPLIST LQFP64 $ENDFPLIST DRAW -S -3300 -2100 3100 2000 0 1 0 f X VBAT 1 1000 2300 300 D 50 50 1 1 I X PC13 2 3400 -1500 300 L 50 50 1 1 I X PC14/OSC32_IN 3 3400 -1600 300 L 50 50 1 1 I X PC15/OSC32_OUT 4 3400 -1700 300 L 50 50 1 1 I -X PH0/OSC_IN 5 -3600 1150 300 R 50 50 1 1 I -X PH1/OSC_OUT 6 -3600 550 300 R 50 50 1 1 I -X NRST 7 -3600 1350 300 R 50 50 1 1 I +X PH0/OSC_IN 5 -3600 1100 300 R 50 50 1 1 I +X PH1/OSC_OUT 6 -3600 500 300 R 50 50 1 1 I +X NRST 7 -3600 1300 300 R 50 50 1 1 I X PC0/OTG_HS_ULPI_STP 8 3400 -200 300 L 50 50 1 1 I X PC1 9 3400 -300 300 L 50 50 1 1 I X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/I2S2ext_SD 10 3400 -400 300 L 50 50 1 1 I -X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/OTG_HS_SOF/I2S3_WS 20 -3600 -650 300 R 50 50 1 1 I +X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/OTG_HS_SOF/I2S3_WS 20 -3600 -700 300 R 50 50 1 1 I X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/TIM2_CH4 30 3400 500 300 L 50 50 1 1 I X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/TIM3_CH4 40 3400 -1100 300 L 50 50 1 1 I -X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS 50 -3600 -1750 300 R 50 50 1 1 I -X BOOT0 60 -3600 1550 300 R 50 50 1 1 I +X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS 50 -3600 -1800 300 R 50 50 1 1 I +X BOOT0 60 -3600 1500 300 R 50 50 1 1 I X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT 11 3400 -500 300 L 50 50 1 1 I -X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN 21 -3600 -750 300 R 50 50 1 1 I +X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN 21 -3600 -800 300 R 50 50 1 1 I X VCAP_1 31 300 -2400 300 U 50 50 1 1 I -X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF 41 -3600 -1050 300 R 50 50 1 1 I +X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF 41 -3600 -1100 300 R 50 50 1 1 I X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/USART3_TX 51 3400 -1200 300 L 50 50 1 1 I X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/I2C1_SCL/CAN1_RX 61 3400 800 300 L 50 50 1 1 I X VSSA 12 -1000 -2400 300 U 50 50 1 1 I -X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/TIM3_CH1/TIM1_BKIN 22 -3600 -850 300 R 50 50 1 1 I +X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/TIM3_CH1/TIM1_BKIN 22 -3600 -900 300 R 50 50 1 1 I X VDD 32 -100 2300 300 D 50 50 1 1 I -X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA 42 -3600 -1150 300 R 50 50 1 1 I +X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA 42 -3600 -1200 300 R 50 50 1 1 I X PC11/UART4_RX/SPI3_MISO/SDIO_D3/USART3_RX/I2S3ext_SD 52 3400 -1300 300 L 50 50 1 1 I X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/I2C1_SDA/CAN1_TX 62 3400 700 300 L 50 50 1 1 I X VDDA 13 -900 2300 300 D 50 50 1 1 I -X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/TIM1_CH1N 23 -3600 -950 300 R 50 50 1 1 I +X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/TIM1_CH1N 23 -3600 -1000 300 R 50 50 1 1 I X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/OTG_HS_ID 33 3400 400 300 L 50 50 1 1 I -X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID 43 -3600 -1250 300 R 50 50 1 1 I +X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID 43 -3600 -1300 300 R 50 50 1 1 I X PC12/UART5_TX/SDIO_CK/SPI3_MOSI/I2S3_SD/USART3_CK 53 3400 -1400 300 L 50 50 1 1 I X VSS 63 -600 -2400 300 U 50 50 1 1 I -X PA0/WKUP/USART2_CTS/UART4_TX/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR 14 -3600 -250 300 R 50 50 1 1 I +X PA0/WKUP/USART2_CTS/UART4_TX/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR 14 -3600 -300 300 R 50 50 1 1 I X PC4 24 3400 -600 300 L 50 50 1 1 I X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6 34 3400 300 300 L 50 50 1 1 I -X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM 44 -3600 -1350 300 R 50 50 1 1 I -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 54 -3600 150 300 R 50 50 1 1 I +X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM 44 -3600 -1400 300 R 50 50 1 1 I +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 54 -3600 100 300 R 50 50 1 1 I X VDD 64 500 2300 300 D 50 50 1 1 I -X PA1/USART2_RTS/UART4_RX/TIM5_CH2/TIMM2_CH2 15 -3600 -350 300 R 50 50 1 1 I +X PA1/USART2_RTS/UART4_RX/TIM5_CH2/TIMM2_CH2 15 -3600 -400 300 R 50 50 1 1 I X PC5 25 3400 -700 300 L 50 50 1 1 I X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD 35 3400 200 300 L 50 50 1 1 I -X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP 45 -3600 -1450 300 R 50 50 1 1 I +X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP 45 -3600 -1500 300 R 50 50 1 1 I X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK 55 3400 1300 300 L 50 50 1 1 I -X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3 16 -3600 -450 300 R 50 50 1 1 I +X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3 16 -3600 -500 300 R 50 50 1 1 I X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/TIM1_CH2N 26 3400 1600 300 L 50 50 1 1 I X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP 36 3400 100 300 L 50 50 1 1 I -X PA13/JTMS/SWDIO 46 -3600 -1550 300 R 50 50 1 1 I +X PA13/JTMS/SWDIO 46 -3600 -1600 300 R 50 50 1 1 I X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD 56 3400 1200 300 L 50 50 1 1 I -X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0 17 -3600 -550 300 R 50 50 1 1 I +X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0 17 -3600 -600 300 R 50 50 1 1 I X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/OTG_HS_INTN/TIM1_CH3N 27 3400 1500 300 L 50 50 1 1 I X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/TIM3_CH1 37 3400 -800 300 L 50 50 1 1 I X VCAP_2 47 800 -2400 300 U 50 50 1 1 I @@ -1757,680 +1756,681 @@ X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/USART1_TX 58 3400 1000 300 L 50 50 1 1 I X VDD 19 -400 2300 300 D 50 50 1 1 I X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/TIM2_CH3 29 3400 600 300 L 50 50 1 1 I X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK 39 3400 -1000 300 L 50 50 1 1 I -X PA14/JTCK/SWCLK 49 -3600 -1650 300 R 50 50 1 1 I +X PA14/JTCK/SWCLK 49 -3600 -1700 300 R 50 50 1 1 I X PB7/I2C1_SDA/FSMC_NL/USART1_RX/TIM4_CH2 59 3400 900 300 L 50 50 1 1 I +S -3300 -2100 3100 2000 0 1 0 f ENDDRAW ENDDEF # # STM32F405VG # DEF STM32F405VG U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "STM32F405VG" 0 100 60 H V C CNN -F2 "TQFP100" 0 -100 60 H V C CNN -F3 "~" 0 0 60 H V C CNN +F0 "U" 0 0 50 H V C CNN +F1 "STM32F405VG" 0 100 50 H V C CNN +F2 "TQFP100" 0 -100 50 H V C CNN +F3 "" 0 0 50 H V C CNN DRAW -S -4700 -2700 4700 2700 0 1 0 f -X PE2/TRACECLK/FSMC_A23/EVENTOUT 1 5000 2350 300 L 50 50 1 1 I -X PE3/TRACED0/FSMC_A19/EVENTOUT 2 5000 2250 300 L 50 50 1 1 I -X PE4/TRACED1/FSMC_A20/EVENTOUT 3 5000 2150 300 L 50 50 1 1 I -X PE5/TRACED2/FSMC_A21/TIM9_CH1/EVENTOUT 4 5000 2050 300 L 50 50 1 1 I -X PE6/TRACED3_/_FSMC_A22/TIM9_CH2/EVENTOUT 5 5000 1950 300 L 50 50 1 1 I -X VBAT 6 1250 3000 300 D 50 50 1 1 I -X PC13/EVENTOUT 7 5000 -2350 300 L 50 50 1 1 I -X PC14/OSC32_IN/EVENTOUT 8 5000 -2450 300 L 50 50 1 1 I -X PC15/OSC32_OUT/EVENTOUT 9 5000 -2550 300 L 50 50 1 1 I +X PE2/TRACECLK/FSMC_A23/EVENTOUT 1 5000 2300 300 L 50 50 1 1 I +X PE3/TRACED0/FSMC_A19/EVENTOUT 2 5000 2200 300 L 50 50 1 1 I +X PE4/TRACED1/FSMC_A20/EVENTOUT 3 5000 2100 300 L 50 50 1 1 I +X PE5/TRACED2/FSMC_A21/TIM9_CH1/EVENTOUT 4 5000 2000 300 L 50 50 1 1 I +X PE6/TRACED3_/_FSMC_A22/TIM9_CH2/EVENTOUT 5 5000 1900 300 L 50 50 1 1 I +X VBAT 6 1200 3000 300 D 50 50 1 1 I +X PC13/EVENTOUT 7 5000 -2400 300 L 50 50 1 1 I +X PC14/OSC32_IN/EVENTOUT 8 5000 -2500 300 L 50 50 1 1 I +X PC15/OSC32_OUT/EVENTOUT 9 5000 -2600 300 L 50 50 1 1 I X VSS 10 -200 -3000 300 U 50 50 1 1 I X VSSA 20 -400 -3000 300 U 50 50 1 1 I -X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 30 -5000 250 300 R 50 50 1 1 I -X PE9/FSMC_D6/TIM1_CH1/EVENTOUT 40 5000 1650 300 L 50 50 1 1 I -X VDD 50 150 3000 300 D 50 50 1 1 I -X PD13/FSMC_A18/TIM4_CH2/EVENTOUT 60 5000 -550 300 L 50 50 1 1 I -X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 70 -5000 -350 300 R 50 50 1 1 I -X PC12/UART5_TX/SDIO_CK/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 80 5000 -2250 300 L 50 50 1 1 I -X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 90 -5000 -1450 300 R 50 50 1 1 I -X VDD 11 -750 3000 300 D 50 50 1 1 I -X VREF+ 21 -2250 3000 300 D 50 50 1 1 I -X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/TIM3_CH1/TIM1_BKIN/EVENTOUT 31 -5000 150 300 R 50 50 1 1 I -X PE10/FSMC_D7/TIM1_CH2N/EVENTOUT 41 5000 1550 300 L 50 50 1 1 I -X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/OTG_HS_ID/EVENTOUT 51 -5000 -2250 300 R 50 50 1 1 I -X PD14/FSMC_D0/TIM4_CH3/EVENTOUT/_EVENTOUT 61 5000 -650 300 L 50 50 1 1 I -X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 71 -5000 -450 300 R 50 50 1 1 I -X PD0/FSMC_D2/CAN1_RX/EVENTOUT 81 5000 750 300 L 50 50 1 1 I -X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/I2S3_SD/EVENTOUT 91 -5000 -1550 300 R 50 50 1 1 I -X PH0/OSC_IN/EVENTOUT 12 -5000 2150 300 R 50 50 1 1 I -X VDDA 22 -1750 3000 300 D 50 50 1 1 I -X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/TIM1_CH1N/EVENTOUT 32 -5000 50 300 R 50 50 1 1 I -X PE11/FSMC_D8/TIM1_CH2/EVENTOUT 42 5000 1450 300 L 50 50 1 1 I -X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/EVENTOUT 52 -5000 -2350 300 R 50 50 1 1 I -X PD15/FSMC_D1/TIM4_CH4/EVENTOUT 62 5000 -750 300 L 50 50 1 1 I -X PA13/JTMS/SWDIO/EVENTOUT 72 -5000 -550 300 R 50 50 1 1 I -X PD1/FSMC_D3/CAN1_TX/EVENTOUT 82 5000 650 300 L 50 50 1 1 I -X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/USART1_TX/EVENTOUT 92 -5000 -1650 300 R 50 50 1 1 I -X PH1/OSC_OUT/EVENTOUT 13 -5000 1550 300 R 50 50 1 1 I -X PA0/WKUP/USART2_CTS/UART4_TX/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 23 -5000 750 300 R 50 50 1 1 I -X PC4/EVENTOUT 33 5000 -1450 300 L 50 50 1 1 I -X PE12/FSMC_D9/TIM1_CH3N/EVENTOUT 43 5000 1350 300 L 50 50 1 1 I -X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 53 -5000 -2450 300 R 50 50 1 1 I -X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/TIM3_CH1/EVENTOUT 63 5000 -1650 300 L 50 50 1 1 I +X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 30 -5000 200 300 R 50 50 1 1 I +X PE9/FSMC_D6/TIM1_CH1/EVENTOUT 40 5000 1600 300 L 50 50 1 1 I +X VDD 50 100 3000 300 D 50 50 1 1 I +X PD13/FSMC_A18/TIM4_CH2/EVENTOUT 60 5000 -600 300 L 50 50 1 1 I +X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 70 -5000 -400 300 R 50 50 1 1 I +X PC12/UART5_TX/SDIO_CK/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 80 5000 -2300 300 L 50 50 1 1 I +X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 90 -5000 -1500 300 R 50 50 1 1 I +X VDD 11 -800 3000 300 D 50 50 1 1 I +X VREF+ 21 -2300 3000 300 D 50 50 1 1 I +X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/TIM3_CH1/TIM1_BKIN/EVENTOUT 31 -5000 100 300 R 50 50 1 1 I +X PE10/FSMC_D7/TIM1_CH2N/EVENTOUT 41 5000 1500 300 L 50 50 1 1 I +X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/OTG_HS_ID/EVENTOUT 51 -5000 -2300 300 R 50 50 1 1 I +X PD14/FSMC_D0/TIM4_CH3/EVENTOUT/_EVENTOUT 61 5000 -700 300 L 50 50 1 1 I +X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 71 -5000 -500 300 R 50 50 1 1 I +X PD0/FSMC_D2/CAN1_RX/EVENTOUT 81 5000 700 300 L 50 50 1 1 I +X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/I2S3_SD/EVENTOUT 91 -5000 -1600 300 R 50 50 1 1 I +X PH0/OSC_IN/EVENTOUT 12 -5000 2100 300 R 50 50 1 1 I +X VDDA 22 -1800 3000 300 D 50 50 1 1 I +X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/TIM1_CH1N/EVENTOUT 32 -5000 0 300 R 50 50 1 1 I +X PE11/FSMC_D8/TIM1_CH2/EVENTOUT 42 5000 1400 300 L 50 50 1 1 I +X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/EVENTOUT 52 -5000 -2400 300 R 50 50 1 1 I +X PD15/FSMC_D1/TIM4_CH4/EVENTOUT 62 5000 -800 300 L 50 50 1 1 I +X PA13/JTMS/SWDIO/EVENTOUT 72 -5000 -600 300 R 50 50 1 1 I +X PD1/FSMC_D3/CAN1_TX/EVENTOUT 82 5000 600 300 L 50 50 1 1 I +X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/USART1_TX/EVENTOUT 92 -5000 -1700 300 R 50 50 1 1 I +X PH1/OSC_OUT/EVENTOUT 13 -5000 1500 300 R 50 50 1 1 I +X PA0/WKUP/USART2_CTS/UART4_TX/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 23 -5000 700 300 R 50 50 1 1 I +X PC4/EVENTOUT 33 5000 -1500 300 L 50 50 1 1 I +X PE12/FSMC_D9/TIM1_CH3N/EVENTOUT 43 5000 1300 300 L 50 50 1 1 I +X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 53 -5000 -2500 300 R 50 50 1 1 I +X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/TIM3_CH1/EVENTOUT 63 5000 -1700 300 L 50 50 1 1 I X VCAP_2 73 1400 -3000 300 U 50 50 1 1 I -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/EVENTOUT 83 5000 550 300 L 50 50 1 1 I -X PB7/I2C1_SDA/FSMC_NL/USART1_RX/TIM4_CH2/EVENTOUT 93 -5000 -1750 300 R 50 50 1 1 I -X NRST 14 -5000 2350 300 R 50 50 1 1 I -X PA1/USART2_RTS/UART4_RX/TIM5_CH2/TIMM2_CH2/EVENTOUT 24 -5000 650 300 R 50 50 1 1 I -X PC5/EVENTOUT 34 5000 -1550 300 L 50 50 1 1 I -X PE13/FSMC_D10/TIM1_CH3/EVENTOUT 44 5000 1250 300 L 50 50 1 1 I -X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 54 -5000 -2550 300 R 50 50 1 1 I -X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/TIM3_CH2/EVENTOUT 64 5000 -1750 300 L 50 50 1 1 I +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/EVENTOUT 83 5000 500 300 L 50 50 1 1 I +X PB7/I2C1_SDA/FSMC_NL/USART1_RX/TIM4_CH2/EVENTOUT 93 -5000 -1800 300 R 50 50 1 1 I +X NRST 14 -5000 2300 300 R 50 50 1 1 I +X PA1/USART2_RTS/UART4_RX/TIM5_CH2/TIMM2_CH2/EVENTOUT 24 -5000 600 300 R 50 50 1 1 I +X PC5/EVENTOUT 34 5000 -1600 300 L 50 50 1 1 I +X PE13/FSMC_D10/TIM1_CH3/EVENTOUT 44 5000 1200 300 L 50 50 1 1 I +X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 54 -5000 -2600 300 R 50 50 1 1 I +X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/TIM3_CH2/EVENTOUT 64 5000 -1800 300 L 50 50 1 1 I X VSS 74 200 -3000 300 U 50 50 1 1 I -X PD3/FSMC_CLK/USART2_CTS/EVENTOUT 84 5000 450 300 L 50 50 1 1 I -X BOOT0 94 -5000 2550 300 R 50 50 1 1 I -X PC0/OTG_HS_ULPI_STP/EVENTOUT 15 5000 -1050 300 L 50 50 1 1 I -X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/EVENTOUT 25 -5000 550 300 R 50 50 1 1 I -X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/TIM1_CH2N/EVENTOUT 35 -5000 -1050 300 R 50 50 1 1 I -X PE14/FSMC_D11/TIM1_CH4/EVENTOUT 45 5000 1150 300 L 50 50 1 1 I -X PD8/FSMC_D13/USART3_TX/EVENTOUT 55 5000 -50 300 L 50 50 1 1 I -X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/EVENTOUT 65 5000 -1850 300 L 50 50 1 1 I -X VDD 75 450 3000 300 D 50 50 1 1 I -X PD4/FSMC_NOE/USART2_RTS/EVENTOUT 85 5000 350 300 L 50 50 1 1 I -X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/I2C1_SCL/CAN1_RX/EVENTOUT 95 -5000 -1850 300 R 50 50 1 1 I -X PC1/_EVENTOUT 16 5000 -1150 300 L 50 50 1 1 I -X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/EVENTOUT 26 -5000 450 300 R 50 50 1 1 I -X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 36 -5000 -1150 300 R 50 50 1 1 I -X PE15/FSMC_D12/TIM1_BKIN/EVENTOUT 46 5000 1050 300 L 50 50 1 1 I -X PD9/FSMC_D14/USART3_RX/EVENTOUT 56 5000 -150 300 L 50 50 1 1 I -X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/TIM3_CH4/EVENTOUT 66 5000 -1950 300 L 50 50 1 1 I -X PA14/JTCK/SWCLK/EVENTOUT 76 -5000 -650 300 R 50 50 1 1 I -X PD5/FSMC_NWE/USART2_TX/EVENTOUT 86 5000 250 300 L 50 50 1 1 I -X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/I2C1_SDA/CAN1_TX/EVENTOUT 96 -5000 -1950 300 R 50 50 1 1 I -X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/I2S2ext_SD/EVENTOUT 17 5000 -1250 300 L 50 50 1 1 I +X PD3/FSMC_CLK/USART2_CTS/EVENTOUT 84 5000 400 300 L 50 50 1 1 I +X BOOT0 94 -5000 2500 300 R 50 50 1 1 I +X PC0/OTG_HS_ULPI_STP/EVENTOUT 15 5000 -1100 300 L 50 50 1 1 I +X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/EVENTOUT 25 -5000 500 300 R 50 50 1 1 I +X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/TIM1_CH2N/EVENTOUT 35 -5000 -1100 300 R 50 50 1 1 I +X PE14/FSMC_D11/TIM1_CH4/EVENTOUT 45 5000 1100 300 L 50 50 1 1 I +X PD8/FSMC_D13/USART3_TX/EVENTOUT 55 5000 -100 300 L 50 50 1 1 I +X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/EVENTOUT 65 5000 -1900 300 L 50 50 1 1 I +X VDD 75 400 3000 300 D 50 50 1 1 I +X PD4/FSMC_NOE/USART2_RTS/EVENTOUT 85 5000 300 300 L 50 50 1 1 I +X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/I2C1_SCL/CAN1_RX/EVENTOUT 95 -5000 -1900 300 R 50 50 1 1 I +X PC1/_EVENTOUT 16 5000 -1200 300 L 50 50 1 1 I +X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/EVENTOUT 26 -5000 400 300 R 50 50 1 1 I +X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 36 -5000 -1200 300 R 50 50 1 1 I +X PE15/FSMC_D12/TIM1_BKIN/EVENTOUT 46 5000 1000 300 L 50 50 1 1 I +X PD9/FSMC_D14/USART3_RX/EVENTOUT 56 5000 -200 300 L 50 50 1 1 I +X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/TIM3_CH4/EVENTOUT 66 5000 -2000 300 L 50 50 1 1 I +X PA14/JTCK/SWCLK/EVENTOUT 76 -5000 -700 300 R 50 50 1 1 I +X PD5/FSMC_NWE/USART2_TX/EVENTOUT 86 5000 200 300 L 50 50 1 1 I +X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/I2C1_SDA/CAN1_TX/EVENTOUT 96 -5000 -2000 300 R 50 50 1 1 I +X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/I2S2ext_SD/EVENTOUT 17 5000 -1300 300 L 50 50 1 1 I X VSS 27 0 -3000 300 U 50 50 1 1 I -X PB2/BOOT1/EVENTOUT 37 -5000 -1250 300 R 50 50 1 1 I -X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/TIM2_CH3/EVENTOUT 47 -5000 -2050 300 R 50 50 1 1 I -X PD10/FSMC_D15/USART3_CK/EVENTOUT 57 5000 -250 300 L 50 50 1 1 I -X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 67 -5000 -50 300 R 50 50 1 1 I -X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 77 -5000 -750 300 R 50 50 1 1 I -X PD6/FSMC_NWAIT/USART2_RX/EVENTOUT 87 5000 150 300 L 50 50 1 1 I -X PE0/TIM4_ETR/FSMC_NBL0/EVENTOUT 97 5000 2550 300 L 50 50 1 1 I -X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/EVENTOUT 18 5000 -1350 300 L 50 50 1 1 I -X VDD 28 -150 3000 300 D 50 50 1 1 I -X PE7/FSMC_D4/TIM1_ETR/EVENTOUT 38 5000 1850 300 L 50 50 1 1 I -X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/TIM2_CH4/EVENTOUT 48 -5000 -2150 300 R 50 50 1 1 I -X PD11/FSMC_CLE/FSMC_A16/USART3_CTS/EVENTOUT 58 5000 -350 300 L 50 50 1 1 I -X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/EVENTOUT 68 -5000 -150 300 R 50 50 1 1 I -X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/USART3_TX/EVENTOUT 78 5000 -2050 300 L 50 50 1 1 I -X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2/EVENTOUT 88 5000 50 300 L 50 50 1 1 I -X PE1/FSMC_NBL1/EVENTOUT 98 5000 2450 300 L 50 50 1 1 I -X VDD 19 -450 3000 300 D 50 50 1 1 I -X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/OTG_HS_SOF/I2S3_WS/EVENTOUT 29 -5000 350 300 R 50 50 1 1 I -X PE8/FSMC_D5/TIM1_CH1N/EVENTOUT 39 5000 1750 300 L 50 50 1 1 I +X PB2/BOOT1/EVENTOUT 37 -5000 -1300 300 R 50 50 1 1 I +X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/TIM2_CH3/EVENTOUT 47 -5000 -2100 300 R 50 50 1 1 I +X PD10/FSMC_D15/USART3_CK/EVENTOUT 57 5000 -300 300 L 50 50 1 1 I +X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 67 -5000 -100 300 R 50 50 1 1 I +X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 77 -5000 -800 300 R 50 50 1 1 I +X PD6/FSMC_NWAIT/USART2_RX/EVENTOUT 87 5000 100 300 L 50 50 1 1 I +X PE0/TIM4_ETR/FSMC_NBL0/EVENTOUT 97 5000 2500 300 L 50 50 1 1 I +X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/EVENTOUT 18 5000 -1400 300 L 50 50 1 1 I +X VDD 28 -200 3000 300 D 50 50 1 1 I +X PE7/FSMC_D4/TIM1_ETR/EVENTOUT 38 5000 1800 300 L 50 50 1 1 I +X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/TIM2_CH4/EVENTOUT 48 -5000 -2200 300 R 50 50 1 1 I +X PD11/FSMC_CLE/FSMC_A16/USART3_CTS/EVENTOUT 58 5000 -400 300 L 50 50 1 1 I +X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/EVENTOUT 68 -5000 -200 300 R 50 50 1 1 I +X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/USART3_TX/EVENTOUT 78 5000 -2100 300 L 50 50 1 1 I +X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2/EVENTOUT 88 5000 0 300 L 50 50 1 1 I +X PE1/FSMC_NBL1/EVENTOUT 98 5000 2400 300 L 50 50 1 1 I +X VDD 19 -500 3000 300 D 50 50 1 1 I +X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/OTG_HS_SOF/I2S3_WS/EVENTOUT 29 -5000 300 300 R 50 50 1 1 I +X PE8/FSMC_D5/TIM1_CH1N/EVENTOUT 39 5000 1700 300 L 50 50 1 1 I X VCAP_1 49 900 -3000 300 U 50 50 1 1 I -X PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS/EVENTOUT 59 5000 -450 300 L 50 50 1 1 I -X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/EVENTOUT 69 -5000 -250 300 R 50 50 1 1 I -X PC11/UART4_RX/SPI3_MISO/SDIO_D3/USART3_RX/I2S3ext_SD/EVENTOUT 79 5000 -2150 300 L 50 50 1 1 I -X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 89 -5000 -1350 300 R 50 50 1 1 I +X PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS/EVENTOUT 59 5000 -500 300 L 50 50 1 1 I +X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/EVENTOUT 69 -5000 -300 300 R 50 50 1 1 I +X PC11/UART4_RX/SPI3_MISO/SDIO_D3/USART3_RX/I2S3ext_SD/EVENTOUT 79 5000 -2200 300 L 50 50 1 1 I +X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 89 -5000 -1400 300 R 50 50 1 1 I X VSS 99 400 -3000 300 U 50 50 1 1 I -X VDD 100 750 3000 300 D 50 50 1 1 I +X VDD 100 700 3000 300 D 50 50 1 1 I +S -4700 -2700 4700 2700 0 1 0 f ENDDRAW ENDDEF # # STM32F407VE # DEF STM32F407VE U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "STM32F407VE" 0 100 60 H V C CNN -F2 "TQFP100" 0 -100 60 H V C CNN -F3 "~" 0 0 60 H V C CNN +F0 "U" 0 0 50 H V C CNN +F1 "STM32F407VE" 0 100 50 H V C CNN +F2 "TQFP100" 0 -100 50 H V C CNN +F3 "" 0 0 50 H V C CNN DRAW -S -4700 -2700 4700 2700 0 1 0 f -X PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/EVENTOUT 1 5000 2350 300 L 50 50 1 1 I -X PE3/TRACED0/FSMC_A19/EVENTOUT 2 5000 2250 300 L 50 50 1 1 I -X PE4/TRACED1/FSMC_A20/DCMI_D4/EVENTOUT 3 5000 2150 300 L 50 50 1 1 I -X PE5/TRACED2/FSMC_A21/TIM9_CH1/DCMI_D6/EVENTOUT 4 5000 2050 300 L 50 50 1 1 I -X PE6/TRACED3_/_FSMC_A22/TIM9_CH2/DCMI_D7/EVENTOUT 5 5000 1950 300 L 50 50 1 1 I -X VBAT 6 1250 3000 300 D 50 50 1 1 I -X PC13/EVENTOUT 7 5000 -2350 300 L 50 50 1 1 I -X PC14/OSC32_IN/EVENTOUT 8 5000 -2450 300 L 50 50 1 1 I -X PC15/OSC32_OUT/EVENTOUT 9 5000 -2550 300 L 50 50 1 1 I +X PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/EVENTOUT 1 5000 2300 300 L 50 50 1 1 I +X PE3/TRACED0/FSMC_A19/EVENTOUT 2 5000 2200 300 L 50 50 1 1 I +X PE4/TRACED1/FSMC_A20/DCMI_D4/EVENTOUT 3 5000 2100 300 L 50 50 1 1 I +X PE5/TRACED2/FSMC_A21/TIM9_CH1/DCMI_D6/EVENTOUT 4 5000 2000 300 L 50 50 1 1 I +X PE6/TRACED3_/_FSMC_A22/TIM9_CH2/DCMI_D7/EVENTOUT 5 5000 1900 300 L 50 50 1 1 I +X VBAT 6 1200 3000 300 D 50 50 1 1 I +X PC13/EVENTOUT 7 5000 -2400 300 L 50 50 1 1 I +X PC14/OSC32_IN/EVENTOUT 8 5000 -2500 300 L 50 50 1 1 I +X PC15/OSC32_OUT/EVENTOUT 9 5000 -2600 300 L 50 50 1 1 I X VSS 10 -200 -3000 300 U 50 50 1 1 I X VSSA 20 -400 -3000 300 U 50 50 1 1 I -X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 30 -5000 250 300 R 50 50 1 1 I -X PE9/FSMC_D6/TIM1_CH1/EVENTOUT 40 5000 1650 300 L 50 50 1 1 I -X VDD 50 150 3000 300 D 50 50 1 1 I -X PD13/FSMC_A18/TIM4_CH2/EVENTOUT 60 5000 -550 300 L 50 50 1 1 I -X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 70 -5000 -350 300 R 50 50 1 1 I -X PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 80 5000 -2250 300 L 50 50 1 1 I -X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 90 -5000 -1450 300 R 50 50 1 1 I -X VDD 11 -750 3000 300 D 50 50 1 1 I -X VREF+ 21 -2250 3000 300 D 50 50 1 1 I -X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1_BKIN/EVENTOUT 31 -5000 150 300 R 50 50 1 1 I -X PE10/FSMC_D7/TIM1_CH2N/EVENTOUT 41 5000 1550 300 L 50 50 1 1 I -X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID/EVENTOUT 51 -5000 -2250 300 R 50 50 1 1 I -X PD14/FSMC_D0/TIM4_CH3/EVENTOUT/_EVENTOUT 61 5000 -650 300 L 50 50 1 1 I -X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 71 -5000 -450 300 R 50 50 1 1 I -X PD0/FSMC_D2/CAN1_RX/EVENTOUT 81 5000 750 300 L 50 50 1 1 I -X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/DCMI_D10/I2S3_SD/EVENTOUT 91 -5000 -1550 300 R 50 50 1 1 I -X PH0/OSC_IN/EVENTOUT 12 -5000 2150 300 R 50 50 1 1 I -X VDDA 22 -1750 3000 300 D 50 50 1 1 I -X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/RMII_CRS_DV/EVENTOUT 32 -5000 50 300 R 50 50 1 1 I -X PE11/FSMC_D8/TIM1_CH2/EVENTOUT 42 5000 1450 300 L 50 50 1 1 I -X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1/EVENTOUT 52 -5000 -2350 300 R 50 50 1 1 I -X PD15/FSMC_D1/TIM4_CH4/EVENTOUT 62 5000 -750 300 L 50 50 1 1 I -X PA13/JTMS/SWDIO/EVENTOUT 72 -5000 -550 300 R 50 50 1 1 I -X PD1/FSMC_D3/CAN1_TX/EVENTOUT 82 5000 650 300 L 50 50 1 1 I -X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/DCMI_D5/USART1_TX/EVENTOUT 92 -5000 -1650 300 R 50 50 1 1 I -X PH1/OSC_OUT/EVENTOUT 13 -5000 1550 300 R 50 50 1 1 I -X PA0/WKUP/USART2_CTS/UART4_TX/ETH_MII_CRS_/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 23 -5000 750 300 R 50 50 1 1 I -X PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0/EVENTOUT 33 5000 -1450 300 L 50 50 1 1 I -X PE12/FSMC_D9/TIM1_CH3N/EVENTOUT 43 5000 1350 300 L 50 50 1 1 I -X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 53 -5000 -2450 300 R 50 50 1 1 I -X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0/TIM3_CH1/EVENTOUT 63 5000 -1650 300 L 50 50 1 1 I +X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 30 -5000 200 300 R 50 50 1 1 I +X PE9/FSMC_D6/TIM1_CH1/EVENTOUT 40 5000 1600 300 L 50 50 1 1 I +X VDD 50 100 3000 300 D 50 50 1 1 I +X PD13/FSMC_A18/TIM4_CH2/EVENTOUT 60 5000 -600 300 L 50 50 1 1 I +X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 70 -5000 -400 300 R 50 50 1 1 I +X PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 80 5000 -2300 300 L 50 50 1 1 I +X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 90 -5000 -1500 300 R 50 50 1 1 I +X VDD 11 -800 3000 300 D 50 50 1 1 I +X VREF+ 21 -2300 3000 300 D 50 50 1 1 I +X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1_BKIN/EVENTOUT 31 -5000 100 300 R 50 50 1 1 I +X PE10/FSMC_D7/TIM1_CH2N/EVENTOUT 41 5000 1500 300 L 50 50 1 1 I +X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID/EVENTOUT 51 -5000 -2300 300 R 50 50 1 1 I +X PD14/FSMC_D0/TIM4_CH3/EVENTOUT/_EVENTOUT 61 5000 -700 300 L 50 50 1 1 I +X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 71 -5000 -500 300 R 50 50 1 1 I +X PD0/FSMC_D2/CAN1_RX/EVENTOUT 81 5000 700 300 L 50 50 1 1 I +X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/DCMI_D10/I2S3_SD/EVENTOUT 91 -5000 -1600 300 R 50 50 1 1 I +X PH0/OSC_IN/EVENTOUT 12 -5000 2100 300 R 50 50 1 1 I +X VDDA 22 -1800 3000 300 D 50 50 1 1 I +X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/RMII_CRS_DV/EVENTOUT 32 -5000 0 300 R 50 50 1 1 I +X PE11/FSMC_D8/TIM1_CH2/EVENTOUT 42 5000 1400 300 L 50 50 1 1 I +X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1/EVENTOUT 52 -5000 -2400 300 R 50 50 1 1 I +X PD15/FSMC_D1/TIM4_CH4/EVENTOUT 62 5000 -800 300 L 50 50 1 1 I +X PA13/JTMS/SWDIO/EVENTOUT 72 -5000 -600 300 R 50 50 1 1 I +X PD1/FSMC_D3/CAN1_TX/EVENTOUT 82 5000 600 300 L 50 50 1 1 I +X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/DCMI_D5/USART1_TX/EVENTOUT 92 -5000 -1700 300 R 50 50 1 1 I +X PH1/OSC_OUT/EVENTOUT 13 -5000 1500 300 R 50 50 1 1 I +X PA0/WKUP/USART2_CTS/UART4_TX/ETH_MII_CRS_/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 23 -5000 700 300 R 50 50 1 1 I +X PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0/EVENTOUT 33 5000 -1500 300 L 50 50 1 1 I +X PE12/FSMC_D9/TIM1_CH3N/EVENTOUT 43 5000 1300 300 L 50 50 1 1 I +X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 53 -5000 -2500 300 R 50 50 1 1 I +X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0/TIM3_CH1/EVENTOUT 63 5000 -1700 300 L 50 50 1 1 I X VCAP_2 73 1400 -3000 300 U 50 50 1 1 I -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11/EVENTOUT 83 5000 550 300 L 50 50 1 1 I -X PB7/I2C1_SDA/FSMC_NL/DCMI_VSYNC/USART1_RX/TIM4_CH2/EVENTOUT 93 -5000 -1750 300 R 50 50 1 1 I -X NRST 14 -5000 2350 300 R 50 50 1 1 I -X PA1/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIMM2_CH2/EVENTOUT 24 -5000 650 300 R 50 50 1 1 I -X PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1/EVENTOUT 34 5000 -1550 300 L 50 50 1 1 I -X PE13/FSMC_D10/TIM1_CH3/EVENTOUT 44 5000 1250 300 L 50 50 1 1 I -X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 54 -5000 -2550 300 R 50 50 1 1 I -X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1/TIM3_CH2/EVENTOUT 64 5000 -1750 300 L 50 50 1 1 I +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11/EVENTOUT 83 5000 500 300 L 50 50 1 1 I +X PB7/I2C1_SDA/FSMC_NL/DCMI_VSYNC/USART1_RX/TIM4_CH2/EVENTOUT 93 -5000 -1800 300 R 50 50 1 1 I +X NRST 14 -5000 2300 300 R 50 50 1 1 I +X PA1/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIMM2_CH2/EVENTOUT 24 -5000 600 300 R 50 50 1 1 I +X PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1/EVENTOUT 34 5000 -1600 300 L 50 50 1 1 I +X PE13/FSMC_D10/TIM1_CH3/EVENTOUT 44 5000 1200 300 L 50 50 1 1 I +X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 54 -5000 -2600 300 R 50 50 1 1 I +X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1/TIM3_CH2/EVENTOUT 64 5000 -1800 300 L 50 50 1 1 I X VSS 74 200 -3000 300 U 50 50 1 1 I -X PD3/FSMC_CLK/USART2_CTS/EVENTOUT 84 5000 450 300 L 50 50 1 1 I -X BOOT0 94 -5000 2550 300 R 50 50 1 1 I -X PC0/OTG_HS_ULPI_STP/EVENTOUT 15 5000 -1050 300 L 50 50 1 1 I -X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO/EVENTOUT 25 -5000 550 300 R 50 50 1 1 I -X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N/EVENTOUT 35 -5000 -1050 300 R 50 50 1 1 I -X PE14/FSMC_D11/TIM1_CH4/EVENTOUT 45 5000 1150 300 L 50 50 1 1 I -X PD8/FSMC_D13/USART3_TX/EVENTOUT 55 5000 -50 300 L 50 50 1 1 I -X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2/EVENTOUT 65 5000 -1850 300 L 50 50 1 1 I -X VDD 75 450 3000 300 D 50 50 1 1 I -X PD4/FSMC_NOE/USART2_RTS/EVENTOUT 85 5000 350 300 L 50 50 1 1 I -X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/DCMI_D6/ETH_MII_TXD3/I2C1_SCL/CAN1_RX/EVENTOUT 95 -5000 -1850 300 R 50 50 1 1 I -X PC1/ETH_MDC/_EVENTOUT 16 5000 -1150 300 L 50 50 1 1 I -X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL/EVENTOUT 26 -5000 450 300 R 50 50 1 1 I -X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 36 -5000 -1150 300 R 50 50 1 1 I -X PE15/FSMC_D12/TIM1_BKIN/EVENTOUT 46 5000 1050 300 L 50 50 1 1 I -X PD9/FSMC_D14/USART3_RX/EVENTOUT 56 5000 -150 300 L 50 50 1 1 I -X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4/EVENTOUT 66 5000 -1950 300 L 50 50 1 1 I -X PA14/JTCK/SWCLK/EVENTOUT 76 -5000 -650 300 R 50 50 1 1 I -X PD5/FSMC_NWE/USART2_TX/EVENTOUT 86 5000 250 300 L 50 50 1 1 I -X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TX/EVENTOUT 96 -5000 -1950 300 R 50 50 1 1 I -X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD/EVENTOUT 17 5000 -1250 300 L 50 50 1 1 I +X PD3/FSMC_CLK/USART2_CTS/EVENTOUT 84 5000 400 300 L 50 50 1 1 I +X BOOT0 94 -5000 2500 300 R 50 50 1 1 I +X PC0/OTG_HS_ULPI_STP/EVENTOUT 15 5000 -1100 300 L 50 50 1 1 I +X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO/EVENTOUT 25 -5000 500 300 R 50 50 1 1 I +X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N/EVENTOUT 35 -5000 -1100 300 R 50 50 1 1 I +X PE14/FSMC_D11/TIM1_CH4/EVENTOUT 45 5000 1100 300 L 50 50 1 1 I +X PD8/FSMC_D13/USART3_TX/EVENTOUT 55 5000 -100 300 L 50 50 1 1 I +X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2/EVENTOUT 65 5000 -1900 300 L 50 50 1 1 I +X VDD 75 400 3000 300 D 50 50 1 1 I +X PD4/FSMC_NOE/USART2_RTS/EVENTOUT 85 5000 300 300 L 50 50 1 1 I +X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/DCMI_D6/ETH_MII_TXD3/I2C1_SCL/CAN1_RX/EVENTOUT 95 -5000 -1900 300 R 50 50 1 1 I +X PC1/ETH_MDC/_EVENTOUT 16 5000 -1200 300 L 50 50 1 1 I +X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL/EVENTOUT 26 -5000 400 300 R 50 50 1 1 I +X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 36 -5000 -1200 300 R 50 50 1 1 I +X PE15/FSMC_D12/TIM1_BKIN/EVENTOUT 46 5000 1000 300 L 50 50 1 1 I +X PD9/FSMC_D14/USART3_RX/EVENTOUT 56 5000 -200 300 L 50 50 1 1 I +X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4/EVENTOUT 66 5000 -2000 300 L 50 50 1 1 I +X PA14/JTCK/SWCLK/EVENTOUT 76 -5000 -700 300 R 50 50 1 1 I +X PD5/FSMC_NWE/USART2_TX/EVENTOUT 86 5000 200 300 L 50 50 1 1 I +X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TX/EVENTOUT 96 -5000 -2000 300 R 50 50 1 1 I +X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD/EVENTOUT 17 5000 -1300 300 L 50 50 1 1 I X VSS 27 0 -3000 300 U 50 50 1 1 I -X PB2/BOOT1/EVENTOUT 37 -5000 -1250 300 R 50 50 1 1 I -X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3/EVENTOUT 47 -5000 -2050 300 R 50 50 1 1 I -X PD10/FSMC_D15/USART3_CK/EVENTOUT 57 5000 -250 300 L 50 50 1 1 I -X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 67 -5000 -50 300 R 50 50 1 1 I -X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 77 -5000 -750 300 R 50 50 1 1 I -X PD6/FSMC_NWAIT/USART2_RX/EVENTOUT 87 5000 150 300 L 50 50 1 1 I -X PE0/TIM4_ETR/FSMC_NBL0/DCMI_D2/EVENTOUT 97 5000 2550 300 L 50 50 1 1 I -X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/EVENTOUT 18 5000 -1350 300 L 50 50 1 1 I -X VDD 28 -150 3000 300 D 50 50 1 1 I -X PE7/FSMC_D4/TIM1_ETR/EVENTOUT 38 5000 1850 300 L 50 50 1 1 I -X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4/EVENTOUT 48 -5000 -2150 300 R 50 50 1 1 I -X PD11/FSMC_CLE/FSMC_A16/USART3_CTS/EVENTOUT 58 5000 -350 300 L 50 50 1 1 I -X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/DCMI_D0/EVENTOUT 68 -5000 -150 300 R 50 50 1 1 I -X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX/EVENTOUT 78 5000 -2050 300 L 50 50 1 1 I -X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2/EVENTOUT 88 5000 50 300 L 50 50 1 1 I -X PE1/FSMC_NBL1/DCMI_D3/EVENTOUT 98 5000 2450 300 L 50 50 1 1 I -X VDD 19 -450 3000 300 D 50 50 1 1 I -X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC/OTG_HS_SOF/I2S3_WS/EVENTOUT 29 -5000 350 300 R 50 50 1 1 I -X PE8/FSMC_D5/TIM1_CH1N/EVENTOUT 39 5000 1750 300 L 50 50 1 1 I +X PB2/BOOT1/EVENTOUT 37 -5000 -1300 300 R 50 50 1 1 I +X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3/EVENTOUT 47 -5000 -2100 300 R 50 50 1 1 I +X PD10/FSMC_D15/USART3_CK/EVENTOUT 57 5000 -300 300 L 50 50 1 1 I +X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 67 -5000 -100 300 R 50 50 1 1 I +X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 77 -5000 -800 300 R 50 50 1 1 I +X PD6/FSMC_NWAIT/USART2_RX/EVENTOUT 87 5000 100 300 L 50 50 1 1 I +X PE0/TIM4_ETR/FSMC_NBL0/DCMI_D2/EVENTOUT 97 5000 2500 300 L 50 50 1 1 I +X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/EVENTOUT 18 5000 -1400 300 L 50 50 1 1 I +X VDD 28 -200 3000 300 D 50 50 1 1 I +X PE7/FSMC_D4/TIM1_ETR/EVENTOUT 38 5000 1800 300 L 50 50 1 1 I +X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4/EVENTOUT 48 -5000 -2200 300 R 50 50 1 1 I +X PD11/FSMC_CLE/FSMC_A16/USART3_CTS/EVENTOUT 58 5000 -400 300 L 50 50 1 1 I +X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/DCMI_D0/EVENTOUT 68 -5000 -200 300 R 50 50 1 1 I +X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX/EVENTOUT 78 5000 -2100 300 L 50 50 1 1 I +X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2/EVENTOUT 88 5000 0 300 L 50 50 1 1 I +X PE1/FSMC_NBL1/DCMI_D3/EVENTOUT 98 5000 2400 300 L 50 50 1 1 I +X VDD 19 -500 3000 300 D 50 50 1 1 I +X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC/OTG_HS_SOF/I2S3_WS/EVENTOUT 29 -5000 300 300 R 50 50 1 1 I +X PE8/FSMC_D5/TIM1_CH1N/EVENTOUT 39 5000 1700 300 L 50 50 1 1 I X VCAP_1 49 900 -3000 300 U 50 50 1 1 I -X PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS/EVENTOUT 59 5000 -450 300 L 50 50 1 1 I -X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/DCMI_D1/EVENTOUT 69 -5000 -250 300 R 50 50 1 1 I -X PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4/USART3_RX/I2S3ext_SD/EVENTOUT 79 5000 -2150 300 L 50 50 1 1 I -X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 89 -5000 -1350 300 R 50 50 1 1 I +X PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS/EVENTOUT 59 5000 -500 300 L 50 50 1 1 I +X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/DCMI_D1/EVENTOUT 69 -5000 -300 300 R 50 50 1 1 I +X PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4/USART3_RX/I2S3ext_SD/EVENTOUT 79 5000 -2200 300 L 50 50 1 1 I +X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 89 -5000 -1400 300 R 50 50 1 1 I X VSS 99 400 -3000 300 U 50 50 1 1 I -X VDD 100 750 3000 300 D 50 50 1 1 I +X VDD 100 700 3000 300 D 50 50 1 1 I +S -4700 -2700 4700 2700 0 1 0 f ENDDRAW ENDDEF # # STM32F407VG # DEF STM32F407VG U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "STM32F407VG" 0 100 60 H V C CNN -F2 "TQFP100" 0 -100 60 H V C CNN -F3 "~" 0 0 60 H V C CNN +F0 "U" 0 0 50 H V C CNN +F1 "STM32F407VG" 0 100 50 H V C CNN +F2 "TQFP100" 0 -100 50 H V C CNN +F3 "" 0 0 50 H V C CNN DRAW -S -4700 -2700 4700 2700 0 1 0 f -X PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/EVENTOUT 1 5000 2350 300 L 50 50 1 1 I -X PE3/TRACED0/FSMC_A19/EVENTOUT 2 5000 2250 300 L 50 50 1 1 I -X PE4/TRACED1/FSMC_A20/DCMI_D4/EVENTOUT 3 5000 2150 300 L 50 50 1 1 I -X PE5/TRACED2/FSMC_A21/TIM9_CH1/DCMI_D6/EVENTOUT 4 5000 2050 300 L 50 50 1 1 I -X PE6/TRACED3_/_FSMC_A22/TIM9_CH2/DCMI_D7/EVENTOUT 5 5000 1950 300 L 50 50 1 1 I -X VBAT 6 1250 3000 300 D 50 50 1 1 I -X PC13/EVENTOUT 7 5000 -2350 300 L 50 50 1 1 I -X PC14/OSC32_IN/EVENTOUT 8 5000 -2450 300 L 50 50 1 1 I -X PC15/OSC32_OUT/EVENTOUT 9 5000 -2550 300 L 50 50 1 1 I +X PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/EVENTOUT 1 5000 2300 300 L 50 50 1 1 I +X PE3/TRACED0/FSMC_A19/EVENTOUT 2 5000 2200 300 L 50 50 1 1 I +X PE4/TRACED1/FSMC_A20/DCMI_D4/EVENTOUT 3 5000 2100 300 L 50 50 1 1 I +X PE5/TRACED2/FSMC_A21/TIM9_CH1/DCMI_D6/EVENTOUT 4 5000 2000 300 L 50 50 1 1 I +X PE6/TRACED3_/_FSMC_A22/TIM9_CH2/DCMI_D7/EVENTOUT 5 5000 1900 300 L 50 50 1 1 I +X VBAT 6 1200 3000 300 D 50 50 1 1 I +X PC13/EVENTOUT 7 5000 -2400 300 L 50 50 1 1 I +X PC14/OSC32_IN/EVENTOUT 8 5000 -2500 300 L 50 50 1 1 I +X PC15/OSC32_OUT/EVENTOUT 9 5000 -2600 300 L 50 50 1 1 I X VSS 10 -200 -3000 300 U 50 50 1 1 I X VSSA 20 -400 -3000 300 U 50 50 1 1 I -X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 30 -5000 250 300 R 50 50 1 1 I -X PE9/FSMC_D6/TIM1_CH1/EVENTOUT 40 5000 1650 300 L 50 50 1 1 I -X VDD 50 150 3000 300 D 50 50 1 1 I -X PD13/FSMC_A18/TIM4_CH2/EVENTOUT 60 5000 -550 300 L 50 50 1 1 I -X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 70 -5000 -350 300 R 50 50 1 1 I -X PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 80 5000 -2250 300 L 50 50 1 1 I -X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 90 -5000 -1450 300 R 50 50 1 1 I -X VDD 11 -750 3000 300 D 50 50 1 1 I -X VREF+ 21 -2250 3000 300 D 50 50 1 1 I -X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1_BKIN/EVENTOUT 31 -5000 150 300 R 50 50 1 1 I -X PE10/FSMC_D7/TIM1_CH2N/EVENTOUT 41 5000 1550 300 L 50 50 1 1 I -X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID/EVENTOUT 51 -5000 -2250 300 R 50 50 1 1 I -X PD14/FSMC_D0/TIM4_CH3/EVENTOUT/_EVENTOUT 61 5000 -650 300 L 50 50 1 1 I -X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 71 -5000 -450 300 R 50 50 1 1 I -X PD0/FSMC_D2/CAN1_RX/EVENTOUT 81 5000 750 300 L 50 50 1 1 I -X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/DCMI_D10/I2S3_SD/EVENTOUT 91 -5000 -1550 300 R 50 50 1 1 I -X PH0/OSC_IN/EVENTOUT 12 -5000 2150 300 R 50 50 1 1 I -X VDDA 22 -1750 3000 300 D 50 50 1 1 I -X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/RMII_CRS_DV/EVENTOUT 32 -5000 50 300 R 50 50 1 1 I -X PE11/FSMC_D8/TIM1_CH2/EVENTOUT 42 5000 1450 300 L 50 50 1 1 I -X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1/EVENTOUT 52 -5000 -2350 300 R 50 50 1 1 I -X PD15/FSMC_D1/TIM4_CH4/EVENTOUT 62 5000 -750 300 L 50 50 1 1 I -X PA13/JTMS/SWDIO/EVENTOUT 72 -5000 -550 300 R 50 50 1 1 I -X PD1/FSMC_D3/CAN1_TX/EVENTOUT 82 5000 650 300 L 50 50 1 1 I -X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/DCMI_D5/USART1_TX/EVENTOUT 92 -5000 -1650 300 R 50 50 1 1 I -X PH1/OSC_OUT/EVENTOUT 13 -5000 1550 300 R 50 50 1 1 I -X PA0/WKUP/USART2_CTS/UART4_TX/ETH_MII_CRS_/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 23 -5000 750 300 R 50 50 1 1 I -X PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0/EVENTOUT 33 5000 -1450 300 L 50 50 1 1 I -X PE12/FSMC_D9/TIM1_CH3N/EVENTOUT 43 5000 1350 300 L 50 50 1 1 I -X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 53 -5000 -2450 300 R 50 50 1 1 I -X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0/TIM3_CH1/EVENTOUT 63 5000 -1650 300 L 50 50 1 1 I +X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 30 -5000 200 300 R 50 50 1 1 I +X PE9/FSMC_D6/TIM1_CH1/EVENTOUT 40 5000 1600 300 L 50 50 1 1 I +X VDD 50 100 3000 300 D 50 50 1 1 I +X PD13/FSMC_A18/TIM4_CH2/EVENTOUT 60 5000 -600 300 L 50 50 1 1 I +X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 70 -5000 -400 300 R 50 50 1 1 I +X PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 80 5000 -2300 300 L 50 50 1 1 I +X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 90 -5000 -1500 300 R 50 50 1 1 I +X VDD 11 -800 3000 300 D 50 50 1 1 I +X VREF+ 21 -2300 3000 300 D 50 50 1 1 I +X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1_BKIN/EVENTOUT 31 -5000 100 300 R 50 50 1 1 I +X PE10/FSMC_D7/TIM1_CH2N/EVENTOUT 41 5000 1500 300 L 50 50 1 1 I +X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID/EVENTOUT 51 -5000 -2300 300 R 50 50 1 1 I +X PD14/FSMC_D0/TIM4_CH3/EVENTOUT/_EVENTOUT 61 5000 -700 300 L 50 50 1 1 I +X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 71 -5000 -500 300 R 50 50 1 1 I +X PD0/FSMC_D2/CAN1_RX/EVENTOUT 81 5000 700 300 L 50 50 1 1 I +X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/DCMI_D10/I2S3_SD/EVENTOUT 91 -5000 -1600 300 R 50 50 1 1 I +X PH0/OSC_IN/EVENTOUT 12 -5000 2100 300 R 50 50 1 1 I +X VDDA 22 -1800 3000 300 D 50 50 1 1 I +X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/RMII_CRS_DV/EVENTOUT 32 -5000 0 300 R 50 50 1 1 I +X PE11/FSMC_D8/TIM1_CH2/EVENTOUT 42 5000 1400 300 L 50 50 1 1 I +X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1/EVENTOUT 52 -5000 -2400 300 R 50 50 1 1 I +X PD15/FSMC_D1/TIM4_CH4/EVENTOUT 62 5000 -800 300 L 50 50 1 1 I +X PA13/JTMS/SWDIO/EVENTOUT 72 -5000 -600 300 R 50 50 1 1 I +X PD1/FSMC_D3/CAN1_TX/EVENTOUT 82 5000 600 300 L 50 50 1 1 I +X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/DCMI_D5/USART1_TX/EVENTOUT 92 -5000 -1700 300 R 50 50 1 1 I +X PH1/OSC_OUT/EVENTOUT 13 -5000 1500 300 R 50 50 1 1 I +X PA0/WKUP/USART2_CTS/UART4_TX/ETH_MII_CRS_/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 23 -5000 700 300 R 50 50 1 1 I +X PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0/EVENTOUT 33 5000 -1500 300 L 50 50 1 1 I +X PE12/FSMC_D9/TIM1_CH3N/EVENTOUT 43 5000 1300 300 L 50 50 1 1 I +X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 53 -5000 -2500 300 R 50 50 1 1 I +X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0/TIM3_CH1/EVENTOUT 63 5000 -1700 300 L 50 50 1 1 I X VCAP_2 73 1400 -3000 300 U 50 50 1 1 I -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11/EVENTOUT 83 5000 550 300 L 50 50 1 1 I -X PB7/I2C1_SDA/FSMC_NL/DCMI_VSYNC/USART1_RX/TIM4_CH2/EVENTOUT 93 -5000 -1750 300 R 50 50 1 1 I -X NRST 14 -5000 2350 300 R 50 50 1 1 I -X PA1/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIMM2_CH2/EVENTOUT 24 -5000 650 300 R 50 50 1 1 I -X PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1/EVENTOUT 34 5000 -1550 300 L 50 50 1 1 I -X PE13/FSMC_D10/TIM1_CH3/EVENTOUT 44 5000 1250 300 L 50 50 1 1 I -X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 54 -5000 -2550 300 R 50 50 1 1 I -X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1/TIM3_CH2/EVENTOUT 64 5000 -1750 300 L 50 50 1 1 I +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11/EVENTOUT 83 5000 500 300 L 50 50 1 1 I +X PB7/I2C1_SDA/FSMC_NL/DCMI_VSYNC/USART1_RX/TIM4_CH2/EVENTOUT 93 -5000 -1800 300 R 50 50 1 1 I +X NRST 14 -5000 2300 300 R 50 50 1 1 I +X PA1/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIMM2_CH2/EVENTOUT 24 -5000 600 300 R 50 50 1 1 I +X PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1/EVENTOUT 34 5000 -1600 300 L 50 50 1 1 I +X PE13/FSMC_D10/TIM1_CH3/EVENTOUT 44 5000 1200 300 L 50 50 1 1 I +X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 54 -5000 -2600 300 R 50 50 1 1 I +X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1/TIM3_CH2/EVENTOUT 64 5000 -1800 300 L 50 50 1 1 I X VSS 74 200 -3000 300 U 50 50 1 1 I -X PD3/FSMC_CLK/USART2_CTS/EVENTOUT 84 5000 450 300 L 50 50 1 1 I -X BOOT0 94 -5000 2550 300 R 50 50 1 1 I -X PC0/OTG_HS_ULPI_STP/EVENTOUT 15 5000 -1050 300 L 50 50 1 1 I -X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO/EVENTOUT 25 -5000 550 300 R 50 50 1 1 I -X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N/EVENTOUT 35 -5000 -1050 300 R 50 50 1 1 I -X PE14/FSMC_D11/TIM1_CH4/EVENTOUT 45 5000 1150 300 L 50 50 1 1 I -X PD8/FSMC_D13/USART3_TX/EVENTOUT 55 5000 -50 300 L 50 50 1 1 I -X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2/EVENTOUT 65 5000 -1850 300 L 50 50 1 1 I -X VDD 75 450 3000 300 D 50 50 1 1 I -X PD4/FSMC_NOE/USART2_RTS/EVENTOUT 85 5000 350 300 L 50 50 1 1 I -X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/DCMI_D6/ETH_MII_TXD3/I2C1_SCL/CAN1_RX/EVENTOUT 95 -5000 -1850 300 R 50 50 1 1 I -X PC1/ETH_MDC/_EVENTOUT 16 5000 -1150 300 L 50 50 1 1 I -X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL/EVENTOUT 26 -5000 450 300 R 50 50 1 1 I -X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 36 -5000 -1150 300 R 50 50 1 1 I -X PE15/FSMC_D12/TIM1_BKIN/EVENTOUT 46 5000 1050 300 L 50 50 1 1 I -X PD9/FSMC_D14/USART3_RX/EVENTOUT 56 5000 -150 300 L 50 50 1 1 I -X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4/EVENTOUT 66 5000 -1950 300 L 50 50 1 1 I -X PA14/JTCK/SWCLK/EVENTOUT 76 -5000 -650 300 R 50 50 1 1 I -X PD5/FSMC_NWE/USART2_TX/EVENTOUT 86 5000 250 300 L 50 50 1 1 I -X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TX/EVENTOUT 96 -5000 -1950 300 R 50 50 1 1 I -X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD/EVENTOUT 17 5000 -1250 300 L 50 50 1 1 I +X PD3/FSMC_CLK/USART2_CTS/EVENTOUT 84 5000 400 300 L 50 50 1 1 I +X BOOT0 94 -5000 2500 300 R 50 50 1 1 I +X PC0/OTG_HS_ULPI_STP/EVENTOUT 15 5000 -1100 300 L 50 50 1 1 I +X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO/EVENTOUT 25 -5000 500 300 R 50 50 1 1 I +X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N/EVENTOUT 35 -5000 -1100 300 R 50 50 1 1 I +X PE14/FSMC_D11/TIM1_CH4/EVENTOUT 45 5000 1100 300 L 50 50 1 1 I +X PD8/FSMC_D13/USART3_TX/EVENTOUT 55 5000 -100 300 L 50 50 1 1 I +X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2/EVENTOUT 65 5000 -1900 300 L 50 50 1 1 I +X VDD 75 400 3000 300 D 50 50 1 1 I +X PD4/FSMC_NOE/USART2_RTS/EVENTOUT 85 5000 300 300 L 50 50 1 1 I +X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/DCMI_D6/ETH_MII_TXD3/I2C1_SCL/CAN1_RX/EVENTOUT 95 -5000 -1900 300 R 50 50 1 1 I +X PC1/ETH_MDC/_EVENTOUT 16 5000 -1200 300 L 50 50 1 1 I +X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL/EVENTOUT 26 -5000 400 300 R 50 50 1 1 I +X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 36 -5000 -1200 300 R 50 50 1 1 I +X PE15/FSMC_D12/TIM1_BKIN/EVENTOUT 46 5000 1000 300 L 50 50 1 1 I +X PD9/FSMC_D14/USART3_RX/EVENTOUT 56 5000 -200 300 L 50 50 1 1 I +X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4/EVENTOUT 66 5000 -2000 300 L 50 50 1 1 I +X PA14/JTCK/SWCLK/EVENTOUT 76 -5000 -700 300 R 50 50 1 1 I +X PD5/FSMC_NWE/USART2_TX/EVENTOUT 86 5000 200 300 L 50 50 1 1 I +X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TX/EVENTOUT 96 -5000 -2000 300 R 50 50 1 1 I +X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD/EVENTOUT 17 5000 -1300 300 L 50 50 1 1 I X VSS 27 0 -3000 300 U 50 50 1 1 I -X PB2/BOOT1/EVENTOUT 37 -5000 -1250 300 R 50 50 1 1 I -X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3/EVENTOUT 47 -5000 -2050 300 R 50 50 1 1 I -X PD10/FSMC_D15/USART3_CK/EVENTOUT 57 5000 -250 300 L 50 50 1 1 I -X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 67 -5000 -50 300 R 50 50 1 1 I -X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 77 -5000 -750 300 R 50 50 1 1 I -X PD6/FSMC_NWAIT/USART2_RX/EVENTOUT 87 5000 150 300 L 50 50 1 1 I -X PE0/TIM4_ETR/FSMC_NBL0/DCMI_D2/EVENTOUT 97 5000 2550 300 L 50 50 1 1 I -X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/EVENTOUT 18 5000 -1350 300 L 50 50 1 1 I -X VDD 28 -150 3000 300 D 50 50 1 1 I -X PE7/FSMC_D4/TIM1_ETR/EVENTOUT 38 5000 1850 300 L 50 50 1 1 I -X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4/EVENTOUT 48 -5000 -2150 300 R 50 50 1 1 I -X PD11/FSMC_CLE/FSMC_A16/USART3_CTS/EVENTOUT 58 5000 -350 300 L 50 50 1 1 I -X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/DCMI_D0/EVENTOUT 68 -5000 -150 300 R 50 50 1 1 I -X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX/EVENTOUT 78 5000 -2050 300 L 50 50 1 1 I -X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2/EVENTOUT 88 5000 50 300 L 50 50 1 1 I -X PE1/FSMC_NBL1/DCMI_D3/EVENTOUT 98 5000 2450 300 L 50 50 1 1 I -X VDD 19 -450 3000 300 D 50 50 1 1 I -X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC/OTG_HS_SOF/I2S3_WS/EVENTOUT 29 -5000 350 300 R 50 50 1 1 I -X PE8/FSMC_D5/TIM1_CH1N/EVENTOUT 39 5000 1750 300 L 50 50 1 1 I +X PB2/BOOT1/EVENTOUT 37 -5000 -1300 300 R 50 50 1 1 I +X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3/EVENTOUT 47 -5000 -2100 300 R 50 50 1 1 I +X PD10/FSMC_D15/USART3_CK/EVENTOUT 57 5000 -300 300 L 50 50 1 1 I +X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 67 -5000 -100 300 R 50 50 1 1 I +X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 77 -5000 -800 300 R 50 50 1 1 I +X PD6/FSMC_NWAIT/USART2_RX/EVENTOUT 87 5000 100 300 L 50 50 1 1 I +X PE0/TIM4_ETR/FSMC_NBL0/DCMI_D2/EVENTOUT 97 5000 2500 300 L 50 50 1 1 I +X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/EVENTOUT 18 5000 -1400 300 L 50 50 1 1 I +X VDD 28 -200 3000 300 D 50 50 1 1 I +X PE7/FSMC_D4/TIM1_ETR/EVENTOUT 38 5000 1800 300 L 50 50 1 1 I +X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4/EVENTOUT 48 -5000 -2200 300 R 50 50 1 1 I +X PD11/FSMC_CLE/FSMC_A16/USART3_CTS/EVENTOUT 58 5000 -400 300 L 50 50 1 1 I +X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/DCMI_D0/EVENTOUT 68 -5000 -200 300 R 50 50 1 1 I +X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX/EVENTOUT 78 5000 -2100 300 L 50 50 1 1 I +X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2/EVENTOUT 88 5000 0 300 L 50 50 1 1 I +X PE1/FSMC_NBL1/DCMI_D3/EVENTOUT 98 5000 2400 300 L 50 50 1 1 I +X VDD 19 -500 3000 300 D 50 50 1 1 I +X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC/OTG_HS_SOF/I2S3_WS/EVENTOUT 29 -5000 300 300 R 50 50 1 1 I +X PE8/FSMC_D5/TIM1_CH1N/EVENTOUT 39 5000 1700 300 L 50 50 1 1 I X VCAP_1 49 900 -3000 300 U 50 50 1 1 I -X PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS/EVENTOUT 59 5000 -450 300 L 50 50 1 1 I -X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/DCMI_D1/EVENTOUT 69 -5000 -250 300 R 50 50 1 1 I -X PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4/USART3_RX/I2S3ext_SD/EVENTOUT 79 5000 -2150 300 L 50 50 1 1 I -X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 89 -5000 -1350 300 R 50 50 1 1 I +X PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS/EVENTOUT 59 5000 -500 300 L 50 50 1 1 I +X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/DCMI_D1/EVENTOUT 69 -5000 -300 300 R 50 50 1 1 I +X PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4/USART3_RX/I2S3ext_SD/EVENTOUT 79 5000 -2200 300 L 50 50 1 1 I +X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 89 -5000 -1400 300 R 50 50 1 1 I X VSS 99 400 -3000 300 U 50 50 1 1 I -X VDD 100 750 3000 300 D 50 50 1 1 I +X VDD 100 700 3000 300 D 50 50 1 1 I +S -4700 -2700 4700 2700 0 1 0 f ENDDRAW ENDDEF # # STM32F415VG # DEF STM32F415VG U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "STM32F415VG" 0 100 60 H V C CNN -F2 "TQFP100" 0 -100 60 H V C CNN -F3 "~" 0 0 60 H V C CNN +F0 "U" 0 0 50 H V C CNN +F1 "STM32F415VG" 0 100 50 H V C CNN +F2 "TQFP100" 0 -100 50 H V C CNN +F3 "" 0 0 50 H V C CNN DRAW -S -4700 -2700 4700 2700 0 1 0 f -X PE2/TRACECLK/FSMC_A23/EVENTOUT 1 5000 2350 300 L 50 50 1 1 I -X PE3/TRACED0/FSMC_A19/EVENTOUT 2 5000 2250 300 L 50 50 1 1 I -X PE4/TRACED1/FSMC_A20/EVENTOUT 3 5000 2150 300 L 50 50 1 1 I -X PE5/TRACED2/FSMC_A21/TIM9_CH1/EVENTOUT 4 5000 2050 300 L 50 50 1 1 I -X PE6/TRACED3_/_FSMC_A22/TIM9_CH2/EVENTOUT 5 5000 1950 300 L 50 50 1 1 I -X VBAT 6 1250 3000 300 D 50 50 1 1 I -X PC13/EVENTOUT 7 5000 -2350 300 L 50 50 1 1 I -X PC14/OSC32_IN/EVENTOUT 8 5000 -2450 300 L 50 50 1 1 I -X PC15/OSC32_OUT/EVENTOUT 9 5000 -2550 300 L 50 50 1 1 I +X PE2/TRACECLK/FSMC_A23/EVENTOUT 1 5000 2300 300 L 50 50 1 1 I +X PE3/TRACED0/FSMC_A19/EVENTOUT 2 5000 2200 300 L 50 50 1 1 I +X PE4/TRACED1/FSMC_A20/EVENTOUT 3 5000 2100 300 L 50 50 1 1 I +X PE5/TRACED2/FSMC_A21/TIM9_CH1/EVENTOUT 4 5000 2000 300 L 50 50 1 1 I +X PE6/TRACED3_/_FSMC_A22/TIM9_CH2/EVENTOUT 5 5000 1900 300 L 50 50 1 1 I +X VBAT 6 1200 3000 300 D 50 50 1 1 I +X PC13/EVENTOUT 7 5000 -2400 300 L 50 50 1 1 I +X PC14/OSC32_IN/EVENTOUT 8 5000 -2500 300 L 50 50 1 1 I +X PC15/OSC32_OUT/EVENTOUT 9 5000 -2600 300 L 50 50 1 1 I X VSS 10 -200 -3000 300 U 50 50 1 1 I X VSSA 20 -400 -3000 300 U 50 50 1 1 I -X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 30 -5000 250 300 R 50 50 1 1 I -X PE9/FSMC_D6/TIM1_CH1/EVENTOUT 40 5000 1650 300 L 50 50 1 1 I -X VDD 50 150 3000 300 D 50 50 1 1 I -X PD13/FSMC_A18/TIM4_CH2/EVENTOUT 60 5000 -550 300 L 50 50 1 1 I -X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 70 -5000 -350 300 R 50 50 1 1 I -X PC12/UART5_TX/SDIO_CK/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 80 5000 -2250 300 L 50 50 1 1 I -X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 90 -5000 -1450 300 R 50 50 1 1 I -X VDD 11 -750 3000 300 D 50 50 1 1 I -X VREF+ 21 -2250 3000 300 D 50 50 1 1 I -X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/TIM3_CH1/TIM1_BKIN/EVENTOUT 31 -5000 150 300 R 50 50 1 1 I -X PE10/FSMC_D7/TIM1_CH2N/EVENTOUT 41 5000 1550 300 L 50 50 1 1 I -X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/OTG_HS_ID/EVENTOUT 51 -5000 -2250 300 R 50 50 1 1 I -X PD14/FSMC_D0/TIM4_CH3/EVENTOUT/_EVENTOUT 61 5000 -650 300 L 50 50 1 1 I -X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 71 -5000 -450 300 R 50 50 1 1 I -X PD0/FSMC_D2/CAN1_RX/EVENTOUT 81 5000 750 300 L 50 50 1 1 I -X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/I2S3_SD/EVENTOUT 91 -5000 -1550 300 R 50 50 1 1 I -X PH0/OSC_IN/EVENTOUT 12 -5000 2150 300 R 50 50 1 1 I -X VDDA 22 -1750 3000 300 D 50 50 1 1 I -X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/TIM1_CH1N/EVENTOUT 32 -5000 50 300 R 50 50 1 1 I -X PE11/FSMC_D8/TIM1_CH2/EVENTOUT 42 5000 1450 300 L 50 50 1 1 I -X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/EVENTOUT 52 -5000 -2350 300 R 50 50 1 1 I -X PD15/FSMC_D1/TIM4_CH4/EVENTOUT 62 5000 -750 300 L 50 50 1 1 I -X PA13/JTMS/SWDIO/EVENTOUT 72 -5000 -550 300 R 50 50 1 1 I -X PD1/FSMC_D3/CAN1_TX/EVENTOUT 82 5000 650 300 L 50 50 1 1 I -X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/USART1_TX/EVENTOUT 92 -5000 -1650 300 R 50 50 1 1 I -X PH1/OSC_OUT/EVENTOUT 13 -5000 1550 300 R 50 50 1 1 I -X PA0/WKUP/USART2_CTS/UART4_TX/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 23 -5000 750 300 R 50 50 1 1 I -X PC4/EVENTOUT 33 5000 -1450 300 L 50 50 1 1 I -X PE12/FSMC_D9/TIM1_CH3N/EVENTOUT 43 5000 1350 300 L 50 50 1 1 I -X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 53 -5000 -2450 300 R 50 50 1 1 I -X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/TIM3_CH1/EVENTOUT 63 5000 -1650 300 L 50 50 1 1 I +X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 30 -5000 200 300 R 50 50 1 1 I +X PE9/FSMC_D6/TIM1_CH1/EVENTOUT 40 5000 1600 300 L 50 50 1 1 I +X VDD 50 100 3000 300 D 50 50 1 1 I +X PD13/FSMC_A18/TIM4_CH2/EVENTOUT 60 5000 -600 300 L 50 50 1 1 I +X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 70 -5000 -400 300 R 50 50 1 1 I +X PC12/UART5_TX/SDIO_CK/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 80 5000 -2300 300 L 50 50 1 1 I +X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 90 -5000 -1500 300 R 50 50 1 1 I +X VDD 11 -800 3000 300 D 50 50 1 1 I +X VREF+ 21 -2300 3000 300 D 50 50 1 1 I +X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/TIM3_CH1/TIM1_BKIN/EVENTOUT 31 -5000 100 300 R 50 50 1 1 I +X PE10/FSMC_D7/TIM1_CH2N/EVENTOUT 41 5000 1500 300 L 50 50 1 1 I +X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/OTG_HS_ID/EVENTOUT 51 -5000 -2300 300 R 50 50 1 1 I +X PD14/FSMC_D0/TIM4_CH3/EVENTOUT/_EVENTOUT 61 5000 -700 300 L 50 50 1 1 I +X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 71 -5000 -500 300 R 50 50 1 1 I +X PD0/FSMC_D2/CAN1_RX/EVENTOUT 81 5000 700 300 L 50 50 1 1 I +X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/I2S3_SD/EVENTOUT 91 -5000 -1600 300 R 50 50 1 1 I +X PH0/OSC_IN/EVENTOUT 12 -5000 2100 300 R 50 50 1 1 I +X VDDA 22 -1800 3000 300 D 50 50 1 1 I +X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/TIM1_CH1N/EVENTOUT 32 -5000 0 300 R 50 50 1 1 I +X PE11/FSMC_D8/TIM1_CH2/EVENTOUT 42 5000 1400 300 L 50 50 1 1 I +X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/EVENTOUT 52 -5000 -2400 300 R 50 50 1 1 I +X PD15/FSMC_D1/TIM4_CH4/EVENTOUT 62 5000 -800 300 L 50 50 1 1 I +X PA13/JTMS/SWDIO/EVENTOUT 72 -5000 -600 300 R 50 50 1 1 I +X PD1/FSMC_D3/CAN1_TX/EVENTOUT 82 5000 600 300 L 50 50 1 1 I +X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/USART1_TX/EVENTOUT 92 -5000 -1700 300 R 50 50 1 1 I +X PH1/OSC_OUT/EVENTOUT 13 -5000 1500 300 R 50 50 1 1 I +X PA0/WKUP/USART2_CTS/UART4_TX/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 23 -5000 700 300 R 50 50 1 1 I +X PC4/EVENTOUT 33 5000 -1500 300 L 50 50 1 1 I +X PE12/FSMC_D9/TIM1_CH3N/EVENTOUT 43 5000 1300 300 L 50 50 1 1 I +X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 53 -5000 -2500 300 R 50 50 1 1 I +X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/TIM3_CH1/EVENTOUT 63 5000 -1700 300 L 50 50 1 1 I X VCAP_2 73 1400 -3000 300 U 50 50 1 1 I -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/EVENTOUT 83 5000 550 300 L 50 50 1 1 I -X PB7/I2C1_SDA/FSMC_NL/USART1_RX/TIM4_CH2/EVENTOUT 93 -5000 -1750 300 R 50 50 1 1 I -X NRST 14 -5000 2350 300 R 50 50 1 1 I -X PA1/USART2_RTS/UART4_RX/TIM5_CH2/TIMM2_CH2/EVENTOUT 24 -5000 650 300 R 50 50 1 1 I -X PC5/EVENTOUT 34 5000 -1550 300 L 50 50 1 1 I -X PE13/FSMC_D10/TIM1_CH3/EVENTOUT 44 5000 1250 300 L 50 50 1 1 I -X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 54 -5000 -2550 300 R 50 50 1 1 I -X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/TIM3_CH2/EVENTOUT 64 5000 -1750 300 L 50 50 1 1 I +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/EVENTOUT 83 5000 500 300 L 50 50 1 1 I +X PB7/I2C1_SDA/FSMC_NL/USART1_RX/TIM4_CH2/EVENTOUT 93 -5000 -1800 300 R 50 50 1 1 I +X NRST 14 -5000 2300 300 R 50 50 1 1 I +X PA1/USART2_RTS/UART4_RX/TIM5_CH2/TIMM2_CH2/EVENTOUT 24 -5000 600 300 R 50 50 1 1 I +X PC5/EVENTOUT 34 5000 -1600 300 L 50 50 1 1 I +X PE13/FSMC_D10/TIM1_CH3/EVENTOUT 44 5000 1200 300 L 50 50 1 1 I +X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 54 -5000 -2600 300 R 50 50 1 1 I +X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/TIM3_CH2/EVENTOUT 64 5000 -1800 300 L 50 50 1 1 I X VSS 74 200 -3000 300 U 50 50 1 1 I -X PD3/FSMC_CLK/USART2_CTS/EVENTOUT 84 5000 450 300 L 50 50 1 1 I -X BOOT0 94 -5000 2550 300 R 50 50 1 1 I -X PC0/OTG_HS_ULPI_STP/EVENTOUT 15 5000 -1050 300 L 50 50 1 1 I -X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/EVENTOUT 25 -5000 550 300 R 50 50 1 1 I -X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/TIM1_CH2N/EVENTOUT 35 -5000 -1050 300 R 50 50 1 1 I -X PE14/FSMC_D11/TIM1_CH4/EVENTOUT 45 5000 1150 300 L 50 50 1 1 I -X PD8/FSMC_D13/USART3_TX/EVENTOUT 55 5000 -50 300 L 50 50 1 1 I -X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/EVENTOUT 65 5000 -1850 300 L 50 50 1 1 I -X VDD 75 450 3000 300 D 50 50 1 1 I -X PD4/FSMC_NOE/USART2_RTS/EVENTOUT 85 5000 350 300 L 50 50 1 1 I -X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/I2C1_SCL/CAN1_RX/EVENTOUT 95 -5000 -1850 300 R 50 50 1 1 I -X PC1/_EVENTOUT 16 5000 -1150 300 L 50 50 1 1 I -X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/EVENTOUT 26 -5000 450 300 R 50 50 1 1 I -X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 36 -5000 -1150 300 R 50 50 1 1 I -X PE15/FSMC_D12/TIM1_BKIN/EVENTOUT 46 5000 1050 300 L 50 50 1 1 I -X PD9/FSMC_D14/USART3_RX/EVENTOUT 56 5000 -150 300 L 50 50 1 1 I -X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/TIM3_CH4/EVENTOUT 66 5000 -1950 300 L 50 50 1 1 I -X PA14/JTCK/SWCLK/EVENTOUT 76 -5000 -650 300 R 50 50 1 1 I -X PD5/FSMC_NWE/USART2_TX/EVENTOUT 86 5000 250 300 L 50 50 1 1 I -X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/I2C1_SDA/CAN1_TX/EVENTOUT 96 -5000 -1950 300 R 50 50 1 1 I -X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/I2S2ext_SD/EVENTOUT 17 5000 -1250 300 L 50 50 1 1 I +X PD3/FSMC_CLK/USART2_CTS/EVENTOUT 84 5000 400 300 L 50 50 1 1 I +X BOOT0 94 -5000 2500 300 R 50 50 1 1 I +X PC0/OTG_HS_ULPI_STP/EVENTOUT 15 5000 -1100 300 L 50 50 1 1 I +X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/EVENTOUT 25 -5000 500 300 R 50 50 1 1 I +X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/TIM1_CH2N/EVENTOUT 35 -5000 -1100 300 R 50 50 1 1 I +X PE14/FSMC_D11/TIM1_CH4/EVENTOUT 45 5000 1100 300 L 50 50 1 1 I +X PD8/FSMC_D13/USART3_TX/EVENTOUT 55 5000 -100 300 L 50 50 1 1 I +X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/EVENTOUT 65 5000 -1900 300 L 50 50 1 1 I +X VDD 75 400 3000 300 D 50 50 1 1 I +X PD4/FSMC_NOE/USART2_RTS/EVENTOUT 85 5000 300 300 L 50 50 1 1 I +X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/I2C1_SCL/CAN1_RX/EVENTOUT 95 -5000 -1900 300 R 50 50 1 1 I +X PC1/_EVENTOUT 16 5000 -1200 300 L 50 50 1 1 I +X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/EVENTOUT 26 -5000 400 300 R 50 50 1 1 I +X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 36 -5000 -1200 300 R 50 50 1 1 I +X PE15/FSMC_D12/TIM1_BKIN/EVENTOUT 46 5000 1000 300 L 50 50 1 1 I +X PD9/FSMC_D14/USART3_RX/EVENTOUT 56 5000 -200 300 L 50 50 1 1 I +X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/TIM3_CH4/EVENTOUT 66 5000 -2000 300 L 50 50 1 1 I +X PA14/JTCK/SWCLK/EVENTOUT 76 -5000 -700 300 R 50 50 1 1 I +X PD5/FSMC_NWE/USART2_TX/EVENTOUT 86 5000 200 300 L 50 50 1 1 I +X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/I2C1_SDA/CAN1_TX/EVENTOUT 96 -5000 -2000 300 R 50 50 1 1 I +X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/I2S2ext_SD/EVENTOUT 17 5000 -1300 300 L 50 50 1 1 I X VSS 27 0 -3000 300 U 50 50 1 1 I -X PB2/BOOT1/EVENTOUT 37 -5000 -1250 300 R 50 50 1 1 I -X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/TIM2_CH3/EVENTOUT 47 -5000 -2050 300 R 50 50 1 1 I -X PD10/FSMC_D15/USART3_CK/EVENTOUT 57 5000 -250 300 L 50 50 1 1 I -X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 67 -5000 -50 300 R 50 50 1 1 I -X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 77 -5000 -750 300 R 50 50 1 1 I -X PD6/FSMC_NWAIT/USART2_RX/EVENTOUT 87 5000 150 300 L 50 50 1 1 I -X PE0/TIM4_ETR/FSMC_NBL0/EVENTOUT 97 5000 2550 300 L 50 50 1 1 I -X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/EVENTOUT 18 5000 -1350 300 L 50 50 1 1 I -X VDD 28 -150 3000 300 D 50 50 1 1 I -X PE7/FSMC_D4/TIM1_ETR/EVENTOUT 38 5000 1850 300 L 50 50 1 1 I -X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/TIM2_CH4/EVENTOUT 48 -5000 -2150 300 R 50 50 1 1 I -X PD11/FSMC_CLE/FSMC_A16/USART3_CTS/EVENTOUT 58 5000 -350 300 L 50 50 1 1 I -X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/EVENTOUT 68 -5000 -150 300 R 50 50 1 1 I -X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/USART3_TX/EVENTOUT 78 5000 -2050 300 L 50 50 1 1 I -X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2/EVENTOUT 88 5000 50 300 L 50 50 1 1 I -X PE1/FSMC_NBL1/EVENTOUT 98 5000 2450 300 L 50 50 1 1 I -X VDD 19 -450 3000 300 D 50 50 1 1 I -X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/OTG_HS_SOF/I2S3_WS/EVENTOUT 29 -5000 350 300 R 50 50 1 1 I -X PE8/FSMC_D5/TIM1_CH1N/EVENTOUT 39 5000 1750 300 L 50 50 1 1 I +X PB2/BOOT1/EVENTOUT 37 -5000 -1300 300 R 50 50 1 1 I +X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/TIM2_CH3/EVENTOUT 47 -5000 -2100 300 R 50 50 1 1 I +X PD10/FSMC_D15/USART3_CK/EVENTOUT 57 5000 -300 300 L 50 50 1 1 I +X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 67 -5000 -100 300 R 50 50 1 1 I +X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 77 -5000 -800 300 R 50 50 1 1 I +X PD6/FSMC_NWAIT/USART2_RX/EVENTOUT 87 5000 100 300 L 50 50 1 1 I +X PE0/TIM4_ETR/FSMC_NBL0/EVENTOUT 97 5000 2500 300 L 50 50 1 1 I +X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/EVENTOUT 18 5000 -1400 300 L 50 50 1 1 I +X VDD 28 -200 3000 300 D 50 50 1 1 I +X PE7/FSMC_D4/TIM1_ETR/EVENTOUT 38 5000 1800 300 L 50 50 1 1 I +X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/TIM2_CH4/EVENTOUT 48 -5000 -2200 300 R 50 50 1 1 I +X PD11/FSMC_CLE/FSMC_A16/USART3_CTS/EVENTOUT 58 5000 -400 300 L 50 50 1 1 I +X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/EVENTOUT 68 -5000 -200 300 R 50 50 1 1 I +X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/USART3_TX/EVENTOUT 78 5000 -2100 300 L 50 50 1 1 I +X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2/EVENTOUT 88 5000 0 300 L 50 50 1 1 I +X PE1/FSMC_NBL1/EVENTOUT 98 5000 2400 300 L 50 50 1 1 I +X VDD 19 -500 3000 300 D 50 50 1 1 I +X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/OTG_HS_SOF/I2S3_WS/EVENTOUT 29 -5000 300 300 R 50 50 1 1 I +X PE8/FSMC_D5/TIM1_CH1N/EVENTOUT 39 5000 1700 300 L 50 50 1 1 I X VCAP_1 49 900 -3000 300 U 50 50 1 1 I -X PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS/EVENTOUT 59 5000 -450 300 L 50 50 1 1 I -X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/EVENTOUT 69 -5000 -250 300 R 50 50 1 1 I -X PC11/UART4_RX/SPI3_MISO/SDIO_D3/USART3_RX/I2S3ext_SD/EVENTOUT 79 5000 -2150 300 L 50 50 1 1 I -X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 89 -5000 -1350 300 R 50 50 1 1 I +X PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS/EVENTOUT 59 5000 -500 300 L 50 50 1 1 I +X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/EVENTOUT 69 -5000 -300 300 R 50 50 1 1 I +X PC11/UART4_RX/SPI3_MISO/SDIO_D3/USART3_RX/I2S3ext_SD/EVENTOUT 79 5000 -2200 300 L 50 50 1 1 I +X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 89 -5000 -1400 300 R 50 50 1 1 I X VSS 99 400 -3000 300 U 50 50 1 1 I -X VDD 100 750 3000 300 D 50 50 1 1 I +X VDD 100 700 3000 300 D 50 50 1 1 I +S -4700 -2700 4700 2700 0 1 0 f ENDDRAW ENDDEF # # STM32F417VE # DEF STM32F417VE U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "STM32F417VE" 0 100 60 H V C CNN -F2 "TQFP100" 0 -100 60 H V C CNN -F3 "~" 0 0 60 H V C CNN +F0 "U" 0 0 50 H V C CNN +F1 "STM32F417VE" 0 100 50 H V C CNN +F2 "TQFP100" 0 -100 50 H V C CNN +F3 "" 0 0 50 H V C CNN DRAW -S -4700 -2700 4700 2700 0 1 0 f -X PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/EVENTOUT 1 5000 2350 300 L 50 50 1 1 I -X PE3/TRACED0/FSMC_A19/EVENTOUT 2 5000 2250 300 L 50 50 1 1 I -X PE4/TRACED1/FSMC_A20/DCMI_D4/EVENTOUT 3 5000 2150 300 L 50 50 1 1 I -X PE5/TRACED2/FSMC_A21/TIM9_CH1/DCMI_D6/EVENTOUT 4 5000 2050 300 L 50 50 1 1 I -X PE6/TRACED3_/_FSMC_A22/TIM9_CH2/DCMI_D7/EVENTOUT 5 5000 1950 300 L 50 50 1 1 I -X VBAT 6 1250 3000 300 D 50 50 1 1 I -X PC13/EVENTOUT 7 5000 -2350 300 L 50 50 1 1 I -X PC14/OSC32_IN/EVENTOUT 8 5000 -2450 300 L 50 50 1 1 I -X PC15/OSC32_OUT/EVENTOUT 9 5000 -2550 300 L 50 50 1 1 I +X PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/EVENTOUT 1 5000 2300 300 L 50 50 1 1 I +X PE3/TRACED0/FSMC_A19/EVENTOUT 2 5000 2200 300 L 50 50 1 1 I +X PE4/TRACED1/FSMC_A20/DCMI_D4/EVENTOUT 3 5000 2100 300 L 50 50 1 1 I +X PE5/TRACED2/FSMC_A21/TIM9_CH1/DCMI_D6/EVENTOUT 4 5000 2000 300 L 50 50 1 1 I +X PE6/TRACED3_/_FSMC_A22/TIM9_CH2/DCMI_D7/EVENTOUT 5 5000 1900 300 L 50 50 1 1 I +X VBAT 6 1200 3000 300 D 50 50 1 1 I +X PC13/EVENTOUT 7 5000 -2400 300 L 50 50 1 1 I +X PC14/OSC32_IN/EVENTOUT 8 5000 -2500 300 L 50 50 1 1 I +X PC15/OSC32_OUT/EVENTOUT 9 5000 -2600 300 L 50 50 1 1 I X VSS 10 -200 -3000 300 U 50 50 1 1 I X VSSA 20 -400 -3000 300 U 50 50 1 1 I -X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 30 -5000 250 300 R 50 50 1 1 I -X PE9/FSMC_D6/TIM1_CH1/EVENTOUT 40 5000 1650 300 L 50 50 1 1 I -X VDD 50 150 3000 300 D 50 50 1 1 I -X PD13/FSMC_A18/TIM4_CH2/EVENTOUT 60 5000 -550 300 L 50 50 1 1 I -X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 70 -5000 -350 300 R 50 50 1 1 I -X PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 80 5000 -2250 300 L 50 50 1 1 I -X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 90 -5000 -1450 300 R 50 50 1 1 I -X VDD 11 -750 3000 300 D 50 50 1 1 I -X VREF+ 21 -2250 3000 300 D 50 50 1 1 I -X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1_BKIN/EVENTOUT 31 -5000 150 300 R 50 50 1 1 I -X PE10/FSMC_D7/TIM1_CH2N/EVENTOUT 41 5000 1550 300 L 50 50 1 1 I -X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID/EVENTOUT 51 -5000 -2250 300 R 50 50 1 1 I -X PD14/FSMC_D0/TIM4_CH3/EVENTOUT/_EVENTOUT 61 5000 -650 300 L 50 50 1 1 I -X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 71 -5000 -450 300 R 50 50 1 1 I -X PD0/FSMC_D2/CAN1_RX/EVENTOUT 81 5000 750 300 L 50 50 1 1 I -X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/DCMI_D10/I2S3_SD/EVENTOUT 91 -5000 -1550 300 R 50 50 1 1 I -X PH0/OSC_IN/EVENTOUT 12 -5000 2150 300 R 50 50 1 1 I -X VDDA 22 -1750 3000 300 D 50 50 1 1 I -X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/RMII_CRS_DV/EVENTOUT 32 -5000 50 300 R 50 50 1 1 I -X PE11/FSMC_D8/TIM1_CH2/EVENTOUT 42 5000 1450 300 L 50 50 1 1 I -X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1/EVENTOUT 52 -5000 -2350 300 R 50 50 1 1 I -X PD15/FSMC_D1/TIM4_CH4/EVENTOUT 62 5000 -750 300 L 50 50 1 1 I -X PA13/JTMS/SWDIO/EVENTOUT 72 -5000 -550 300 R 50 50 1 1 I -X PD1/FSMC_D3/CAN1_TX/EVENTOUT 82 5000 650 300 L 50 50 1 1 I -X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/DCMI_D5/USART1_TX/EVENTOUT 92 -5000 -1650 300 R 50 50 1 1 I -X PH1/OSC_OUT/EVENTOUT 13 -5000 1550 300 R 50 50 1 1 I -X PA0/WKUP/USART2_CTS/UART4_TX/ETH_MII_CRS_/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 23 -5000 750 300 R 50 50 1 1 I -X PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0/EVENTOUT 33 5000 -1450 300 L 50 50 1 1 I -X PE12/FSMC_D9/TIM1_CH3N/EVENTOUT 43 5000 1350 300 L 50 50 1 1 I -X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 53 -5000 -2450 300 R 50 50 1 1 I -X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0/TIM3_CH1/EVENTOUT 63 5000 -1650 300 L 50 50 1 1 I +X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 30 -5000 200 300 R 50 50 1 1 I +X PE9/FSMC_D6/TIM1_CH1/EVENTOUT 40 5000 1600 300 L 50 50 1 1 I +X VDD 50 100 3000 300 D 50 50 1 1 I +X PD13/FSMC_A18/TIM4_CH2/EVENTOUT 60 5000 -600 300 L 50 50 1 1 I +X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 70 -5000 -400 300 R 50 50 1 1 I +X PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 80 5000 -2300 300 L 50 50 1 1 I +X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 90 -5000 -1500 300 R 50 50 1 1 I +X VDD 11 -800 3000 300 D 50 50 1 1 I +X VREF+ 21 -2300 3000 300 D 50 50 1 1 I +X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1_BKIN/EVENTOUT 31 -5000 100 300 R 50 50 1 1 I +X PE10/FSMC_D7/TIM1_CH2N/EVENTOUT 41 5000 1500 300 L 50 50 1 1 I +X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID/EVENTOUT 51 -5000 -2300 300 R 50 50 1 1 I +X PD14/FSMC_D0/TIM4_CH3/EVENTOUT/_EVENTOUT 61 5000 -700 300 L 50 50 1 1 I +X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 71 -5000 -500 300 R 50 50 1 1 I +X PD0/FSMC_D2/CAN1_RX/EVENTOUT 81 5000 700 300 L 50 50 1 1 I +X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/DCMI_D10/I2S3_SD/EVENTOUT 91 -5000 -1600 300 R 50 50 1 1 I +X PH0/OSC_IN/EVENTOUT 12 -5000 2100 300 R 50 50 1 1 I +X VDDA 22 -1800 3000 300 D 50 50 1 1 I +X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/RMII_CRS_DV/EVENTOUT 32 -5000 0 300 R 50 50 1 1 I +X PE11/FSMC_D8/TIM1_CH2/EVENTOUT 42 5000 1400 300 L 50 50 1 1 I +X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1/EVENTOUT 52 -5000 -2400 300 R 50 50 1 1 I +X PD15/FSMC_D1/TIM4_CH4/EVENTOUT 62 5000 -800 300 L 50 50 1 1 I +X PA13/JTMS/SWDIO/EVENTOUT 72 -5000 -600 300 R 50 50 1 1 I +X PD1/FSMC_D3/CAN1_TX/EVENTOUT 82 5000 600 300 L 50 50 1 1 I +X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/DCMI_D5/USART1_TX/EVENTOUT 92 -5000 -1700 300 R 50 50 1 1 I +X PH1/OSC_OUT/EVENTOUT 13 -5000 1500 300 R 50 50 1 1 I +X PA0/WKUP/USART2_CTS/UART4_TX/ETH_MII_CRS_/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 23 -5000 700 300 R 50 50 1 1 I +X PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0/EVENTOUT 33 5000 -1500 300 L 50 50 1 1 I +X PE12/FSMC_D9/TIM1_CH3N/EVENTOUT 43 5000 1300 300 L 50 50 1 1 I +X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 53 -5000 -2500 300 R 50 50 1 1 I +X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0/TIM3_CH1/EVENTOUT 63 5000 -1700 300 L 50 50 1 1 I X VCAP_2 73 1400 -3000 300 U 50 50 1 1 I -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11/EVENTOUT 83 5000 550 300 L 50 50 1 1 I -X PB7/I2C1_SDA/FSMC_NL/DCMI_VSYNC/USART1_RX/TIM4_CH2/EVENTOUT 93 -5000 -1750 300 R 50 50 1 1 I -X NRST 14 -5000 2350 300 R 50 50 1 1 I -X PA1/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIMM2_CH2/EVENTOUT 24 -5000 650 300 R 50 50 1 1 I -X PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1/EVENTOUT 34 5000 -1550 300 L 50 50 1 1 I -X PE13/FSMC_D10/TIM1_CH3/EVENTOUT 44 5000 1250 300 L 50 50 1 1 I -X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 54 -5000 -2550 300 R 50 50 1 1 I -X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1/TIM3_CH2/EVENTOUT 64 5000 -1750 300 L 50 50 1 1 I +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11/EVENTOUT 83 5000 500 300 L 50 50 1 1 I +X PB7/I2C1_SDA/FSMC_NL/DCMI_VSYNC/USART1_RX/TIM4_CH2/EVENTOUT 93 -5000 -1800 300 R 50 50 1 1 I +X NRST 14 -5000 2300 300 R 50 50 1 1 I +X PA1/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIMM2_CH2/EVENTOUT 24 -5000 600 300 R 50 50 1 1 I +X PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1/EVENTOUT 34 5000 -1600 300 L 50 50 1 1 I +X PE13/FSMC_D10/TIM1_CH3/EVENTOUT 44 5000 1200 300 L 50 50 1 1 I +X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 54 -5000 -2600 300 R 50 50 1 1 I +X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1/TIM3_CH2/EVENTOUT 64 5000 -1800 300 L 50 50 1 1 I X VSS 74 200 -3000 300 U 50 50 1 1 I -X PD3/FSMC_CLK/USART2_CTS/EVENTOUT 84 5000 450 300 L 50 50 1 1 I -X BOOT0 94 -5000 2550 300 R 50 50 1 1 I -X PC0/OTG_HS_ULPI_STP/EVENTOUT 15 5000 -1050 300 L 50 50 1 1 I -X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO/EVENTOUT 25 -5000 550 300 R 50 50 1 1 I -X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N/EVENTOUT 35 -5000 -1050 300 R 50 50 1 1 I -X PE14/FSMC_D11/TIM1_CH4/EVENTOUT 45 5000 1150 300 L 50 50 1 1 I -X PD8/FSMC_D13/USART3_TX/EVENTOUT 55 5000 -50 300 L 50 50 1 1 I -X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2/EVENTOUT 65 5000 -1850 300 L 50 50 1 1 I -X VDD 75 450 3000 300 D 50 50 1 1 I -X PD4/FSMC_NOE/USART2_RTS/EVENTOUT 85 5000 350 300 L 50 50 1 1 I -X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/DCMI_D6/ETH_MII_TXD3/I2C1_SCL/CAN1_RX/EVENTOUT 95 -5000 -1850 300 R 50 50 1 1 I -X PC1/ETH_MDC/_EVENTOUT 16 5000 -1150 300 L 50 50 1 1 I -X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL/EVENTOUT 26 -5000 450 300 R 50 50 1 1 I -X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 36 -5000 -1150 300 R 50 50 1 1 I -X PE15/FSMC_D12/TIM1_BKIN/EVENTOUT 46 5000 1050 300 L 50 50 1 1 I -X PD9/FSMC_D14/USART3_RX/EVENTOUT 56 5000 -150 300 L 50 50 1 1 I -X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4/EVENTOUT 66 5000 -1950 300 L 50 50 1 1 I -X PA14/JTCK/SWCLK/EVENTOUT 76 -5000 -650 300 R 50 50 1 1 I -X PD5/FSMC_NWE/USART2_TX/EVENTOUT 86 5000 250 300 L 50 50 1 1 I -X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TX/EVENTOUT 96 -5000 -1950 300 R 50 50 1 1 I -X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD/EVENTOUT 17 5000 -1250 300 L 50 50 1 1 I +X PD3/FSMC_CLK/USART2_CTS/EVENTOUT 84 5000 400 300 L 50 50 1 1 I +X BOOT0 94 -5000 2500 300 R 50 50 1 1 I +X PC0/OTG_HS_ULPI_STP/EVENTOUT 15 5000 -1100 300 L 50 50 1 1 I +X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO/EVENTOUT 25 -5000 500 300 R 50 50 1 1 I +X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N/EVENTOUT 35 -5000 -1100 300 R 50 50 1 1 I +X PE14/FSMC_D11/TIM1_CH4/EVENTOUT 45 5000 1100 300 L 50 50 1 1 I +X PD8/FSMC_D13/USART3_TX/EVENTOUT 55 5000 -100 300 L 50 50 1 1 I +X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2/EVENTOUT 65 5000 -1900 300 L 50 50 1 1 I +X VDD 75 400 3000 300 D 50 50 1 1 I +X PD4/FSMC_NOE/USART2_RTS/EVENTOUT 85 5000 300 300 L 50 50 1 1 I +X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/DCMI_D6/ETH_MII_TXD3/I2C1_SCL/CAN1_RX/EVENTOUT 95 -5000 -1900 300 R 50 50 1 1 I +X PC1/ETH_MDC/_EVENTOUT 16 5000 -1200 300 L 50 50 1 1 I +X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL/EVENTOUT 26 -5000 400 300 R 50 50 1 1 I +X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 36 -5000 -1200 300 R 50 50 1 1 I +X PE15/FSMC_D12/TIM1_BKIN/EVENTOUT 46 5000 1000 300 L 50 50 1 1 I +X PD9/FSMC_D14/USART3_RX/EVENTOUT 56 5000 -200 300 L 50 50 1 1 I +X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4/EVENTOUT 66 5000 -2000 300 L 50 50 1 1 I +X PA14/JTCK/SWCLK/EVENTOUT 76 -5000 -700 300 R 50 50 1 1 I +X PD5/FSMC_NWE/USART2_TX/EVENTOUT 86 5000 200 300 L 50 50 1 1 I +X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TX/EVENTOUT 96 -5000 -2000 300 R 50 50 1 1 I +X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD/EVENTOUT 17 5000 -1300 300 L 50 50 1 1 I X VSS 27 0 -3000 300 U 50 50 1 1 I -X PB2/BOOT1/EVENTOUT 37 -5000 -1250 300 R 50 50 1 1 I -X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3/EVENTOUT 47 -5000 -2050 300 R 50 50 1 1 I -X PD10/FSMC_D15/USART3_CK/EVENTOUT 57 5000 -250 300 L 50 50 1 1 I -X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 67 -5000 -50 300 R 50 50 1 1 I -X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 77 -5000 -750 300 R 50 50 1 1 I -X PD6/FSMC_NWAIT/USART2_RX/EVENTOUT 87 5000 150 300 L 50 50 1 1 I -X PE0/TIM4_ETR/FSMC_NBL0/DCMI_D2/EVENTOUT 97 5000 2550 300 L 50 50 1 1 I -X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/EVENTOUT 18 5000 -1350 300 L 50 50 1 1 I -X VDD 28 -150 3000 300 D 50 50 1 1 I -X PE7/FSMC_D4/TIM1_ETR/EVENTOUT 38 5000 1850 300 L 50 50 1 1 I -X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4/EVENTOUT 48 -5000 -2150 300 R 50 50 1 1 I -X PD11/FSMC_CLE/FSMC_A16/USART3_CTS/EVENTOUT 58 5000 -350 300 L 50 50 1 1 I -X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/DCMI_D0/EVENTOUT 68 -5000 -150 300 R 50 50 1 1 I -X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX/EVENTOUT 78 5000 -2050 300 L 50 50 1 1 I -X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2/EVENTOUT 88 5000 50 300 L 50 50 1 1 I -X PE1/FSMC_NBL1/DCMI_D3/EVENTOUT 98 5000 2450 300 L 50 50 1 1 I -X VDD 19 -450 3000 300 D 50 50 1 1 I -X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC/OTG_HS_SOF/I2S3_WS/EVENTOUT 29 -5000 350 300 R 50 50 1 1 I -X PE8/FSMC_D5/TIM1_CH1N/EVENTOUT 39 5000 1750 300 L 50 50 1 1 I +X PB2/BOOT1/EVENTOUT 37 -5000 -1300 300 R 50 50 1 1 I +X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3/EVENTOUT 47 -5000 -2100 300 R 50 50 1 1 I +X PD10/FSMC_D15/USART3_CK/EVENTOUT 57 5000 -300 300 L 50 50 1 1 I +X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 67 -5000 -100 300 R 50 50 1 1 I +X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 77 -5000 -800 300 R 50 50 1 1 I +X PD6/FSMC_NWAIT/USART2_RX/EVENTOUT 87 5000 100 300 L 50 50 1 1 I +X PE0/TIM4_ETR/FSMC_NBL0/DCMI_D2/EVENTOUT 97 5000 2500 300 L 50 50 1 1 I +X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/EVENTOUT 18 5000 -1400 300 L 50 50 1 1 I +X VDD 28 -200 3000 300 D 50 50 1 1 I +X PE7/FSMC_D4/TIM1_ETR/EVENTOUT 38 5000 1800 300 L 50 50 1 1 I +X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4/EVENTOUT 48 -5000 -2200 300 R 50 50 1 1 I +X PD11/FSMC_CLE/FSMC_A16/USART3_CTS/EVENTOUT 58 5000 -400 300 L 50 50 1 1 I +X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/DCMI_D0/EVENTOUT 68 -5000 -200 300 R 50 50 1 1 I +X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX/EVENTOUT 78 5000 -2100 300 L 50 50 1 1 I +X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2/EVENTOUT 88 5000 0 300 L 50 50 1 1 I +X PE1/FSMC_NBL1/DCMI_D3/EVENTOUT 98 5000 2400 300 L 50 50 1 1 I +X VDD 19 -500 3000 300 D 50 50 1 1 I +X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC/OTG_HS_SOF/I2S3_WS/EVENTOUT 29 -5000 300 300 R 50 50 1 1 I +X PE8/FSMC_D5/TIM1_CH1N/EVENTOUT 39 5000 1700 300 L 50 50 1 1 I X VCAP_1 49 900 -3000 300 U 50 50 1 1 I -X PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS/EVENTOUT 59 5000 -450 300 L 50 50 1 1 I -X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/DCMI_D1/EVENTOUT 69 -5000 -250 300 R 50 50 1 1 I -X PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4/USART3_RX/I2S3ext_SD/EVENTOUT 79 5000 -2150 300 L 50 50 1 1 I -X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 89 -5000 -1350 300 R 50 50 1 1 I +X PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS/EVENTOUT 59 5000 -500 300 L 50 50 1 1 I +X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/DCMI_D1/EVENTOUT 69 -5000 -300 300 R 50 50 1 1 I +X PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4/USART3_RX/I2S3ext_SD/EVENTOUT 79 5000 -2200 300 L 50 50 1 1 I +X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 89 -5000 -1400 300 R 50 50 1 1 I X VSS 99 400 -3000 300 U 50 50 1 1 I -X VDD 100 750 3000 300 D 50 50 1 1 I +X VDD 100 700 3000 300 D 50 50 1 1 I +S -4700 -2700 4700 2700 0 1 0 f ENDDRAW ENDDEF # # STM32F417VG # DEF STM32F417VG U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "STM32F417VG" 0 100 60 H V C CNN -F2 "TQFP100" 0 -100 60 H V C CNN -F3 "~" 0 0 60 H V C CNN +F0 "U" 0 0 50 H V C CNN +F1 "STM32F417VG" 0 100 50 H V C CNN +F2 "TQFP100" 0 -100 50 H V C CNN +F3 "" 0 0 50 H V C CNN DRAW -S -4700 -2700 4700 2700 0 1 0 f -X PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/EVENTOUT 1 5000 2350 300 L 50 50 1 1 I -X PE3/TRACED0/FSMC_A19/EVENTOUT 2 5000 2250 300 L 50 50 1 1 I -X PE4/TRACED1/FSMC_A20/DCMI_D4/EVENTOUT 3 5000 2150 300 L 50 50 1 1 I -X PE5/TRACED2/FSMC_A21/TIM9_CH1/DCMI_D6/EVENTOUT 4 5000 2050 300 L 50 50 1 1 I -X PE6/TRACED3_/_FSMC_A22/TIM9_CH2/DCMI_D7/EVENTOUT 5 5000 1950 300 L 50 50 1 1 I -X VBAT 6 1250 3000 300 D 50 50 1 1 I -X PC13/EVENTOUT 7 5000 -2350 300 L 50 50 1 1 I -X PC14/OSC32_IN/EVENTOUT 8 5000 -2450 300 L 50 50 1 1 I -X PC15/OSC32_OUT/EVENTOUT 9 5000 -2550 300 L 50 50 1 1 I +X PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/EVENTOUT 1 5000 2300 300 L 50 50 1 1 I +X PE3/TRACED0/FSMC_A19/EVENTOUT 2 5000 2200 300 L 50 50 1 1 I +X PE4/TRACED1/FSMC_A20/DCMI_D4/EVENTOUT 3 5000 2100 300 L 50 50 1 1 I +X PE5/TRACED2/FSMC_A21/TIM9_CH1/DCMI_D6/EVENTOUT 4 5000 2000 300 L 50 50 1 1 I +X PE6/TRACED3_/_FSMC_A22/TIM9_CH2/DCMI_D7/EVENTOUT 5 5000 1900 300 L 50 50 1 1 I +X VBAT 6 1200 3000 300 D 50 50 1 1 I +X PC13/EVENTOUT 7 5000 -2400 300 L 50 50 1 1 I +X PC14/OSC32_IN/EVENTOUT 8 5000 -2500 300 L 50 50 1 1 I +X PC15/OSC32_OUT/EVENTOUT 9 5000 -2600 300 L 50 50 1 1 I X VSS 10 -200 -3000 300 U 50 50 1 1 I X VSSA 20 -400 -3000 300 U 50 50 1 1 I -X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 30 -5000 250 300 R 50 50 1 1 I -X PE9/FSMC_D6/TIM1_CH1/EVENTOUT 40 5000 1650 300 L 50 50 1 1 I -X VDD 50 150 3000 300 D 50 50 1 1 I -X PD13/FSMC_A18/TIM4_CH2/EVENTOUT 60 5000 -550 300 L 50 50 1 1 I -X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 70 -5000 -350 300 R 50 50 1 1 I -X PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 80 5000 -2250 300 L 50 50 1 1 I -X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 90 -5000 -1450 300 R 50 50 1 1 I -X VDD 11 -750 3000 300 D 50 50 1 1 I -X VREF+ 21 -2250 3000 300 D 50 50 1 1 I -X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1_BKIN/EVENTOUT 31 -5000 150 300 R 50 50 1 1 I -X PE10/FSMC_D7/TIM1_CH2N/EVENTOUT 41 5000 1550 300 L 50 50 1 1 I -X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID/EVENTOUT 51 -5000 -2250 300 R 50 50 1 1 I -X PD14/FSMC_D0/TIM4_CH3/EVENTOUT/_EVENTOUT 61 5000 -650 300 L 50 50 1 1 I -X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 71 -5000 -450 300 R 50 50 1 1 I -X PD0/FSMC_D2/CAN1_RX/EVENTOUT 81 5000 750 300 L 50 50 1 1 I -X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/DCMI_D10/I2S3_SD/EVENTOUT 91 -5000 -1550 300 R 50 50 1 1 I -X PH0/OSC_IN/EVENTOUT 12 -5000 2150 300 R 50 50 1 1 I -X VDDA 22 -1750 3000 300 D 50 50 1 1 I -X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/RMII_CRS_DV/EVENTOUT 32 -5000 50 300 R 50 50 1 1 I -X PE11/FSMC_D8/TIM1_CH2/EVENTOUT 42 5000 1450 300 L 50 50 1 1 I -X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1/EVENTOUT 52 -5000 -2350 300 R 50 50 1 1 I -X PD15/FSMC_D1/TIM4_CH4/EVENTOUT 62 5000 -750 300 L 50 50 1 1 I -X PA13/JTMS/SWDIO/EVENTOUT 72 -5000 -550 300 R 50 50 1 1 I -X PD1/FSMC_D3/CAN1_TX/EVENTOUT 82 5000 650 300 L 50 50 1 1 I -X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/DCMI_D5/USART1_TX/EVENTOUT 92 -5000 -1650 300 R 50 50 1 1 I -X PH1/OSC_OUT/EVENTOUT 13 -5000 1550 300 R 50 50 1 1 I -X PA0/WKUP/USART2_CTS/UART4_TX/ETH_MII_CRS_/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 23 -5000 750 300 R 50 50 1 1 I -X PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0/EVENTOUT 33 5000 -1450 300 L 50 50 1 1 I -X PE12/FSMC_D9/TIM1_CH3N/EVENTOUT 43 5000 1350 300 L 50 50 1 1 I -X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 53 -5000 -2450 300 R 50 50 1 1 I -X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0/TIM3_CH1/EVENTOUT 63 5000 -1650 300 L 50 50 1 1 I +X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CHIN/EVENTOUT 30 -5000 200 300 R 50 50 1 1 I +X PE9/FSMC_D6/TIM1_CH1/EVENTOUT 40 5000 1600 300 L 50 50 1 1 I +X VDD 50 100 3000 300 D 50 50 1 1 I +X PD13/FSMC_A18/TIM4_CH2/EVENTOUT 60 5000 -600 300 L 50 50 1 1 I +X PA11/USART1_CTS/CAN1_RX/TIM1_CH4_/OTG_FS_DM/EVENTOUT 70 -5000 -400 300 R 50 50 1 1 I +X PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT 80 5000 -2300 300 L 50 50 1 1 I +X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT 90 -5000 -1500 300 R 50 50 1 1 I +X VDD 11 -800 3000 300 D 50 50 1 1 I +X VREF+ 21 -2300 3000 300 D 50 50 1 1 I +X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1_BKIN/EVENTOUT 31 -5000 100 300 R 50 50 1 1 I +X PE10/FSMC_D7/TIM1_CH2N/EVENTOUT 41 5000 1500 300 L 50 50 1 1 I +X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID/EVENTOUT 51 -5000 -2300 300 R 50 50 1 1 I +X PD14/FSMC_D0/TIM4_CH3/EVENTOUT/_EVENTOUT 61 5000 -700 300 L 50 50 1 1 I +X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT 71 -5000 -500 300 R 50 50 1 1 I +X PD0/FSMC_D2/CAN1_RX/EVENTOUT 81 5000 700 300 L 50 50 1 1 I +X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/DCMI_D10/I2S3_SD/EVENTOUT 91 -5000 -1600 300 R 50 50 1 1 I +X PH0/OSC_IN/EVENTOUT 12 -5000 2100 300 R 50 50 1 1 I +X VDDA 22 -1800 3000 300 D 50 50 1 1 I +X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/RMII_CRS_DV/EVENTOUT 32 -5000 0 300 R 50 50 1 1 I +X PE11/FSMC_D8/TIM1_CH2/EVENTOUT 42 5000 1400 300 L 50 50 1 1 I +X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1/EVENTOUT 52 -5000 -2400 300 R 50 50 1 1 I +X PD15/FSMC_D1/TIM4_CH4/EVENTOUT 62 5000 -800 300 L 50 50 1 1 I +X PA13/JTMS/SWDIO/EVENTOUT 72 -5000 -600 300 R 50 50 1 1 I +X PD1/FSMC_D3/CAN1_TX/EVENTOUT 82 5000 600 300 L 50 50 1 1 I +X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/DCMI_D5/USART1_TX/EVENTOUT 92 -5000 -1700 300 R 50 50 1 1 I +X PH1/OSC_OUT/EVENTOUT 13 -5000 1500 300 R 50 50 1 1 I +X PA0/WKUP/USART2_CTS/UART4_TX/ETH_MII_CRS_/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT 23 -5000 700 300 R 50 50 1 1 I +X PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0/EVENTOUT 33 5000 -1500 300 L 50 50 1 1 I +X PE12/FSMC_D9/TIM1_CH3N/EVENTOUT 43 5000 1300 300 L 50 50 1 1 I +X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT 53 -5000 -2500 300 R 50 50 1 1 I +X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0/TIM3_CH1/EVENTOUT 63 5000 -1700 300 L 50 50 1 1 I X VCAP_2 73 1400 -3000 300 U 50 50 1 1 I -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11/EVENTOUT 83 5000 550 300 L 50 50 1 1 I -X PB7/I2C1_SDA/FSMC_NL/DCMI_VSYNC/USART1_RX/TIM4_CH2/EVENTOUT 93 -5000 -1750 300 R 50 50 1 1 I -X NRST 14 -5000 2350 300 R 50 50 1 1 I -X PA1/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIMM2_CH2/EVENTOUT 24 -5000 650 300 R 50 50 1 1 I -X PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1/EVENTOUT 34 5000 -1550 300 L 50 50 1 1 I -X PE13/FSMC_D10/TIM1_CH3/EVENTOUT 44 5000 1250 300 L 50 50 1 1 I -X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 54 -5000 -2550 300 R 50 50 1 1 I -X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1/TIM3_CH2/EVENTOUT 64 5000 -1750 300 L 50 50 1 1 I +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11/EVENTOUT 83 5000 500 300 L 50 50 1 1 I +X PB7/I2C1_SDA/FSMC_NL/DCMI_VSYNC/USART1_RX/TIM4_CH2/EVENTOUT 93 -5000 -1800 300 R 50 50 1 1 I +X NRST 14 -5000 2300 300 R 50 50 1 1 I +X PA1/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIMM2_CH2/EVENTOUT 24 -5000 600 300 R 50 50 1 1 I +X PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1/EVENTOUT 34 5000 -1600 300 L 50 50 1 1 I +X PE13/FSMC_D10/TIM1_CH3/EVENTOUT 44 5000 1200 300 L 50 50 1 1 I +X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT 54 -5000 -2600 300 R 50 50 1 1 I +X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1/TIM3_CH2/EVENTOUT 64 5000 -1800 300 L 50 50 1 1 I X VSS 74 200 -3000 300 U 50 50 1 1 I -X PD3/FSMC_CLK/USART2_CTS/EVENTOUT 84 5000 450 300 L 50 50 1 1 I -X BOOT0 94 -5000 2550 300 R 50 50 1 1 I -X PC0/OTG_HS_ULPI_STP/EVENTOUT 15 5000 -1050 300 L 50 50 1 1 I -X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO/EVENTOUT 25 -5000 550 300 R 50 50 1 1 I -X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N/EVENTOUT 35 -5000 -1050 300 R 50 50 1 1 I -X PE14/FSMC_D11/TIM1_CH4/EVENTOUT 45 5000 1150 300 L 50 50 1 1 I -X PD8/FSMC_D13/USART3_TX/EVENTOUT 55 5000 -50 300 L 50 50 1 1 I -X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2/EVENTOUT 65 5000 -1850 300 L 50 50 1 1 I -X VDD 75 450 3000 300 D 50 50 1 1 I -X PD4/FSMC_NOE/USART2_RTS/EVENTOUT 85 5000 350 300 L 50 50 1 1 I -X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/DCMI_D6/ETH_MII_TXD3/I2C1_SCL/CAN1_RX/EVENTOUT 95 -5000 -1850 300 R 50 50 1 1 I -X PC1/ETH_MDC/_EVENTOUT 16 5000 -1150 300 L 50 50 1 1 I -X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL/EVENTOUT 26 -5000 450 300 R 50 50 1 1 I -X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 36 -5000 -1150 300 R 50 50 1 1 I -X PE15/FSMC_D12/TIM1_BKIN/EVENTOUT 46 5000 1050 300 L 50 50 1 1 I -X PD9/FSMC_D14/USART3_RX/EVENTOUT 56 5000 -150 300 L 50 50 1 1 I -X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4/EVENTOUT 66 5000 -1950 300 L 50 50 1 1 I -X PA14/JTCK/SWCLK/EVENTOUT 76 -5000 -650 300 R 50 50 1 1 I -X PD5/FSMC_NWE/USART2_TX/EVENTOUT 86 5000 250 300 L 50 50 1 1 I -X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TX/EVENTOUT 96 -5000 -1950 300 R 50 50 1 1 I -X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD/EVENTOUT 17 5000 -1250 300 L 50 50 1 1 I +X PD3/FSMC_CLK/USART2_CTS/EVENTOUT 84 5000 400 300 L 50 50 1 1 I +X BOOT0 94 -5000 2500 300 R 50 50 1 1 I +X PC0/OTG_HS_ULPI_STP/EVENTOUT 15 5000 -1100 300 L 50 50 1 1 I +X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO/EVENTOUT 25 -5000 500 300 R 50 50 1 1 I +X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N/EVENTOUT 35 -5000 -1100 300 R 50 50 1 1 I +X PE14/FSMC_D11/TIM1_CH4/EVENTOUT 45 5000 1100 300 L 50 50 1 1 I +X PD8/FSMC_D13/USART3_TX/EVENTOUT 55 5000 -100 300 L 50 50 1 1 I +X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2/EVENTOUT 65 5000 -1900 300 L 50 50 1 1 I +X VDD 75 400 3000 300 D 50 50 1 1 I +X PD4/FSMC_NOE/USART2_RTS/EVENTOUT 85 5000 300 300 L 50 50 1 1 I +X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/DCMI_D6/ETH_MII_TXD3/I2C1_SCL/CAN1_RX/EVENTOUT 95 -5000 -1900 300 R 50 50 1 1 I +X PC1/ETH_MDC/_EVENTOUT 16 5000 -1200 300 L 50 50 1 1 I +X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL/EVENTOUT 26 -5000 400 300 R 50 50 1 1 I +X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/OTG_HS_INTN/TIM1_CH3N/EVENTOUT 36 -5000 -1200 300 R 50 50 1 1 I +X PE15/FSMC_D12/TIM1_BKIN/EVENTOUT 46 5000 1000 300 L 50 50 1 1 I +X PD9/FSMC_D14/USART3_RX/EVENTOUT 56 5000 -200 300 L 50 50 1 1 I +X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4/EVENTOUT 66 5000 -2000 300 L 50 50 1 1 I +X PA14/JTCK/SWCLK/EVENTOUT 76 -5000 -700 300 R 50 50 1 1 I +X PD5/FSMC_NWE/USART2_TX/EVENTOUT 86 5000 200 300 L 50 50 1 1 I +X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TX/EVENTOUT 96 -5000 -2000 300 R 50 50 1 1 I +X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD/EVENTOUT 17 5000 -1300 300 L 50 50 1 1 I X VSS 27 0 -3000 300 U 50 50 1 1 I -X PB2/BOOT1/EVENTOUT 37 -5000 -1250 300 R 50 50 1 1 I -X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3/EVENTOUT 47 -5000 -2050 300 R 50 50 1 1 I -X PD10/FSMC_D15/USART3_CK/EVENTOUT 57 5000 -250 300 L 50 50 1 1 I -X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 67 -5000 -50 300 R 50 50 1 1 I -X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 77 -5000 -750 300 R 50 50 1 1 I -X PD6/FSMC_NWAIT/USART2_RX/EVENTOUT 87 5000 150 300 L 50 50 1 1 I -X PE0/TIM4_ETR/FSMC_NBL0/DCMI_D2/EVENTOUT 97 5000 2550 300 L 50 50 1 1 I -X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/EVENTOUT 18 5000 -1350 300 L 50 50 1 1 I -X VDD 28 -150 3000 300 D 50 50 1 1 I -X PE7/FSMC_D4/TIM1_ETR/EVENTOUT 38 5000 1850 300 L 50 50 1 1 I -X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4/EVENTOUT 48 -5000 -2150 300 R 50 50 1 1 I -X PD11/FSMC_CLE/FSMC_A16/USART3_CTS/EVENTOUT 58 5000 -350 300 L 50 50 1 1 I -X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/DCMI_D0/EVENTOUT 68 -5000 -150 300 R 50 50 1 1 I -X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX/EVENTOUT 78 5000 -2050 300 L 50 50 1 1 I -X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2/EVENTOUT 88 5000 50 300 L 50 50 1 1 I -X PE1/FSMC_NBL1/DCMI_D3/EVENTOUT 98 5000 2450 300 L 50 50 1 1 I -X VDD 19 -450 3000 300 D 50 50 1 1 I -X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC/OTG_HS_SOF/I2S3_WS/EVENTOUT 29 -5000 350 300 R 50 50 1 1 I -X PE8/FSMC_D5/TIM1_CH1N/EVENTOUT 39 5000 1750 300 L 50 50 1 1 I +X PB2/BOOT1/EVENTOUT 37 -5000 -1300 300 R 50 50 1 1 I +X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3/EVENTOUT 47 -5000 -2100 300 R 50 50 1 1 I +X PD10/FSMC_D15/USART3_CK/EVENTOUT 57 5000 -300 300 L 50 50 1 1 I +X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT 67 -5000 -100 300 R 50 50 1 1 I +X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT 77 -5000 -800 300 R 50 50 1 1 I +X PD6/FSMC_NWAIT/USART2_RX/EVENTOUT 87 5000 100 300 L 50 50 1 1 I +X PE0/TIM4_ETR/FSMC_NBL0/DCMI_D2/EVENTOUT 97 5000 2500 300 L 50 50 1 1 I +X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/EVENTOUT 18 5000 -1400 300 L 50 50 1 1 I +X VDD 28 -200 3000 300 D 50 50 1 1 I +X PE7/FSMC_D4/TIM1_ETR/EVENTOUT 38 5000 1800 300 L 50 50 1 1 I +X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4/EVENTOUT 48 -5000 -2200 300 R 50 50 1 1 I +X PD11/FSMC_CLE/FSMC_A16/USART3_CTS/EVENTOUT 58 5000 -400 300 L 50 50 1 1 I +X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/DCMI_D0/EVENTOUT 68 -5000 -200 300 R 50 50 1 1 I +X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX/EVENTOUT 78 5000 -2100 300 L 50 50 1 1 I +X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2/EVENTOUT 88 5000 0 300 L 50 50 1 1 I +X PE1/FSMC_NBL1/DCMI_D3/EVENTOUT 98 5000 2400 300 L 50 50 1 1 I +X VDD 19 -500 3000 300 D 50 50 1 1 I +X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC/OTG_HS_SOF/I2S3_WS/EVENTOUT 29 -5000 300 300 R 50 50 1 1 I +X PE8/FSMC_D5/TIM1_CH1N/EVENTOUT 39 5000 1700 300 L 50 50 1 1 I X VCAP_1 49 900 -3000 300 U 50 50 1 1 I -X PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS/EVENTOUT 59 5000 -450 300 L 50 50 1 1 I -X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/DCMI_D1/EVENTOUT 69 -5000 -250 300 R 50 50 1 1 I -X PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4/USART3_RX/I2S3ext_SD/EVENTOUT 79 5000 -2150 300 L 50 50 1 1 I -X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 89 -5000 -1350 300 R 50 50 1 1 I +X PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS/EVENTOUT 59 5000 -500 300 L 50 50 1 1 I +X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/DCMI_D1/EVENTOUT 69 -5000 -300 300 R 50 50 1 1 I +X PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4/USART3_RX/I2S3ext_SD/EVENTOUT 79 5000 -2200 300 L 50 50 1 1 I +X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT 89 -5000 -1400 300 R 50 50 1 1 I X VSS 99 400 -3000 300 U 50 50 1 1 I -X VDD 100 750 3000 300 D 50 50 1 1 I +X VDD 100 700 3000 300 D 50 50 1 1 I +S -4700 -2700 4700 2700 0 1 0 f ENDDRAW ENDDEF #