From a1b7ddce93722c1f7f49f6ec5e218fcb431f872f Mon Sep 17 00:00:00 2001
From: Stefan Olsson <stol@bredband.net>
Date: Sat, 12 Aug 2017 14:30:14 +0200
Subject: [PATCH 1/6] Added Intersil ICL7673

---
 library/intersil.dcm | 40 +++++++++++++++++++++++-----------------
 1 file changed, 23 insertions(+), 17 deletions(-)

diff --git a/library/intersil.dcm b/library/intersil.dcm
index 2f8ffd55..ec3814de 100644
--- a/library/intersil.dcm
+++ b/library/intersil.dcm
@@ -18,34 +18,28 @@ K Driver, Dual MOSFET
 F http://www.intersil.com/content/dam/Intersil/documents/el72/el7202-12-22.pdf
 $ENDCMP
 #
-$CMP HIP2100IR4
-D High Frequency Half Bridge Driver, Output Current 2.0A, 100V, DFN-8 4x4mm
-K Half Bridge Gate Driver
-F http://www.intersil.com/content/dam/Intersil/documents/hip2/hip2100.pdf
-$ENDCMP
-#
 $CMP HIP2100EIB
 D High Frequency Half Bridge Driver, Output Current 2.0A, 100V, EPSOIC-8
 K Half Bridge Gate Driver
 F http://www.intersil.com/content/dam/Intersil/documents/hip2/hip2100.pdf
 $ENDCMP
 #
-$CMP HIP2100IR
-D High Frequency Half Bridge Driver, Output Current 2.0A, 100V, QFN-16 5x5mm
-K Half Bridge Gate Driver
-F http://www.intersil.com/content/dam/Intersil/documents/hip2/hip2100.pdf
-$ENDCMP
-#
 $CMP HIP2100IB
 D High Frequency Half Bridge Driver, Output Current 2.0A, 100V, SOIC-8
 K Half Bridge Gate Driver
 F http://www.intersil.com/content/dam/Intersil/documents/hip2/hip2100.pdf
 $ENDCMP
 #
-$CMP HIP2101IR4
-D High Frequency Half Bridge Driver, TTL/CMOS inputs, Output Current 2.0A, 100V, DFN-8 4x4mm
+$CMP HIP2100IR
+D High Frequency Half Bridge Driver, Output Current 2.0A, 100V, QFN-16 5x5mm
 K Half Bridge Gate Driver
-F http://www.intersil.com/content/dam/Intersil/documents/hip2/hip2101.pdf
+F http://www.intersil.com/content/dam/Intersil/documents/hip2/hip2100.pdf
+$ENDCMP
+#
+$CMP HIP2100IR4
+D High Frequency Half Bridge Driver, Output Current 2.0A, 100V, DFN-8 4x4mm
+K Half Bridge Gate Driver
+F http://www.intersil.com/content/dam/Intersil/documents/hip2/hip2100.pdf
 $ENDCMP
 #
 $CMP HIP2101EIB
@@ -54,14 +48,20 @@ K Half Bridge Gate Driver
 F http://www.intersil.com/content/dam/Intersil/documents/hip2/hip2101.pdf
 $ENDCMP
 #
+$CMP HIP2101IB
+D High Frequency Half Bridge Driver, TTL/CMOS inputs, Output Current 2.0A, 100V, SOIC-8
+K Half Bridge Gate Driver
+F http://www.intersil.com/content/dam/Intersil/documents/hip2/hip2101.pdf
+$ENDCMP
+#
 $CMP HIP2101IR
 D High Frequency Half Bridge Driver, TTL/CMOS inputs, Output Current 2.0A, 100V, QFN-16 5x5mm
 K Half Bridge Gate Driver
 F http://www.intersil.com/content/dam/Intersil/documents/hip2/hip2101.pdf
 $ENDCMP
 #
-$CMP HIP2101IB
-D High Frequency Half Bridge Driver, TTL/CMOS inputs, Output Current 2.0A, 100V, SOIC-8
+$CMP HIP2101IR4
+D High Frequency Half Bridge Driver, TTL/CMOS inputs, Output Current 2.0A, 100V, DFN-8 4x4mm
 K Half Bridge Gate Driver
 F http://www.intersil.com/content/dam/Intersil/documents/hip2/hip2101.pdf
 $ENDCMP
@@ -78,4 +78,10 @@ K Half Bridge Gate Driver
 F http://www.intersil.com/content/dam/Intersil/documents/hip4/hip4080a.pdf
 $ENDCMP
 #
+$CMP ICL7673
+D Automatic Battery Back-Up Switch, 2.5 - 15V VDD, SOIC-14 or PDIP-14
+K Automatic Battery Back-Up Switch, 2.5 - 15V VDD, SOIC-14 or PDIP-14
+F http://www.intersil.com/content/dam/Intersil/documents/icl7/icl7673.pdf
+$ENDCMP
+#
 #End Doc Library

From 6bba529999eaacf17cbe4dc7562e4d43a6285903 Mon Sep 17 00:00:00 2001
From: Stefan Olsson <stol@bredband.net>
Date: Sat, 12 Aug 2017 14:30:19 +0200
Subject: [PATCH 2/6] Added Intersil ICL7673

---
 library/intersil.lib | 108 ++++++++++++++++++++++++++-----------------
 1 file changed, 66 insertions(+), 42 deletions(-)

diff --git a/library/intersil.lib b/library/intersil.lib
index a456315e..73897d24 100644
--- a/library/intersil.lib
+++ b/library/intersil.lib
@@ -73,35 +73,6 @@ X NC 8 600 300 200 L 50 50 1 1 N N
 ENDDRAW
 ENDDEF
 #
-# HIP2100IR4
-#
-DEF HIP2100IR4 U 0 40 Y Y 1 F N
-F0 "U" 0 525 50 H V C CNN
-F1 "HIP2100IR4" 0 450 50 H V C CNN
-F2 "Housings_DFN_QFN:DFN-12-1EP_4x4mm_Pitch0.5mm" 0 0 50 H I C CIN
-F3 "" 0 -550 50 H I C CNN
-ALIAS HIP2101IR4
-$FPLIST
- DFN*1EP*4x4mm*Pitch0.5mm*
-$ENDFPLIST
-DRAW
-S -200 -400 200 400 0 1 10 f
-X VDD 1 -300 300 100 R 50 50 1 1 W
-X NC 2 -300 200 100 R 50 50 1 1 N N
-X NC 3 -300 100 100 R 50 50 1 1 N N
-X HB 4 300 300 100 L 50 50 1 1 W
-X HO 5 300 -100 100 L 50 50 1 1 O
-X HS 6 300 -200 100 L 50 50 1 1 P
-X HI 7 -300 -100 100 R 50 50 1 1 I
-X LI 8 -300 -200 100 R 50 50 1 1 I
-X NC 9 300 200 100 L 50 50 1 1 N N
-X NC 10 300 100 100 L 50 50 1 1 N N
-X VSS 11 -300 -300 100 R 50 50 1 1 W
-X LO 12 300 -300 100 L 50 50 1 1 O
-X EP 13 0 -500 100 U 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
 # HIP2100EIB
 #
 DEF HIP2100EIB U 0 40 Y Y 1 F N
@@ -127,6 +98,30 @@ X EP 9 0 -500 100 U 50 50 1 1 O
 ENDDRAW
 ENDDEF
 #
+# HIP2100IB
+#
+DEF HIP2100IB U 0 40 Y Y 1 F N
+F0 "U" 0 525 50 H V C CNN
+F1 "HIP2100IB" 0 450 50 H V C CNN
+F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 0 50 H I C CIN
+F3 "" 0 -550 50 H I C CNN
+ALIAS HIP2101IB
+$FPLIST
+ SOIC*3.9x4.9mm*Pitch1.27mm*
+$ENDFPLIST
+DRAW
+S -200 -400 200 400 0 1 10 f
+X VDD 1 -300 300 100 R 50 50 1 1 W
+X HB 2 300 300 100 L 50 50 1 1 W
+X HO 3 300 -100 100 L 50 50 1 1 O
+X HS 4 300 -200 100 L 50 50 1 1 P
+X HI 5 -300 -100 100 R 50 50 1 1 I
+X LI 6 -300 -200 100 R 50 50 1 1 I
+X VSS 7 -300 -300 100 R 50 50 1 1 W
+X LO 8 300 -300 100 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
 # HIP2100IR
 #
 DEF HIP2100IR U 0 40 Y Y 1 F N
@@ -160,27 +155,32 @@ X EP 17 0 -500 100 U 50 50 1 1 O
 ENDDRAW
 ENDDEF
 #
-# HIP2100IB
+# HIP2100IR4
 #
-DEF HIP2100IB U 0 40 Y Y 1 F N
+DEF HIP2100IR4 U 0 40 Y Y 1 F N
 F0 "U" 0 525 50 H V C CNN
-F1 "HIP2100IB" 0 450 50 H V C CNN
-F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 0 50 H I C CIN
+F1 "HIP2100IR4" 0 450 50 H V C CNN
+F2 "Housings_DFN_QFN:DFN-12-1EP_4x4mm_Pitch0.5mm" 0 0 50 H I C CIN
 F3 "" 0 -550 50 H I C CNN
-ALIAS HIP2101IB
+ALIAS HIP2101IR4
 $FPLIST
- SOIC*3.9x4.9mm*Pitch1.27mm*
+ DFN*1EP*4x4mm*Pitch0.5mm*
 $ENDFPLIST
 DRAW
 S -200 -400 200 400 0 1 10 f
 X VDD 1 -300 300 100 R 50 50 1 1 W
-X HB 2 300 300 100 L 50 50 1 1 W
-X HO 3 300 -100 100 L 50 50 1 1 O
-X HS 4 300 -200 100 L 50 50 1 1 P
-X HI 5 -300 -100 100 R 50 50 1 1 I
-X LI 6 -300 -200 100 R 50 50 1 1 I
-X VSS 7 -300 -300 100 R 50 50 1 1 W
-X LO 8 300 -300 100 L 50 50 1 1 O
+X NC 2 -300 200 100 R 50 50 1 1 N N
+X NC 3 -300 100 100 R 50 50 1 1 N N
+X HB 4 300 300 100 L 50 50 1 1 W
+X HO 5 300 -100 100 L 50 50 1 1 O
+X HS 6 300 -200 100 L 50 50 1 1 P
+X HI 7 -300 -100 100 R 50 50 1 1 I
+X LI 8 -300 -200 100 R 50 50 1 1 I
+X NC 9 300 200 100 L 50 50 1 1 N N
+X NC 10 300 100 100 L 50 50 1 1 N N
+X VSS 11 -300 -300 100 R 50 50 1 1 W
+X LO 12 300 -300 100 L 50 50 1 1 O
+X EP 13 0 -500 100 U 50 50 1 1 O
 ENDDRAW
 ENDDEF
 #
@@ -256,4 +256,28 @@ X BHS 19 500 100 100 L 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# ICL7673
+#
+DEF ICL7673 U 0 40 Y Y 1 F N
+F0 "U" -240 250 50 H V C CNN
+F1 "ICL7673" 150 250 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ *SOIC*3*9*
+ *DIP*7*62*
+$ENDFPLIST
+DRAW
+X VO 1 500 100 100 L 50 50 1 0 w
+X VS 2 100 300 100 D 50 50 1 0 W
+X SBAR 3 500 0 100 L 50 50 1 0 C
+X GDN 4 0 -300 100 U 50 50 1 0 W
+X NC 5 -200 -300 100 U 50 50 1 0 N N
+X PBAR 6 500 -100 100 L 50 50 1 0 C
+X NC 7 -100 -300 100 U 50 50 1 0 N N
+X VP 8 0 300 100 D 50 50 1 0 W
+S -300 200 400 -200 0 1 0 f
+ENDDRAW
+ENDDEF
+#
 #End Library

From 37dbe768c35d086a7c93e4eff2e803e74b334196 Mon Sep 17 00:00:00 2001
From: Stefan Olsson <stol@bredband.net>
Date: Sat, 12 Aug 2017 15:38:52 +0200
Subject: [PATCH 3/6] Renamed GDN to GND

---
 library/intersil.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/library/intersil.lib b/library/intersil.lib
index 73897d24..b675e7f7 100644
--- a/library/intersil.lib
+++ b/library/intersil.lib
@@ -271,7 +271,7 @@ DRAW
 X VO 1 500 100 100 L 50 50 1 0 w
 X VS 2 100 300 100 D 50 50 1 0 W
 X SBAR 3 500 0 100 L 50 50 1 0 C
-X GDN 4 0 -300 100 U 50 50 1 0 W
+X GND 4 0 -300 100 U 50 50 1 0 W
 X NC 5 -200 -300 100 U 50 50 1 0 N N
 X PBAR 6 500 -100 100 L 50 50 1 0 C
 X NC 7 -100 -300 100 U 50 50 1 0 N N

From b84b103c84a1648b5134375122e9ca344c0560c9 Mon Sep 17 00:00:00 2001
From: Stefan Olsson <stol@bredband.net>
Date: Sat, 12 Aug 2017 15:47:14 +0200
Subject: [PATCH 4/6] Renamed GDN to GND

---
 library/intersil.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/library/intersil.lib b/library/intersil.lib
index b675e7f7..1aba99ef 100644
--- a/library/intersil.lib
+++ b/library/intersil.lib
@@ -276,7 +276,7 @@ X NC 5 -200 -300 100 U 50 50 1 0 N N
 X PBAR 6 500 -100 100 L 50 50 1 0 C
 X NC 7 -100 -300 100 U 50 50 1 0 N N
 X VP 8 0 300 100 D 50 50 1 0 W
-S -300 200 400 -200 0 1 0 f
+S -300 200 400 -200 0 1 10 f
 ENDDRAW
 ENDDEF
 #

From d9c1a40036f4e93c6e993e2098af7df251c21c7d Mon Sep 17 00:00:00 2001
From: Stefan Olsson <stol@bredband.net>
Date: Sat, 12 Aug 2017 16:39:56 +0200
Subject: [PATCH 5/6] Splitted into two components

---
 library/intersil.lib | 34 ++++++++++++++++++++++++++++------
 1 file changed, 28 insertions(+), 6 deletions(-)

diff --git a/library/intersil.lib b/library/intersil.lib
index 1aba99ef..a5b93660 100644
--- a/library/intersil.lib
+++ b/library/intersil.lib
@@ -256,16 +256,38 @@ X BHS 19 500 100 100 L 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
-# ICL7673
+# ICL7673CBAZA
 #
-DEF ICL7673 U 0 40 Y Y 1 F N
+DEF ICL7673CBAZA U 0 40 Y Y 1 F N
 F0 "U" -240 250 50 H V C CNN
-F1 "ICL7673" 150 250 50 H V L CNN
-F2 "" 0 0 50 H I C CNN
+F1 "ICL7673CBAZA" 150 250 50 H V L CNN
+F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 40 -450 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
- *SOIC*3*9*
- *DIP*7*62*
+ SOIC*3.9x4.9mm*Pitch1.27mm*
+$ENDFPLIST
+DRAW
+X VO 1 500 100 100 L 50 50 1 0 w
+X VS 2 100 300 100 D 50 50 1 0 W
+X SBAR 3 500 0 100 L 50 50 1 0 C
+X GND 4 0 -300 100 U 50 50 1 0 W
+X NC 5 -200 -300 100 U 50 50 1 0 N N
+X PBAR 6 500 -100 100 L 50 50 1 0 C
+X NC 7 -100 -300 100 U 50 50 1 0 N N
+X VP 8 0 300 100 D 50 50 1 0 W
+S -300 200 400 -200 0 1 10 f
+ENDDRAW
+ENDDEF
+#
+# ICL7673CPAZ
+#
+DEF ICL7673CPAZ U 0 40 Y Y 1 F N
+F0 "U" -240 250 50 H V C CNN
+F1 "ICL7673CPAZ" 150 250 50 H V L CNN
+F2 "Housings_DIP:DIP-8_W7.62mm" 40 -450 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ ?DIP*W7.62mm*
 $ENDFPLIST
 DRAW
 X VO 1 500 100 100 L 50 50 1 0 w

From 72ff5542204f33abf5fc890bd6f9ceb20225800e Mon Sep 17 00:00:00 2001
From: Stefan Olsson <stol@bredband.net>
Date: Sat, 12 Aug 2017 16:40:02 +0200
Subject: [PATCH 6/6] Splitted into two components

---
 library/intersil.dcm | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/library/intersil.dcm b/library/intersil.dcm
index ec3814de..34835c50 100644
--- a/library/intersil.dcm
+++ b/library/intersil.dcm
@@ -78,7 +78,13 @@ K Half Bridge Gate Driver
 F http://www.intersil.com/content/dam/Intersil/documents/hip4/hip4080a.pdf
 $ENDCMP
 #
-$CMP ICL7673
+$CMP ICL7673CBAZA
+D Automatic Battery Back-Up Switch, 2.5 - 15V VDD, SOIC-14 or PDIP-14
+K Automatic Battery Back-Up Switch, 2.5 - 15V VDD, SOIC-14 or PDIP-14
+F http://www.intersil.com/content/dam/Intersil/documents/icl7/icl7673.pdf
+$ENDCMP
+#
+$CMP ICL7673CPAZ
 D Automatic Battery Back-Up Switch, 2.5 - 15V VDD, SOIC-14 or PDIP-14
 K Automatic Battery Back-Up Switch, 2.5 - 15V VDD, SOIC-14 or PDIP-14
 F http://www.intersil.com/content/dam/Intersil/documents/icl7/icl7673.pdf