memory: split M25PX32 to M23PX32-VMP (QFN) and M32PX32-VMW (SO8)

This commit is contained in:
Piotr Wiszowaty 2016-11-01 11:40:50 +01:00
parent 6e2cb6e740
commit 21095c4317
2 changed files with 35 additions and 7 deletions

View file

@ -515,8 +515,14 @@ $CMP IDT71V65903S
D 165 pins BGA 3.3V high-speed 9 Megabit synchronous SRAMs 512K x 18 (or 256K x 36)
$ENDCMP
#
$CMP M25PX32
D 32Mb, Dual I/O, 4KB Subsector Erase, 3V Serial Flash Memory with 75 MHz SPI Bus Interface
$CMP M25PX32-VMP
D 32Mb, Dual I/O, 4KB Subsector Erase, 3V Serial Flash Memory with 75 MHz SPI Bus Interface, QFN package
K NOR Serial Flash Embedded Memory
F https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/m25px/m25px32.pdf
$ENDCMP
#
$CMP M25PX32-VMW
D 32Mb, Dual I/O, 4KB Subsector Erase, 3V Serial Flash Memory with 75 MHz SPI Bus Interface, SOIJ package
K NOR Serial Flash Embedded Memory
F https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/m25px/m25px32.pdf
$ENDCMP

View file

@ -2476,16 +2476,38 @@ X Q7 19 700 -150 300 L 50 50 1 1 T
ENDDRAW
ENDDEF
#
# M25PX32
# M25PX32-VMP
#
DEF M25PX32 U 0 40 Y Y 1 F N
DEF M25PX32-VMP U 0 40 Y Y 1 F N
F0 "U" -400 400 50 H V C CNN
F1 "M25PX32" 250 -400 50 H V C CNN
F1 "M25PX32-VMP" 300 -400 50 H V C CNN
F2 "" 150 -100 50 H V C CNN
F3 "" 150 -100 50 H V C CNN
$FPLIST
SOIJ-8
SOIC-8
DFN*6x5mm*Pitch1.27mm*
$ENDFPLIST
DRAW
S -450 350 450 -350 0 1 10 f
X S# 1 -600 0 150 R 50 50 1 1 I
X DQ1 2 600 200 150 L 50 50 1 1 B
X W#/VPP 3 -600 -100 150 R 50 50 1 1 I
X VSS 4 0 -500 150 U 50 50 1 1 W
X DQ0 5 -600 200 150 R 50 50 1 1 B
X C 6 -600 100 150 R 50 50 1 1 I
X HOLD# 7 -600 -200 150 R 50 50 1 1 I
X VCC 8 0 500 150 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# M25PX32-VMW
#
DEF M25PX32-VMW U 0 40 Y Y 1 F N
F0 "U" -400 400 50 H V C CNN
F1 "M25PX32-VMW" 300 -400 50 H V C CNN
F2 "" 150 -100 50 H V C CNN
F3 "" 150 -100 50 H V C CNN
$FPLIST
SOIJ*5.3x5.3mm*Pitch1.27mm*
$ENDFPLIST
DRAW
S -450 350 450 -350 0 1 10 f