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New element CP2112

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Piotr 2016-05-19 22:56:42 +02:00
parent f5d01dd593
commit 1e553faa5c
2 changed files with 150 additions and 108 deletions
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6
library/silabs.dcm
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@ -1,5 +1,11 @@
EESchema-DOCLIB Version 2.0
#
$CMP CP2112
D HID USB to SMBUS master bridge
K USB SMBUS bridge
F http://www.silabs.com/Support%20Documents/TechnicalDocs/CP2112.pdf
$ENDCMP
#
$CMP Si4362
D EZRadioPRO Low Current Receiver
F http://www.silabs.com/Support%20Documents/TechnicalDocs/Si4362.pdf

36
library/silabs.lib
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@ -1,6 +1,42 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# CP2112
#
DEF CP2112 U 0 40 Y Y 1 F N
F0 "U" -400 700 50 H V C CNN
F1 "CP2112" -300 -700 50 H V C CNN
F2 "" 50 -1000 50 H V C CNN
F3 "" 50 -1000 50 H V C CNN
$FPLIST
QFN-24-1EP_4x4mm_Pitch0.5mm
$ENDFPLIST
DRAW
S -450 650 450 -650 0 1 0 f
X SDA 1 600 500 150 L 50 50 1 1 B
X GND 2 0 -800 150 U 50 50 1 1 W
X D+ 3 -600 -450 150 R 50 50 1 1 B
X D- 4 -600 -550 150 R 50 50 1 1 B
X VIO 5 0 800 150 D 50 50 1 1 W
X VDD 6 -100 800 150 D 50 50 1 1 W
X REGIN 7 -600 -150 150 R 50 50 1 1 W
X VBUS 8 -600 -350 150 R 50 50 1 1 O
X ~RST 9 -600 550 150 R 50 50 1 1 I I
X GPIO.3 20 600 -100 150 L 50 50 1 1 B
X SUSPEND 11 -600 250 150 R 50 50 1 1 I
X GPIO.2 21 600 0 150 L 50 50 1 1 B
X GPIO.7 12 600 -500 150 L 50 50 1 1 B
X GPIO.1 22 600 100 150 L 50 50 1 1 B
X GPIO.6 13 600 -400 150 L 50 50 1 1 B
X GPIO.0 23 600 200 150 L 50 50 1 1 B
X GPIO.5 14 600 -300 150 L 50 50 1 1 B
X SCL 24 600 400 150 L 50 50 1 1 O
X GPIO.4 15 600 -200 150 L 50 50 1 1 B
X VPP 16 -600 50 150 R 50 50 1 1 W
X ~SUSPEND 17 -600 350 150 R 50 50 1 1 I I
ENDDRAW
ENDDEF
#
# Si4362
#
DEF Si4362 U 0 40 Y Y 1 F N