From 809024ee1be0438c2a188ad4b90fc256461c3388 Mon Sep 17 00:00:00 2001
From: Piotr Wiszowaty <pwiszowaty458@gmail.com>
Date: Sat, 14 Oct 2017 21:44:53 +0200
Subject: [PATCH 1/2] memory: Add alias of MT48LC4M16A2P

---
 library/memory.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/library/memory.lib b/library/memory.lib
index c21b22f5..5acfe4f9 100644
--- a/library/memory.lib
+++ b/library/memory.lib
@@ -2967,7 +2967,7 @@ F0 "U" -600 1200 50 H V C CNN
 F1 "MT48LC4M16A2TG" 650 -1200 50 H V C CNN
 F2 "TSOPII-54" 0 0 50 H I C CIN
 F3 "" 0 -250 50 H I C CNN
-ALIAS MT48LC4M16A2P
+ALIAS MT48LC4M16A2P AS4C4M16SA
 DRAW
 S -650 1150 650 -1150 0 1 10 f
 X VDD 1 -300 1300 150 D 40 40 1 1 W

From 08c0b598a5d8c5fbfc7bdeb564be69ea4f0b35d0 Mon Sep 17 00:00:00 2001
From: Piotr Wiszowaty <pwiszowaty458@gmail.com>
Date: Sun, 15 Oct 2017 17:13:23 +0200
Subject: [PATCH 2/2] memory: Add description to AS4C4M16SA

---
 library/memory.dcm | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/library/memory.dcm b/library/memory.dcm
index 239125bf..48da0c87 100644
--- a/library/memory.dcm
+++ b/library/memory.dcm
@@ -241,6 +241,12 @@ $CMP AM29PDL128G
 D 128 Megabit (8 M x 16-Bit/4 M x 32-Bit), Simultaneous Operation Flash Memory with VersatileIO™ Control
 $ENDCMP
 #
+$CMP AS4C4M16SA
+D 64M – (4M x 16 bit) Synchronous DRAM (SDRAM), TSOP II 54pin
+K SDRAM Synchronus DRAM PC166 PC143 64Mb 16Mbx4
+F https://www.alliancememory.com/wp-content/uploads/pdf/dram/64M-AS4C4M16SA-CI_v3.0_March%202015.pdf
+$ENDCMP
+#
 $CMP AS6C1616
 D 1024k x 16 bit low power CMOS SRAM
 K memory SRAM