2016-03-29 15:05:49 +02:00
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EESchema-LIBRARY Version 2.3
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2014-08-10 17:49:33 +02:00
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#encoding utf-8
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#
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2014-12-01 09:25:05 +01:00
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# AUIPS7111S
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#
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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DEF AUIPS7111S U 0 20 Y Y 1 F N
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F0 "U" 150 50 50 H V L CNN
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F1 "AUIPS7111S" 150 -50 50 H V L CNN
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F2 "TO_SOT_Packages_SMD:TO-263-5Lead" 0 0 50 H I C CIN
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F3 "" 0 0 50 H I C CNN
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2014-12-01 09:25:05 +01:00
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$FPLIST
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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TO?263*
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2014-12-01 09:25:05 +01:00
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$ENDFPLIST
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DRAW
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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S -300 200 100 -200 0 1 10 f
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2016-04-13 14:55:59 +02:00
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X IN 1 -400 100 100 R 50 50 1 1 I
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X IFB 2 -400 -100 100 R 50 50 1 1 O
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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X VCC 3 0 300 100 D 50 50 1 1 W
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X OUT 4 0 -300 100 U 50 50 1 1 w
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X OUT 5 0 -300 100 U 50 50 1 1 P N
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2014-12-01 09:25:05 +01:00
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ENDDRAW
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ENDDEF
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#
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# AUIPS7121R
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#
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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DEF AUIPS7121R U 0 20 Y Y 1 F N
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F0 "U" 150 50 50 H V L CNN
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F1 "AUIPS7121R" 150 -50 50 H V L CNN
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F2 "TO_SOT_Packages_SMD:TO-252-5Lead" 0 0 50 H I C CIN
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F3 "" 0 0 50 H I C CNN
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2014-12-01 09:25:05 +01:00
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$FPLIST
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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TO?252*
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2014-12-01 09:25:05 +01:00
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$ENDFPLIST
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DRAW
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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S -300 200 100 -200 0 1 10 f
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X NC 1 -300 0 100 R 50 50 1 1 N N
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2016-04-13 14:55:59 +02:00
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X IN 2 -400 100 100 R 50 50 1 1 I
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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X VCC 3 0 300 100 D 50 50 1 1 W
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2016-04-13 14:55:59 +02:00
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X IFB 4 -400 -100 100 R 50 50 1 1 O
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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X OUT 5 0 -300 100 U 50 50 1 1 w
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2014-12-01 09:25:05 +01:00
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ENDDRAW
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ENDDEF
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#
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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# IR2010
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2016-12-06 06:43:50 +01:00
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#
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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DEF IR2010 U 0 20 Y Y 1 F N
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F0 "U" 50 525 50 H V L CNN
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F1 "IR2010" 50 450 50 H V L CNN
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F2 "Housings_DIP:DIP-14_W7.62mm" 0 0 50 H I C CIN
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F3 "" 0 0 50 H I C CNN
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2017-08-13 06:54:51 +02:00
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ALIAS IR2110 IR2112 IR2113 IR2213 IRS2110 IRS2112 IRS2113
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2016-12-06 06:43:50 +01:00
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$FPLIST
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2017-01-15 15:03:41 +01:00
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DIP*W7.62mm*
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2016-12-06 06:43:50 +01:00
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$ENDFPLIST
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DRAW
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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S -200 -400 200 400 0 1 10 f
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X LO 1 300 -300 100 L 50 50 1 1 O
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X COM 2 0 -500 100 U 50 50 1 1 W
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X VCC 3 300 -200 100 L 50 50 1 1 W
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X NC 4 -200 300 100 R 50 50 1 1 N N
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X VS 5 300 -100 100 L 50 50 1 1 P
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X VB 6 300 300 100 L 50 50 1 1 P
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X HO 7 300 200 100 L 50 50 1 1 O
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X NC 8 -200 200 100 R 50 50 1 1 N N
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X VDD 9 0 500 100 D 50 50 1 1 W
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X HIN 10 -300 0 100 R 50 50 1 1 I
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X SD 11 -300 -200 100 R 50 50 1 1 I
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X LIN 12 -300 -100 100 R 50 50 1 1 I
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X VSS 13 -100 -500 100 U 50 50 1 1 W
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X NC 14 -200 100 100 R 50 50 1 1 N N
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2016-12-06 06:43:50 +01:00
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ENDDRAW
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ENDDEF
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#
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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# IR2010S
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2016-12-06 06:43:50 +01:00
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#
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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DEF IR2010S U 0 20 Y Y 1 F N
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F0 "U" 50 525 50 H V L CNN
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F1 "IR2010S" 50 450 50 H V L CNN
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F2 "Housings_SOIC:SOIC-16W_7.5x10.3mm_Pitch1.27mm" 0 0 50 H I C CIN
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F3 "" 0 0 50 H I C CNN
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2017-08-13 06:54:51 +02:00
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ALIAS IR2110S IR2112S IR2113S IR2213S IR25607S IRS2110S IRS2112S IRS2113S
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2016-12-06 06:43:50 +01:00
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$FPLIST
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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SOIC*7.5x10.3mm*Pitch1.27mm*
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2016-12-06 06:43:50 +01:00
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$ENDFPLIST
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DRAW
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
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S -200 -400 200 400 0 1 10 f
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X LO 1 300 -300 100 L 50 50 1 1 O
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X COM 2 0 -500 100 U 50 50 1 1 W
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X VCC 3 300 -200 100 L 50 50 1 1 W
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X NC 4 -200 300 100 R 50 50 1 1 N N
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X NC 5 -200 200 100 R 50 50 1 1 N N
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X VS 6 300 -100 100 L 50 50 1 1 P
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X VB 7 300 300 100 L 50 50 1 1 P
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X HO 8 300 200 100 L 50 50 1 1 O
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X NC 9 -200 100 100 R 50 50 1 1 N N
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X NC 10 200 100 100 L 50 50 1 1 N N
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X VDD 11 0 500 100 D 50 50 1 1 W
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X HIN 12 -300 0 100 R 50 50 1 1 I
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X SD 13 -300 -200 100 R 50 50 1 1 I
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X LIN 14 -300 -100 100 R 50 50 1 1 I
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X VSS 15 -100 -500 100 U 50 50 1 1 W
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X NC 16 200 0 100 L 50 50 1 1 N N
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2016-12-06 06:43:50 +01:00
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ENDDRAW
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ENDDEF
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#
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Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
# IR2011
|
2015-05-14 18:43:58 +02:00
|
|
|
#
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
DEF IR2011 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR2011" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
ALIAS IRS2011
|
2016-04-13 14:55:59 +02:00
|
|
|
$FPLIST
|
2017-01-15 15:03:41 +01:00
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
2016-04-13 14:55:59 +02:00
|
|
|
$ENDFPLIST
|
2015-05-14 18:43:58 +02:00
|
|
|
DRAW
|
2016-04-13 14:55:59 +02:00
|
|
|
S -200 -400 200 400 0 1 10 f
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X VB 2 300 300 100 L 50 50 1 1 P
|
|
|
|
X HO 3 300 200 100 L 50 50 1 1 O
|
|
|
|
X VS 4 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HIN 5 -300 0 100 R 50 50 1 1 I
|
|
|
|
X LIN 6 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X COM 7 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 8 300 -300 100 L 50 50 1 1 O
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR2085S
|
|
|
|
#
|
|
|
|
DEF IR2085S U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR2085S" 50 450 50 H V L CNN
|
|
|
|
F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X CS 1 -300 -200 100 R 50 50 1 1 I
|
|
|
|
X OSC 2 -300 0 100 R 50 50 1 1 P
|
|
|
|
X GND 3 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 4 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VCC 5 0 500 100 D 50 50 1 1 W
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR2101
|
|
|
|
#
|
|
|
|
DEF IR2101 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR2101" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
2017-08-14 00:45:26 +02:00
|
|
|
ALIAS IR2106 IR2301 IR2308 IRS2001 IRS2101 IRS2106 IRS2308
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X HIN 2 -300 0 100 R 50 50 1 1 I
|
|
|
|
X LIN 3 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X COM 4 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 5 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR2102
|
|
|
|
#
|
|
|
|
DEF IR2102 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR2102" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X ~HIN 2 -300 0 100 R 50 50 1 1 I
|
|
|
|
X ~LIN 3 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X COM 4 0 -500 100 U 50 50 1 1 W
|
2016-04-13 14:55:59 +02:00
|
|
|
X LO 5 300 -300 100 L 50 50 1 1 O
|
2016-04-23 13:51:38 +02:00
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
2016-04-23 13:51:38 +02:00
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
2015-05-14 18:43:58 +02:00
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
2017-08-13 06:54:51 +02:00
|
|
|
# IR2103
|
|
|
|
#
|
|
|
|
DEF IR2103 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR2103" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
2017-08-14 00:45:26 +02:00
|
|
|
ALIAS IR2108 IRS2003 IRS2103 IRS2108
|
2017-08-13 06:54:51 +02:00
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X HIN 2 -300 0 100 R 50 50 1 1 I
|
|
|
|
X ~LIN 3 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X COM 4 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 5 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
# IR2104
|
2016-12-10 12:33:21 +01:00
|
|
|
#
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
DEF IR2104 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR2104" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
2017-08-14 00:45:26 +02:00
|
|
|
ALIAS IR2109 IR2302 IRS2004 IRS2104 IRS2109
|
2016-12-10 12:33:21 +01:00
|
|
|
$FPLIST
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
2016-12-10 12:33:21 +01:00
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X IN 2 -300 0 100 R 50 50 1 1 I
|
|
|
|
X ~SD 3 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X COM 4 0 -500 100 U 50 50 1 1 W
|
2016-12-10 12:33:21 +01:00
|
|
|
X LO 5 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
2016-12-10 12:33:21 +01:00
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
# IR21064
|
2014-08-10 17:49:33 +02:00
|
|
|
#
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
DEF IR21064 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR21064" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
2017-08-13 06:54:51 +02:00
|
|
|
ALIAS IRS21064
|
2016-04-13 14:55:59 +02:00
|
|
|
$FPLIST
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
SOIC*3.9x8.7mm*Pitch1.27mm*
|
2017-01-15 15:03:41 +01:00
|
|
|
DIP*W7.62mm*
|
2016-04-13 14:55:59 +02:00
|
|
|
$ENDFPLIST
|
2014-08-10 17:49:33 +02:00
|
|
|
DRAW
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X HIN 2 -300 0 100 R 50 50 1 1 I
|
|
|
|
X LIN 3 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X NC 4 -200 300 100 R 50 50 1 1 N N
|
|
|
|
X VSS 5 -100 -500 100 U 50 50 1 1 W
|
|
|
|
X COM 6 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 7 300 -300 100 L 50 50 1 1 O
|
|
|
|
X NC 8 -200 200 100 R 50 50 1 1 N N
|
|
|
|
X NC 9 -200 100 100 R 50 50 1 1 N N
|
|
|
|
X NC 10 200 100 100 L 50 50 1 1 N N
|
|
|
|
X VS 11 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 12 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 13 300 300 100 L 50 50 1 1 P
|
|
|
|
X NC 14 200 0 100 L 50 50 1 1 N N
|
2014-08-10 17:49:33 +02:00
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
2017-08-13 06:54:51 +02:00
|
|
|
# IR21084
|
|
|
|
#
|
|
|
|
DEF IR21084 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 550 50 H V L CNN
|
|
|
|
F1 "IR21084" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
2017-08-14 00:45:26 +02:00
|
|
|
ALIAS IRS21084
|
2017-08-13 06:54:51 +02:00
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x8.7mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X HIN 2 -300 0 100 R 50 50 1 1 I
|
|
|
|
X ~LIN 3 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X DT 4 -300 -200 100 R 50 50 1 1 I
|
|
|
|
X VSS 5 -100 -500 100 U 50 50 1 1 W
|
|
|
|
X COM 6 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 7 300 -300 100 L 50 50 1 1 O
|
|
|
|
X NC 8 -200 300 100 R 50 50 1 1 N N
|
|
|
|
X NC 9 -200 200 100 R 50 50 1 1 N N
|
|
|
|
X NC 10 -200 100 100 R 50 50 1 1 N N
|
|
|
|
X VS 11 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 12 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 13 300 300 100 L 50 50 1 1 P
|
|
|
|
X NC 14 200 100 100 L 50 50 1 1 N N
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR21091
|
|
|
|
#
|
|
|
|
DEF IR21091 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR21091" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
2017-08-14 00:45:26 +02:00
|
|
|
ALIAS IRS21091
|
2017-08-13 06:54:51 +02:00
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X IN 2 -300 0 100 R 50 50 1 1 I
|
|
|
|
X DT/SD 3 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X COM 4 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 5 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR21094
|
|
|
|
#
|
|
|
|
DEF IR21094 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 550 50 H V L CNN
|
|
|
|
F1 "IR21094" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
2017-08-14 00:45:26 +02:00
|
|
|
ALIAS IRS21094
|
2017-08-13 06:54:51 +02:00
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x8.7mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X IN 2 -300 0 100 R 50 50 1 1 I
|
|
|
|
X ~SD 3 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X DT 4 -300 -200 100 R 50 50 1 1 I
|
|
|
|
X VSS 5 -100 -500 100 U 50 50 1 1 W
|
|
|
|
X COM 6 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 7 300 -300 100 L 50 50 1 1 O
|
|
|
|
X NC 8 -200 300 100 R 50 50 1 1 N N
|
|
|
|
X NC 9 -200 200 100 R 50 50 1 1 N N
|
|
|
|
X NC 10 -200 100 100 R 50 50 1 1 N N
|
|
|
|
X VS 11 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 12 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 13 300 300 100 L 50 50 1 1 P
|
|
|
|
X NC 14 200 100 100 L 50 50 1 1 N N
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR2111
|
|
|
|
#
|
|
|
|
DEF IR2111 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR2111" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
2017-08-14 00:45:26 +02:00
|
|
|
ALIAS IRS2111
|
2017-08-13 06:54:51 +02:00
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X IN 2 -300 0 100 R 50 50 1 1 I
|
|
|
|
X COM 3 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 4 300 -300 100 L 50 50 1 1 O
|
|
|
|
X NC 5 -200 300 100 R 50 50 1 1 N N
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR2153
|
|
|
|
#
|
|
|
|
DEF IR2153 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR2153" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
2017-08-14 00:45:26 +02:00
|
|
|
ALIAS IR21531 IR2155 IRS2153D IRS21531D
|
2017-08-13 06:54:51 +02:00
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X RT 2 -300 0 100 R 50 50 1 1 P
|
|
|
|
X CT 3 -300 -200 100 R 50 50 1 1 P
|
|
|
|
X COM 4 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 5 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
# IR2181
|
2016-01-31 18:34:47 +01:00
|
|
|
#
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
DEF IR2181 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR2181" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
ALIAS IRS2181 IRS2186
|
2016-01-31 18:34:47 +01:00
|
|
|
$FPLIST
|
2017-01-15 15:03:41 +01:00
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
2016-01-31 18:34:47 +01:00
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
2016-03-29 15:05:49 +02:00
|
|
|
S -200 -400 200 400 0 1 10 f
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X HIN 1 -300 0 100 R 50 50 1 1 I
|
|
|
|
X LIN 2 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X COM 3 0 -500 100 U 50 50 1 1 W
|
2016-03-29 15:05:49 +02:00
|
|
|
X LO 4 300 -300 100 L 50 50 1 1 O
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X VCC 5 0 500 100 D 50 50 1 1 W
|
2016-04-23 13:51:38 +02:00
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
2016-04-23 13:51:38 +02:00
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
2016-01-31 18:34:47 +01:00
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
# IR21814
|
2016-12-01 04:48:15 +01:00
|
|
|
#
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
DEF IR21814 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 550 50 H V L CNN
|
|
|
|
F1 "IR21814" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
ALIAS IRS21814 IRS21864
|
2016-12-01 04:48:15 +01:00
|
|
|
$FPLIST
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
SOIC*3.9x8.7mm*Pitch1.27mm*
|
2016-12-02 00:32:46 +01:00
|
|
|
DIP*W7.62mm*
|
2016-12-01 04:48:15 +01:00
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
S -200 -400 200 400 0 1 10 f
|
2016-12-01 04:48:15 +01:00
|
|
|
X HIN 1 -300 0 100 R 50 50 1 1 I
|
|
|
|
X LIN 2 -300 -100 100 R 50 50 1 1 I
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X VSS 3 -100 -500 100 U 50 50 1 1 W
|
|
|
|
X NC 4 -200 300 100 R 50 50 1 1 N N
|
|
|
|
X COM 5 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 6 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VCC 7 0 500 100 D 50 50 1 1 W
|
|
|
|
X NC 8 -200 200 100 R 50 50 1 1 N N
|
|
|
|
X NC 9 -200 100 100 R 50 50 1 1 N N
|
|
|
|
X NC 10 200 100 100 L 50 50 1 1 N N
|
|
|
|
X VS 11 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 12 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 13 300 300 100 L 50 50 1 1 P
|
|
|
|
X NC 14 200 0 100 L 50 50 1 1 N N
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR2183
|
|
|
|
#
|
|
|
|
DEF IR2183 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR2183" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
ALIAS IRS2183
|
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X HIN 1 -300 0 100 R 50 50 1 1 I
|
|
|
|
X ~LIN 2 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X COM 3 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 4 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VCC 5 0 500 100 D 50 50 1 1 W
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR21834
|
|
|
|
#
|
|
|
|
DEF IR21834 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 550 50 H V L CNN
|
|
|
|
F1 "IR21834" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
ALIAS IRS21834
|
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x8.7mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X HIN 1 -300 0 100 R 50 50 1 1 I
|
|
|
|
X ~LIN 2 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X VSS 3 -100 -500 100 U 50 50 1 1 W
|
|
|
|
X DT 4 -300 -200 100 R 50 50 1 1 I
|
|
|
|
X COM 5 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 6 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VCC 7 0 500 100 D 50 50 1 1 W
|
|
|
|
X NC 8 -200 300 100 R 50 50 1 1 N N
|
|
|
|
X NC 9 -200 200 100 R 50 50 1 1 N N
|
|
|
|
X NC 10 -200 100 100 R 50 50 1 1 N N
|
|
|
|
X VS 11 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 12 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 13 300 300 100 L 50 50 1 1 P
|
|
|
|
X NC 14 200 100 100 L 50 50 1 1 N N
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR2184
|
|
|
|
#
|
|
|
|
DEF IR2184 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR2184" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
ALIAS IRS2184
|
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X IN 1 -300 0 100 R 50 50 1 1 I
|
|
|
|
X ~SD 2 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X COM 3 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 4 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VCC 5 0 500 100 D 50 50 1 1 W
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR21844
|
|
|
|
#
|
|
|
|
DEF IR21844 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 550 50 H V L CNN
|
|
|
|
F1 "IR21844" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
ALIAS IRS21844
|
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x8.7mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X IN 1 -300 0 100 R 50 50 1 1 I
|
|
|
|
X ~SD 2 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X VSS 3 -100 -500 100 U 50 50 1 1 W
|
|
|
|
X DT 4 -300 -200 100 R 50 50 1 1 I
|
|
|
|
X COM 5 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 6 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VCC 7 0 500 100 D 50 50 1 1 W
|
|
|
|
X NC 8 -200 300 100 R 50 50 1 1 N N
|
|
|
|
X NC 9 -200 200 100 R 50 50 1 1 N N
|
|
|
|
X NC 10 -200 100 100 R 50 50 1 1 N N
|
|
|
|
X VS 11 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 12 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 13 300 300 100 L 50 50 1 1 P
|
|
|
|
X NC 14 200 100 100 L 50 50 1 1 N N
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
2017-08-13 06:54:51 +02:00
|
|
|
# IR2304
|
|
|
|
#
|
|
|
|
DEF IR2304 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR2304" 50 450 50 H V L CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
2017-08-14 00:45:26 +02:00
|
|
|
ALIAS IRS2304
|
2017-08-13 06:54:51 +02:00
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X LIN 1 -300 0 100 R 50 50 1 1 I
|
|
|
|
X HIN 2 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X VCC 3 0 500 100 D 50 50 1 1 W
|
|
|
|
X COM 4 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 5 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR25602S
|
|
|
|
#
|
|
|
|
DEF IR25602S U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR25602S" 50 450 50 H V L CNN
|
|
|
|
F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
2017-08-14 00:45:26 +02:00
|
|
|
ALIAS IRS2008S IRS2302S
|
2017-08-13 06:54:51 +02:00
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X IN 2 -300 0 100 R 50 50 1 1 I
|
|
|
|
X ~SD 3 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X COM 4 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 5 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR25603S
|
|
|
|
#
|
|
|
|
DEF IR25603S U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR25603S" 50 450 50 H V L CNN
|
|
|
|
F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X RT 2 -300 0 100 R 50 50 1 1 P
|
|
|
|
X CT 3 -300 -200 100 R 50 50 1 1 P
|
|
|
|
X COM 4 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 5 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR25604S
|
|
|
|
#
|
|
|
|
DEF IR25604S U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR25604S" 50 450 50 H V L CNN
|
|
|
|
F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
2017-08-14 00:45:26 +02:00
|
|
|
ALIAS IR7106S IRS2005S IRS21867S IRS2301S IRS25606S
|
2017-08-13 06:54:51 +02:00
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X HIN 2 -300 0 100 R 50 50 1 1 I
|
|
|
|
X LIN 3 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X COM 4 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 5 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
2017-08-13 09:20:38 +02:00
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR7184S
|
|
|
|
#
|
|
|
|
DEF IR7184S U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR7184S" 50 450 50 H V L CNN
|
|
|
|
F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X IN 1 -300 0 100 R 50 50 1 1 I
|
|
|
|
X ~SD 2 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X COM 3 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 4 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VCC 5 0 500 100 D 50 50 1 1 W
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IR7304S
|
|
|
|
#
|
|
|
|
DEF IR7304S U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IR7304S" 50 450 50 H V L CNN
|
|
|
|
F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x4.9mm*Pitch1.27mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X LIN 1 -300 0 100 R 50 50 1 1 I
|
|
|
|
X HIN 2 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X VCC 3 0 500 100 D 50 50 1 1 W
|
|
|
|
X COM 4 0 -500 100 U 50 50 1 1 W
|
|
|
|
X LO 5 300 -300 100 L 50 50 1 1 O
|
|
|
|
X VS 6 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 7 300 200 100 L 50 50 1 1 O
|
2017-08-13 06:54:51 +02:00
|
|
|
X VB 8 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
2017-08-12 21:42:06 +02:00
|
|
|
# IRS2052M
|
|
|
|
#
|
|
|
|
DEF IRS2052M U 0 20 Y Y 2 L N
|
|
|
|
F0 "U" 0 1025 50 H V C CNN
|
|
|
|
F1 "IRS2052M" 0 950 50 H V C CNN
|
|
|
|
F2 "Housings_DFN_QFN:MLPQ-48-1EP_7x7mm_Pitch0.5mm" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
$FPLIST
|
|
|
|
MLPQ*EP*7x7mm*Pitch0.5mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -300 -800 300 900 0 1 10 f
|
|
|
|
X NC 1 -300 700 100 R 50 50 1 1 N N
|
|
|
|
X NC 10 -300 600 100 R 50 50 1 1 N N
|
|
|
|
X COM 30 0 -900 100 U 50 50 1 1 W
|
|
|
|
X VS1 11 400 200 100 L 50 50 1 1 P
|
|
|
|
X VCC 31 400 -200 100 L 50 50 1 1 W
|
|
|
|
X GND 41 -400 200 100 R 50 50 1 1 W
|
|
|
|
X NC 12 -300 0 100 R 50 50 1 1 N N
|
|
|
|
X DT 32 -400 -700 100 R 50 50 1 1 P
|
|
|
|
X VSS 42 -400 -300 100 R 50 50 1 1 W
|
|
|
|
X NC 13 -300 -100 100 R 50 50 1 1 N N
|
|
|
|
X OCSET 33 -400 -600 100 R 50 50 1 1 P
|
|
|
|
X VAA 43 -400 800 100 R 50 50 1 1 W
|
|
|
|
X HO1 14 400 300 100 L 50 50 1 1 O
|
|
|
|
X NC 24 -300 -200 100 R 50 50 1 1 N N
|
|
|
|
X VREF 34 -400 -500 100 R 50 50 1 1 w
|
|
|
|
X IN1 44 -400 500 100 R 50 50 1 1 I
|
|
|
|
X VB1 15 400 700 100 L 50 50 1 1 W
|
|
|
|
X NC 25 300 600 100 L 50 50 1 1 N N
|
|
|
|
X NC 35 300 100 100 L 50 50 1 1 N N
|
|
|
|
X COMP1 45 -400 400 100 R 50 50 1 1 O
|
|
|
|
X CSH1 16 400 800 100 L 50 50 1 1 P
|
|
|
|
X NC 36 300 0 100 L 50 50 1 1 N N
|
|
|
|
X CLIP1 46 -400 300 100 R 50 50 1 1 C
|
|
|
|
X LO1 17 400 -600 100 L 50 50 1 1 O
|
|
|
|
X NC 27 300 500 100 L 50 50 1 1 N N
|
|
|
|
X NC 37 300 -100 100 L 50 50 1 1 N N
|
|
|
|
X CSD 47 -400 100 100 R 50 50 1 1 P
|
|
|
|
X NC 28 300 400 100 L 50 50 1 1 N N
|
|
|
|
X NC 48 300 -300 100 L 50 50 1 1 N N
|
2017-08-13 06:54:51 +02:00
|
|
|
X COM 19 0 -900 100 U 50 50 1 1 P N
|
2017-08-12 21:42:06 +02:00
|
|
|
X OTP 29 -400 -400 100 R 50 50 1 1 P
|
|
|
|
X COM 49 0 -900 100 U 50 50 1 1 P N
|
|
|
|
X OTW 2 -400 200 100 R 50 50 2 1 C
|
|
|
|
X FAULT 3 -400 100 100 R 50 50 2 1 C
|
|
|
|
X CKO 4 -400 -700 100 R 50 50 2 1 O
|
|
|
|
X X1B 5 -400 -200 100 R 50 50 2 1 O
|
|
|
|
X X1A 6 -400 0 100 R 50 50 2 1 I
|
|
|
|
X X2B 7 -400 -500 100 R 50 50 2 1 O
|
|
|
|
X X2A 8 -400 -300 100 R 50 50 2 1 I
|
|
|
|
X XSL 9 -400 -600 100 R 50 50 2 1 I
|
|
|
|
X LO2 20 400 -600 100 L 50 50 2 1 O
|
|
|
|
X IN2 40 -400 500 100 R 50 50 2 1 I
|
|
|
|
X CSH2 21 400 800 100 L 50 50 2 1 P
|
|
|
|
X VB2 22 400 700 100 L 50 50 2 1 W
|
|
|
|
X HO2 23 400 300 100 L 50 50 2 1 O
|
|
|
|
X VS2 26 400 200 100 L 50 50 2 1 P
|
|
|
|
X VCC2 18 400 -200 100 L 50 50 2 1 W
|
|
|
|
X CLIP2 38 -400 300 100 R 50 50 2 1 C
|
|
|
|
X COMP2 39 -400 400 100 R 50 50 2 1 O
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
# IRS2092
|
|
|
|
#
|
|
|
|
DEF IRS2092 U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 0 1025 50 H V C CNN
|
|
|
|
F1 "IRS2092" 0 950 50 H V C CNN
|
|
|
|
F2 "" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x9.9mm*Pitch1.27mm*
|
|
|
|
DIP*W7.62mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -300 -800 300 900 0 1 10 f
|
|
|
|
X VAA 1 -400 800 100 R 50 50 1 1 W
|
|
|
|
X GND 2 -400 200 100 R 50 50 1 1 W
|
|
|
|
X IN- 3 -400 400 100 R 50 50 1 1 I
|
2017-08-12 21:42:06 +02:00
|
|
|
X COMP 4 -400 300 100 R 50 50 1 1 O
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X CSD 5 -400 100 100 R 50 50 1 1 P
|
|
|
|
X VSS 6 -400 -300 100 R 50 50 1 1 W
|
2017-08-12 21:42:06 +02:00
|
|
|
X VREF 7 -400 -500 100 R 50 50 1 1 w
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X OCSET 8 -400 -600 100 R 50 50 1 1 P
|
|
|
|
X DT 9 -400 -700 100 R 50 50 1 1 P
|
2017-08-12 21:42:06 +02:00
|
|
|
X COM 10 0 -900 100 U 50 50 1 1 W
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X LO 11 400 -600 100 L 50 50 1 1 O
|
|
|
|
X VCC 12 400 -200 100 L 50 50 1 1 W
|
|
|
|
X VS 13 400 200 100 L 50 50 1 1 P
|
|
|
|
X HO 14 400 300 100 L 50 50 1 1 O
|
|
|
|
X VB 15 400 700 100 L 50 50 1 1 W
|
|
|
|
X CSH 16 400 800 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
2017-08-12 21:42:06 +02:00
|
|
|
# IRS2093M
|
|
|
|
#
|
|
|
|
DEF IRS2093M U 0 20 Y Y 4 L N
|
|
|
|
F0 "U" 0 1025 50 H V C CNN
|
|
|
|
F1 "IRS2093M" 0 950 50 H V C CNN
|
|
|
|
F2 "Housings_DFN_QFN:MLPQ-48-1EP_7x7mm_Pitch0.5mm" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
$FPLIST
|
|
|
|
MLPQ*EP*7x7mm*Pitch0.5mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -300 -800 300 900 0 1 10 f
|
|
|
|
X DS 1 -400 300 100 R 50 50 1 1 I
|
|
|
|
X NC 2 -300 700 100 R 50 50 1 1 N N
|
|
|
|
X NC 3 -300 600 100 R 50 50 1 1 N N
|
|
|
|
X NC 4 -300 0 100 R 50 50 1 1 N N
|
|
|
|
X NC 5 -300 -100 100 R 50 50 1 1 N N
|
|
|
|
X NC 6 -300 -200 100 R 50 50 1 1 N N
|
2017-08-13 06:54:51 +02:00
|
|
|
X COM 20 0 -900 100 U 50 50 1 1 P N
|
2017-08-12 21:42:06 +02:00
|
|
|
X VS1 11 400 200 100 L 50 50 1 1 P
|
|
|
|
X NC 31 300 400 100 L 50 50 1 1 N N
|
|
|
|
X GND 41 -400 200 100 R 50 50 1 1 W
|
|
|
|
X HO1 12 400 300 100 L 50 50 1 1 O
|
|
|
|
X COM 32 0 -900 100 U 50 50 1 1 W
|
|
|
|
X VSS 42 -400 -300 100 R 50 50 1 1 W
|
|
|
|
X VB1 13 400 700 100 L 50 50 1 1 W
|
|
|
|
X VCC 33 400 -200 100 L 50 50 1 1 W
|
|
|
|
X VAA 43 -400 800 100 R 50 50 1 1 W
|
|
|
|
X CSH1 14 400 800 100 L 50 50 1 1 P
|
|
|
|
X DT 34 -400 -700 100 R 50 50 1 1 P
|
|
|
|
X LO1 15 400 -600 100 L 50 50 1 1 O
|
|
|
|
X OCSET 35 -400 -600 100 R 50 50 1 1 P
|
|
|
|
X VREF 36 -400 -500 100 R 50 50 1 1 w
|
|
|
|
X IN1 46 -400 500 100 R 50 50 1 1 I
|
|
|
|
X COMP1 47 -400 400 100 R 50 50 1 1 O
|
|
|
|
X NC 18 300 600 100 L 50 50 1 1 N N
|
|
|
|
X CSD 48 -400 100 100 R 50 50 1 1 P
|
|
|
|
X NC 19 300 500 100 L 50 50 1 1 N N
|
2017-08-13 06:54:51 +02:00
|
|
|
X COM 49 0 -900 100 U 50 50 1 1 P N
|
2017-08-12 21:42:06 +02:00
|
|
|
X CSH2 7 400 800 100 L 50 50 2 1 P
|
|
|
|
X VB2 8 400 700 100 L 50 50 2 1 W
|
|
|
|
X HO2 9 400 300 100 L 50 50 2 1 O
|
|
|
|
X VS2 10 400 200 100 L 50 50 2 1 P
|
|
|
|
X IN2 44 -400 500 100 R 50 50 2 1 I
|
|
|
|
X COMP2 45 -400 400 100 R 50 50 2 1 O
|
|
|
|
X LO2 16 400 -600 100 L 50 50 2 1 O
|
|
|
|
X VCC2 17 400 -200 100 L 50 50 2 1 W
|
|
|
|
X LO3 22 400 -600 100 L 50 50 3 1 O
|
|
|
|
X CSH3 23 400 800 100 L 50 50 3 1 P
|
|
|
|
X VB3 24 400 700 100 L 50 50 3 1 W
|
|
|
|
X HO3 25 400 300 100 L 50 50 3 1 O
|
|
|
|
X VS3 26 400 200 100 L 50 50 3 1 P
|
|
|
|
X COMP3 37 -400 400 100 R 50 50 3 1 O
|
|
|
|
X IN3 38 -400 500 100 R 50 50 3 1 I
|
|
|
|
X CSH4 30 400 800 100 L 50 50 4 1 P
|
|
|
|
X IN4 40 -400 500 100 R 50 50 4 1 I
|
|
|
|
X LO4 21 400 -600 100 L 50 50 4 1 O
|
|
|
|
X VS4 27 400 200 100 L 50 50 4 1 P
|
|
|
|
X HO4 28 400 300 100 L 50 50 4 1 O
|
|
|
|
X VB4 29 400 700 100 L 50 50 4 1 W
|
|
|
|
X COMP4 39 -400 400 100 R 50 50 4 1 O
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
# IRS20957S
|
|
|
|
#
|
|
|
|
DEF IRS20957S U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 0 950 50 H V C CNN
|
|
|
|
F1 "IRS20957S" 0 850 50 H V C CNN
|
|
|
|
F2 "Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x9.9mm*Pitch1.27mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -300 -700 300 800 0 1 10 f
|
|
|
|
X VDD 1 -400 700 100 R 50 50 1 1 W
|
|
|
|
X CSD 2 -400 500 100 R 50 50 1 1 P
|
|
|
|
X IN 3 -400 600 100 R 50 50 1 1 I
|
|
|
|
X VSS 4 -400 100 100 R 50 50 1 1 W
|
2017-08-12 21:42:06 +02:00
|
|
|
X NC 5 -300 0 100 R 50 50 1 1 N N
|
|
|
|
X VREF 6 -400 -100 100 R 50 50 1 1 w
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X OCSET 7 -400 -500 100 R 50 50 1 1 P
|
|
|
|
X DT 8 -400 -600 100 R 50 50 1 1 P
|
2017-08-12 21:42:06 +02:00
|
|
|
X COM 9 0 -800 100 U 50 50 1 1 W
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X LO 10 400 -500 100 L 50 50 1 1 O
|
|
|
|
X VCC 11 400 -100 100 L 50 50 1 1 W
|
2017-08-12 21:42:06 +02:00
|
|
|
X NC 12 300 0 100 L 50 50 1 1 N N
|
|
|
|
X VS 13 400 100 100 L 50 50 1 1 P
|
|
|
|
X HO 14 400 200 100 L 50 50 1 1 O
|
|
|
|
X VB 15 400 600 100 L 50 50 1 1 W
|
|
|
|
X CSH 16 400 700 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
|
|
|
# IRS20965S
|
|
|
|
#
|
|
|
|
DEF IRS20965S U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 0 950 50 H V C CNN
|
|
|
|
F1 "IRS20965S" 0 850 50 H V C CNN
|
|
|
|
F2 "Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x9.9mm*Pitch1.27mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -300 -700 300 800 0 1 10 f
|
|
|
|
X VDD 1 -400 700 100 R 50 50 1 1 W
|
|
|
|
X CSD 2 -400 400 100 R 50 50 1 1 P
|
|
|
|
X OC 3 -400 300 100 R 50 50 1 1 C
|
|
|
|
X HIN 4 -400 600 100 R 50 50 1 1 I
|
|
|
|
X LIN 5 -400 500 100 R 50 50 1 1 I
|
|
|
|
X VSS 6 -400 100 100 R 50 50 1 1 W
|
|
|
|
X VREF 7 -400 -100 100 R 50 50 1 1 w
|
|
|
|
X OCSET 8 -400 -500 100 R 50 50 1 1 P
|
|
|
|
X COM 9 0 -800 100 U 50 50 1 1 W
|
|
|
|
X LO 10 400 -500 100 L 50 50 1 1 O
|
|
|
|
X VCC 11 400 -100 100 L 50 50 1 1 W
|
|
|
|
X STP 12 -400 -600 100 R 50 50 1 1 I
|
Overhaul ir.lib
Changes
- Updated all datasheet links to Infineon website
- Added package type to all descriptions
- Standardized all descriptions to '<description>, <voltage>, <drive current>, <package>
- Set pin name offset to 20mil
- Replaced '-' in FPfilter with '?'
- Added other packages/pinouts for existing parts (IRS2186/IRS21864, IR2181/IRS21814, etc.)
- Split IR2110/IR2113 into DIP and SOIC packages since the pinout is different (they were together!)
- Figured out a standard pinout and symbol for the standard/generic (non-class D) drivers
- Moved power pins to top and bottom of AUIPS* symbols
- Stacked pins where possible
- Used ALIAS instead of discrete symbols where possible
- Added a bunch of parts: IR2101[S], IR2011, IR2085S, IR2101, IR2102, IRS2101, IR2010[S], IR[S]2183/21834, IR[S]2184/21844
- Removed IR2186 (I only find a prelim datasheet and nothing in Infineon's site)
- Note that since we're rearranging libraries anyway I left this in ir.lib (not infineon.lib)
2017-08-11 17:53:12 +02:00
|
|
|
X VS 13 400 100 100 L 50 50 1 1 P
|
|
|
|
X HO 14 400 200 100 L 50 50 1 1 O
|
|
|
|
X VB 15 400 600 100 L 50 50 1 1 W
|
|
|
|
X CSH 16 400 700 100 L 50 50 1 1 P
|
2016-12-01 04:48:15 +01:00
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
2017-08-12 21:42:06 +02:00
|
|
|
# IRS2452AM
|
|
|
|
#
|
|
|
|
DEF IRS2452AM U 0 20 Y Y 2 L N
|
|
|
|
F0 "U" 0 1025 50 H V C CNN
|
|
|
|
F1 "IRS2452AM" 0 950 50 H V C CNN
|
|
|
|
F2 "Housings_DFN_QFN:MLPQ-32-1EP_7x7mm_Pitch0.5mm" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
$FPLIST
|
|
|
|
MLPQ*EP*7x7mm*Pitch0.5mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -300 -800 300 900 0 1 10 f
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|
|
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X VSS 4 -400 -300 100 R 50 50 1 1 W
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|
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X VAA 5 -400 800 100 R 50 50 1 1 W
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X NC 6 -300 0 100 R 50 50 1 1 N N
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|
|
|
X GND 7 -400 200 100 R 50 50 1 1 W
|
|
|
|
X IN+1 8 -400 700 100 R 50 50 1 1 I
|
|
|
|
X IN-1 9 -400 600 100 R 50 50 1 1 I
|
|
|
|
X COMP1 10 -400 500 100 R 50 50 1 1 O
|
|
|
|
X COM 20 0 -900 100 U 50 50 1 1 W
|
|
|
|
X CSD 11 -400 100 100 R 50 50 1 1 P
|
|
|
|
X NC 21 -300 -200 100 R 50 50 1 1 N N
|
|
|
|
X A/B 31 -400 300 100 R 50 50 1 1 I
|
|
|
|
X BTL 12 -400 400 100 R 50 50 1 1 I
|
|
|
|
X VCC 22 400 -200 100 L 50 50 1 1 W
|
|
|
|
X CSH1 13 400 800 100 L 50 50 1 1 P
|
|
|
|
X OTP 23 -400 -600 100 R 50 50 1 1 P
|
|
|
|
X COM 33 0 -900 100 U 50 50 1 1 P N
|
|
|
|
X VB1 14 400 700 100 L 50 50 1 1 W
|
|
|
|
X DT 24 -400 -700 100 R 50 50 1 1 P
|
|
|
|
X HO1 15 400 300 100 L 50 50 1 1 O
|
|
|
|
X VS1 16 400 200 100 L 50 50 1 1 P
|
|
|
|
X CSL1 17 400 -100 100 L 50 50 1 1 P
|
|
|
|
X LO1 18 400 -600 100 L 50 50 1 1 O
|
|
|
|
X NC 19 -300 -100 100 R 50 50 1 1 N N
|
|
|
|
X COMP2 1 -400 400 100 R 50 50 2 1 O
|
|
|
|
X IN-2 2 -400 500 100 R 50 50 2 1 I
|
|
|
|
X IN+2 3 -400 600 100 R 50 50 2 1 I
|
|
|
|
X CSH2 30 400 800 100 L 50 50 2 1 P
|
|
|
|
X CLK 32 -400 200 100 R 50 50 2 1 I
|
|
|
|
X LO2 25 400 -600 100 L 50 50 2 1 O
|
|
|
|
X CSL2 26 400 -100 100 L 50 50 2 1 P
|
|
|
|
X VS2 27 400 200 100 L 50 50 2 1 P
|
|
|
|
X HO2 28 400 300 100 L 50 50 2 1 O
|
|
|
|
X VB2 29 400 700 100 L 50 50 2 1 W
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
2017-08-14 00:45:26 +02:00
|
|
|
# IRS2890DS
|
|
|
|
#
|
|
|
|
DEF IRS2890DS U 0 20 Y Y 1 F N
|
|
|
|
F0 "U" 50 525 50 H V L CNN
|
|
|
|
F1 "IRS2890DS" 50 450 50 H V L CNN
|
|
|
|
F2 "Housings_SOIC:SOIC-14_3.9x8.7mm_Pitch1.27mm" 0 0 50 H I C CIN
|
|
|
|
F3 "" 0 0 50 H I C CNN
|
|
|
|
$FPLIST
|
|
|
|
SOIC*3.9x8.7mm*Pitch1.27mm*
|
|
|
|
$ENDFPLIST
|
|
|
|
DRAW
|
|
|
|
S -200 -400 200 400 0 1 10 f
|
|
|
|
X VCC 1 0 500 100 D 50 50 1 1 W
|
|
|
|
X HIN 2 -300 0 100 R 50 50 1 1 I
|
|
|
|
X LIN 3 -300 -100 100 R 50 50 1 1 I
|
|
|
|
X ITRIP 4 0 -500 100 U 50 50 1 1 P
|
|
|
|
X NC 5 -200 300 100 R 50 50 1 1 N N
|
|
|
|
X COM 6 -100 -500 100 U 50 50 1 1 W
|
|
|
|
X RFE 7 -300 100 100 R 50 50 1 1 C
|
|
|
|
X NC 8 -200 200 100 R 50 50 1 1 N N
|
|
|
|
X LO 9 300 -300 100 L 50 50 1 1 O
|
|
|
|
X NC 10 200 100 100 L 50 50 1 1 N N
|
|
|
|
X NC 11 200 0 100 L 50 50 1 1 N N
|
|
|
|
X VS 12 300 -200 100 L 50 50 1 1 P
|
|
|
|
X HO 13 300 200 100 L 50 50 1 1 O
|
|
|
|
X VB 14 300 300 100 L 50 50 1 1 P
|
|
|
|
ENDDRAW
|
|
|
|
ENDDEF
|
|
|
|
#
|
2014-08-10 17:49:33 +02:00
|
|
|
#End Library
|