add ADS1256_config
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Kolossos
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# -*- coding: utf-8 -*-
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from ADS1256_definitions import *
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################ Raspberry Pi Physical Interface Properties #################
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# SPI bus configuration and GPIO pins used for the ADS1255/ADS1256.
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# These defaults are used by the constructor of the ADS1256 class.
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#
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# To create multiple class instances for more than one AD converter, a unique
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# configuration must be specified as argument for each instance.
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#
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# The following pins are compatible
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# with the Waveshare High Precision AD/DA board on the Raspberry Pi 2B and 3B
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#
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# SPI_CHANNEL corresponds to the chip select hardware bin controlled by the
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# SPI hardware. For the Waveshare board this pin is not even connected, so this
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# code does not use hardware-controlled CS and this is a don't care value.
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# FIXME: Implement hardware chip select as an option.
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SPI_CHANNEL = 1
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# SPI_MODE specifies clock polarity and phase; MODE=1 <=> CPOL=0, CPHA=1
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SPI_MODE = 1
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# SPI clock rate in Hz. The ADS1256 supports a minimum of 1/10th of the output
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# sample data rate in Hz to 1/4th of the oscillator CLKIN_FREQUENCY which
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# results in a value of 1920000 Hz for the Waveshare board. However, since
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# the Raspberry pi only supports power-of-two fractions of the 250MHz system
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# clock, the closest value would be 1953125 Hz, which is slightly out of spec
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# for the ADS1256. Choosing 250MHz/256 = 976563 Hz is a safe choice.
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SPI_FREQUENCY = 976563
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# Risking the slightly out-of-spec speed:
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#SPI_FREQUENCY = 1953125
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# The RPI GPIOs used: All of these are optional and must be set to None if not
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# used. In This case, the inputs must be hardwired to the correct logic level
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# and a sufficient DRDY_TIMEOUT must be specified further below.
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# Obviously, when not using hardware polling of the DRDY signal, acquisition
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# will be much slower with long delays. See datasheet..
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#CS_PIN = None
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CS_PIN = 15
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DRDY_PIN = 11
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RESET_PIN = 12
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PDWN_PIN = 13
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###############################################################################
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################## ADS1256 Constant Configuration Settings ###################
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# Seconds to wait in case DRDY pin is not connected or the chip
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# does not respond. See table 21 of ADS1256 datasheet: When using a
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# sample rate of 2.5 SPS and issuing a self calibration command,
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# the timeout can be up to 1228 milliseconds:
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DRDY_TIMEOUT = 2
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# Optional delay in seconds to avoid busy wait and reduce CPU load when
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# polling the DRDY pin. Default is 0.000001 or 1 µs (timing not accurate)
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DRDY_DELAY = 0.000001
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# Master clock rate in Hz. Default is 7680000:
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CLKIN_FREQUENCY = 7680000
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################################################################################
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# All following settings are accessible through ADS1256 class properties
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############## ADS1256 Default Runtime Adjustable Properties #################
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# Analog reference voltage between VREFH and VREFN pins
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v_ref = 2.5
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# Gain seting of the integrated programmable amplifier. This value must be
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# one of (GAIN_1, GAIN_2, GAIN_4, GAIN_8, GAIN_16, GAIN_32, GAIN_64).
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# Gain = 1, V_ref = 2.5V ==> full-scale input voltage = 5.00V, corresponding
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# to a 24-bit two's complement output value of 2**23 - 1 = 8388607
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gain_flags = GAIN_1
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################################################################################
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#################### ADS1256 Default Register Settings #######################
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# REG_STATUS:
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# When enabling the AUTOCAL flag: Any following operation that changes
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# PGA GAIN, DRATE or BUFFER flags triggers a self calibration:
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# THIS REQUIRES an additional timeout via WaitDRDY() after each such operation.
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# Note: BUFFER_ENABLE means the ADC input voltage range is limited
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# to (AVDD-2V),see datasheet
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status = BUFFER_ENABLE
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# REG_MUX:
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# Default: positive input = AIN0, negative input = AINCOM
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mux = POS_AIN0 | NEG_AINCOM
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# REG_ADCON:
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# Disable clk out signal (not needed, source of disturbance),
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# sensor detect current sources disabled, gain setting as defined above:
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adcon = CLKOUT_OFF | SDCS_OFF | gain_flags
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# REG_DRATE:
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# 10 SPS places a filter zero at 50 Hz and 60 Hz for line noise rejection
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drate = DRATE_10
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# REG_IO: No GPIOs needed
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gpio = 0x00
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################################################################################
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"""########### Extended Description: ADS1256 Registers ###############
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Logically OR all desired option values together to form a 1 byte command
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and write it to the respective register
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Available Registers with address definitions:
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REG_STATUS = 0x00
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REG_MUX = 0x01
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REG_ADCON = 0x02
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REG_DRATE = 0x03
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REG_IO = 0x04
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REG_OFC0 = 0x05
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REG_OFC1 = 0x06
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REG_OFC2 = 0x07
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REG_FSC0 = 0x08
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REG_FSC1 = 0x09
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REG_FSC2 = 0x0A
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==> REG_STATUS, Status Register Configuration:
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Bits 7-4: ID3, ID2, ID1, ID0 Factory Programmed Identification Bits
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(Read Only)
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Bit 3 ORDER: Data Output Bit Order
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0 = Most Significant Bit First (default)
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1 = Least Significant Bit First
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Input data is always shifted in most significant byte and bit first.
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Output data is always shifted out most significant byte first. The
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ORDER bit only controls the bit order of the output data within the
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byte.
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Bit 2 ACAL: Auto-Calibration
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0 = Auto-Calibration Disabled (default)
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1 = Auto-Calibration Enabled
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When Auto-Calibration is enabled, self-calibration begins at the
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completion of the WREG command that changes the PGA (bits 0-2 of ADCON
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register), DR (bits 7-0 in the DRATE register) or BUFEN (bit 1 in the
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STATUS register) values.
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THIS REQUIRES that an additional timeout (DREADY polling)
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is implemented after each such operation!
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Bit 1 BUFEN: Analog Input Buffer Enable
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0 = Buffer Disabled (default)
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1 = Buffer Enabled
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Bit 0 DRDY: Data Ready (Read Only)
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This bit duplicates the state of the DRDY pin, which is inverted logic.
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Option value definitions:
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BUFFER_ENABLE = 0x02
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AUTOCAL_ENABLE = 0x04
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ORDER_LSB = 0x08
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==> REG_MUX, Input multiplexer register, channel selection:
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High nibble selects positive input, low nibble negative input.
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Pin selection codes: logic OR together to form the register value.
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Example: ads1256.mux = POS_AIN0 | NEG_AINCOM
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# Pin selection codes for the positive input:
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POS_AIN0 = 0x00
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POS_AIN1 = 0x10
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POS_AIN2 = 0x20
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POS_AIN3 = 0x30
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POS_AIN4 = 0x40
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POS_AIN5 = 0x50
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POS_AIN6 = 0x60
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POS_AIN7 = 0x70
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POS_AINCOM = 0x80
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# Pin selection codes for the negative input:
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NEG_AIN0 = 0x00
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NEG_AIN1 = 0x01
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NEG_AIN2 = 0x02
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NEG_AIN3 = 0x03
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NEG_AIN4 = 0x04
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NEG_AIN5 = 0x05
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NEG_AIN6 = 0x06
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NEG_AIN7 = 0x07
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NEG_AINCOM = 0x08
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==> REG_ADCON, A/D Control Register
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Bit 7 Reserved, always 0 (Read Only)
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Bits 6-5 CLK1, CLK0: D0/CLKOUT Clock Out Rate Setting
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00 = Clock Out OFF
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01 = Clock Out Frequency = fCLKIN (default)
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10 = Clock Out Frequency = fCLKIN/2
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11 = Clock Out Frequency = fCLKIN/4
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When not using CLKOUT, it is recommended that it be turned off. These
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bits can only be reset using the RESET pin.
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Bits 4-3 SDCS1, SCDS0: Sensor Detect Current Sources
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00 = Sensor Detect OFF (default)
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01 = Sensor Detect Current = 0.5uA
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10 = Sensor Detect Current = 2uA
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11 = Sensor Detect Current = 10uA
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The Sensor Detect Current Sources can be activated to verify the
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integrity of an external sensor supplying a signal to the ADS1255/6.
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A shorted sensor produces a very small signal while an open-circuit
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sensor produces a very large signal.
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Bits 2-0 PGA2, PGA1, PGA0: Programmable Gain Amplifier Setting
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Option value definitions:
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# Clock output pin setting
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CLKOUT_OFF = 0x00
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CLKOUT_EQUAL = 0x20
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CLKOUT_HALF = 0x40
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CLKOUT_FOURTH = 0x60
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# Sensor Detect Current Source
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SDCS_OFF = 0x00
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SDCS_500pA = 0x08
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SDCS_2uA = 0x10
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SDCS_10uA = 0x18
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# Gain level flag bits definitions:
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GAIN_1 = 0x00
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GAIN_2 = 0x01
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GAIN_4 = 0x02
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GAIN_8 = 0x03
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GAIN_16 = 0x04
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GAIN_32 = 0x05
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GAIN_64 = 0x06
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==> DRATE Register: A/D Data Rate Address 0x03
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Bits 7-0 DR[7: 0]: Data Rate Setting(1)
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The 16 valid Data Rate settings. Only these are valid.
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Sample rate definitions for CLKIN_FREQUENCY = 7.68 MHz (fCLKIN).
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Actual sample rates scale linearly with differing clock rates.
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DRATE_30000 = 0b11110000 # 30,000SPS (default)
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DRATE_15000 = 0b11100000 # 15,000SPS
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DRATE_7500 = 0b11010000 # 7,500SPS
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DRATE_3750 = 0b11000000 # 3,750SPS
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DRATE_2000 = 0b10110000 # 2,000SPS
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DRATE_1000 = 0b10100001 # 1,000SPS
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DRATE_500 = 0b10010010 # 500SPS
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DRATE_100 = 0b10000010 # 100SPS
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DRATE_60 = 0b01110010 # 60SPS
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DRATE_50 = 0b01100011 # 50SPS
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DRATE_30 = 0b01010011 # 30SPS
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DRATE_25 = 0b01000011 # 25SPS
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DRATE_15 = 0b00110011 # 15SPS
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DRATE_10 = 0b00100011 # 10SPS
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DRATE_5 = 0b00010011 # 5SPS
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DRATE_2_5 = 0b00000011 # 2.5SPS
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"""
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